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path: root/drivers/clk/sunxi-ng
AgeCommit message (Expand)Author
2018-12-05clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLLChen-Yu Tsai
2018-12-04clk: sunxi-ng: h3: Allow parent change for ve clockJernej Skrabec
2018-12-04clk: sunxi-ng: add support for suniv F1C100s SoCMesih Kilinc
2018-12-03clk: sunxi-ng: h3/h5: Fix CSI_MCLK parentChen-Yu Tsai
2018-11-30clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC outputChen-Yu Tsai
2018-11-23clk: sunxi-ng: sun50i: a64: Use sigma-delta modulation for audio PLLChen-Yu Tsai
2018-11-13clk: sunxi-ng: a64: Fix gate bit of DSI DPHYJagan Teki
2018-11-13clk: sunxi-ng: Enable DE2_CCU for SUN8I and SUN50IJagan Teki
2018-11-05clk: sunxi-ng: Add support for H6 DE3 clocksJernej Skrabec
2018-11-05clk: sunxi-ng: h6: Set video PLLs limitsJernej Skrabec
2018-11-05clk: sunxi-ng: Use u64 for calculation of NM rateJernej Skrabec
2018-11-05clk: sunxi-ng: Adjust MP clock parent rate when allowedJernej Skrabec
2018-11-05clk: sunxi-ng: sun50i: h6: Fix MMC clock mux widthJagan Teki
2018-11-05clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clockIcenowy Zheng
2018-10-31Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2018-09-07clk: sunxi-ng: sun4i: Set VCO and PLL bias current to lowest settingChen-Yu Tsai
2018-09-05dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macroJagan Teki
2018-09-05clk: sunxi-ng: a64: Add max. rate constraint to video PLLsIcenowy Zheng
2018-09-05clk: sunxi-ng: a64: Add minimal rate for video PLLsJagan Teki
2018-09-05clk: sunxi-ng: sun50i: h6: Add 2x fixed post-divider to MMC module clocksIcenowy Zheng
2018-08-27clk: sunxi-ng: a83t: Add max. rate constraint to video PLLsJernej Skrabec
2018-08-27clk: sunxi-ng: nkmp: Add constraint for maximum rateJernej Skrabec
2018-08-27clk: sunxi-ng: r40: Add max. rate constraint to video PLLsJernej Skrabec
2018-08-27clk: sunxi-ng: h3/h5: Add max. rate constraint to pll-videoJernej Skrabec
2018-08-27clk: sunxi-ng: Add maximum rate constraint to NM PLLsJernej Skrabec
2018-08-27clk: sunxi-ng: h6: fix PWM gate/reset offsetRongyi Chen
2018-08-27clk: sunxi-ng: h6: fix bus clocks' divider positionIcenowy Zheng
2018-08-15Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2018-06-27clk: sunxi-ng: add A64 compatible stringIcenowy Zheng
2018-06-27clk: sunxi-ng: r40: Export video PLLsJernej Skrabec
2018-06-27clk: sunxi-ng: r40: Allow setting parent rate to display related clocksJernej Skrabec
2018-06-27clk: sunxi-ng: r40: Add minimal rate for video PLLsJernej Skrabec
2018-06-21clk: sunxi-ng: replace lib-y with obj-yMasahiro Yamada
2018-05-17clk: sunxi-ng: r40: export a regmap to access the GMAC registerIcenowy Zheng
2018-05-17clk: sunxi-ng: r40: rewrite init code to a platform driverIcenowy Zheng
2018-05-04clk: sunxi-ng: add support for H6 PRCM CCUIcenowy Zheng
2018-04-13Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2018-03-21clk: sunxi-ng: add missing hdmi-slow clock for H6 CCUIcenowy Zheng
2018-03-18clk: sunxi-ng: add support for the Allwinner H6 CCUIcenowy Zheng
2018-03-18clk: sunxi-ng: Support fixed post-dividers on NKMP style clocksIcenowy Zheng
2018-03-02clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEOJernej Skrabec
2018-03-02clk: sunxi-ng: h3: h5: Allow some clocks to set parent rateJernej Skrabec
2018-03-02clk: sunxi-ng: h3: h5: Add minimal rate for video PLLJernej Skrabec
2018-03-02clk: sunxi-ng: Add check for minimal rate to NM PLLsJernej Skrabec
2018-02-19clk: sunxi-ng: a31: Fix CLK_OUT_* clock opsChen-Yu Tsai
2018-02-15clk: sunxi-ng: Use u64 for calculation of nkmp rateJernej Skrabec
2018-02-15clk: sunxi-ng: Mask nkmp factors when setting registerJernej Skrabec
2018-02-13clk: sunxi-ng: remove select on obsolete SUNXI_CCU_X kconfig nameCorentin Labbe
2018-01-26Merge branches 'clk-aspeed', 'clk-lock-UP', 'clk-mediatek' and 'clk-allwinner...Stephen Boyd
2018-01-26Merge branch 'clk-divider-container' into clk-nextStephen Boyd
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