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path: root/drivers/clk/sirf/clk-atlas7.c
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2019-05-21treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 4Thomas Gleixner
Based on 1 normalized pattern(s): licensed under gplv2 or later extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 118 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154040.961286471@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01clk: make clk_init_data constBhumika Goyal
Make these const as they are only stored in the init field of a clk_hw structure, which is const. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-03-29clk: atlas7: Make reset_control_ops constPhilipp Zabel
The atlas7_rst_ops structure is never modified. Make it const. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-09-29clk: atlas7: fix noc/socket disconnect/reconnect for unit clksGuo Zeng
Power management on of NoC(Notwork On Chip) requires that disconnect and reconnect routine should been done during clk disable/enable. also there are different types of clocks, For NoC Macro clocks, write idle_bit and wait for hardward ACK; For Socket clocks, write idle_bit; For others, do nothing. Signed-off-by: Guo Zeng <Guo.Zeng@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-09-29clk: atlas7: move variable-definition togetherGuo Zeng
re-order the codes more reasonable by moving variable-definition together. Signed-off-by: Guo Zeng <Guo.Zeng@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-08-24clk: atlas7: fix pll missed divide NR in fraction modeGuo Zeng
PLL VCO frequency is given by Fvco = Fref * 2 * NF / NR in integer-N mode, or by Fvco = Fref * SSN / NR in Spread Spectrum (fractional-N) mode. Thus fix the missing part of NR Signed-off-by: Guo Zeng <guo.zeng@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-08-24clk: atlas7: fix bit field and its root clk for coresight_tpiuGuo Zeng
bit4 thcpum_cpudiv4_clken r/w thcpum_cpudiv4_clk clock enable (default: 1) Root clock CPU_CLK must be enabled for this clock to be enabled bit3 coresight_tpiu_clken r/w coresight_tpiu_clk clock enable (default: 0) Root clock TPIU_CLK must be enabled for this clock to be enabled Signed-off-by: Guo Zeng <guo.zeng@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-08-24clk: atlas7: replace dto resolution magic number by macroYibo Cai
Signed-off-by: Yibo Cai <yibo.cai@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-08-24clk: atlas7: fix integer overflow in dto rate calculationYibo Cai
I cannot believe that I spend quite a lot time in finding this bug. It seems a pitfall people tend to fall in. In "int64 = int32 * int32", conversion from 32-bits to 64-bits comes after the multiplication. So this statement may not work as expected. Signed-off-by: Yibo Cai <yibo.cai@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-08-24clk: atlas7: export mux clks so that consumers can get themGuo Zeng
this patch makes mux clks can be referenced by device drivers. Signed-off-by: Guo Zeng <guo.zeng@csr.com> Signed-off-by: Barry Song <Barry.Song@csr.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-08-24clk: atlas7: add lost pwm unit clksGuo Zeng
Signed-off-by: Guo Zeng <Guo.Zeng@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-05-20clk: sirf: add CSR atlas7 clk and reset supportZhiwu Song
the hardware node includes both clock and reset support, so it is named as "car". this patch implements Flexible clocks(mux, divider, gate), Selectable clock(mux, divider, gate), root clock(gate),leaf clock(gate), others. it also implements the reset controller functionality. Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Guo Zeng <Guo.Zeng@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>