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Initial support for R-Car E3 (r8a77990), including core and module
clocks.
Based on the Table 8.2g of "R-Car Series, 3rd Generation User's Manual:
Hardware ((Rev. 0.80, Oct 31, 2017) with Manual Errata on Feb. 28, 2018".
Inspried by patches by Takeshi Kihara in the BSP.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add RZ/G1C (R8A77470) Clock Pulse Generator / Module Standby and Software
Reset support.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Initial support for R-Car M3-N (r8a77965), including core and module
clocks.
Based on Table 8.2d of "R-Car Series, 3rd Generation User's Manual:
Hardware (Rev. 0.80, Oct 31, 2017)".
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add R-Car V3H (R8A77980) Clock Pulse Generator / Module Standby and
Software Reset support, using the CPG/MSSR driver core and the common
R-Car Gen3 code.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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On R-Car Gen3 systems, PSCI system suspend powers down the SoC, possibly
losing clock configuration. Hence add a notifier chain that can be used
by core clocks to save/restore clock state during system suspend/resume.
The implementation of the actual clock state save/restore operations is
clock-specific, and to be registered with the notifier chain in the SoC
or family-specific cpg_mssr_info.cpg_clk_register() callback.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
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Add R-Car V3M (R8A77970) Clock Pulse Generator / Module Standby and
Software Reset support, using the CPG/MSSR driver core and the common
R-Car Gen3 code.
Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add R-Car D3 (R8A77995) Clock Pulse Generator / Module Standby and
Software Reset support, using the CPG/MSSR driver core and the common
R-Car Gen3 CPG code.
Based on the R-Car Series, 3rd Generation Hardware User's Manual, Rev.
0.55, Jun. 30, 2017.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
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Add a new R-Car E2 Clock Pulse Generator / Module Standby and Software
Reset driver, using the CPG/MSSR driver core. This will enable support
for module resets, which are not supported by the existing driver.
The old driver can still be used through a Kconfig option, to preserve
backward compatibility with old DTBs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add a new R-Car V2H Clock Pulse Generator / Module Standby and Software
Reset driver, using the CPG/MSSR driver core. This will enable support
for module resets, which are not supported by the existing driver.
The old driver can still be used through a Kconfig option, to preserve
backward compatibility with old DTBs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add a new R-Car M2-W/N Clock Pulse Generator / Module Standby and
Software Reset driver, using the CPG/MSSR driver core. This will enable
support for module resets, which are not supported by the existing
driver.
The old driver can still be used through a Kconfig option, to preserve
backward compatibility with old DTBs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add a new R-Car H2 Clock Pulse Generator / Module Standby and Software
Reset driver, using the CPG/MSSR driver core. This will enable support
for module resets, which are not supported by the existing driver.
The old driver can still be used through a Kconfig option, to preserve
backward compatibility with old DTBs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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The same SoC may have different clocks and/or module clock parents,
depending on SoC revision. One option is to use different sets of clock
tables for each SoC revision. However, if the differences are small, it
is much more space-efficient to have a single set of clock tables, and
fix those up at runtime instead.
Hence provide three helpers:
- Two helpers to NULLify core and module clocks that do not exist on
some revisions (NULLified clocks are skipped during the registration
phase),
- One helper to reparent module clocks that have different clock
parents.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add RZ/G1E (R8A7745) Clock Pulse Generator / Module Standby and Software
Reset support, using the CPG/MSSR driver core and the common R-Car Gen2
(and RZ/G) code.
Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert
Uytterhoeven <geert+renesas@glider.be>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add RZ/G1M (R8A7743) Clock Pulse Generator / Module Standby and Software
Reset support, using the CPG/MSSR driver core and the common R-Car Gen2
(and RZ/G) code.
Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert
Uytterhoeven <geert+renesas@glider.be>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Initial support for R-Car M3-W (r8a7796), including basic core clocks,
and SCIF2 (console) and INTC-AP (GIC) module clocks.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
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Gen3 has two clocks (OSC and R) which look like a DIV6 clock but their
divider value is read-only and depends on MD pins at bootup. Add support
for such clocks by reading the value and adding a fixed clock.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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About SD clocks: The clock type is Gen3 specific, the callbacks are all
Gen3 specific; I think the clock definition should also be Gen3 specific
and not in the general header file.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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This is part of an ongoing process to migrate from ARCH_SHMOBILE to
ARCH_RENESAS the motivation for which being that RENESAS seems to be a more
appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs.
Along with the above mentioned Kconfig changes it seems appropriate
to also rename directories that only hold drivers for such SoCs.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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