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path: root/drivers/clk/meson
AgeCommit message (Expand)Author
2018-05-21clk: meson: mpll: add round closest supportJerome Brunet
2018-05-21clk: meson: meson8b: mark fclk_div2 gate clocks as CLK_IS_CRITICALMartin Blumenstingl
2018-05-18clk: meson: use SPDX license identifiers consistentlyJerome Brunet
2018-05-15clk: meson: drop CLK_SET_RATE_PARENT flagYixun Lan
2018-05-15clk: meson-axg: Add AO Clock and Reset controller driverQiufang Dai
2018-05-15clk: meson: aoclk: refactor common code into dedicated fileYixun Lan
2018-05-15clk: meson: migrate to devm_of_clk_add_hw_provider APIYixun Lan
2018-05-15clk: meson: gxbb: add the video decoder clocksMaxime Jourdan
2018-05-15clk: meson: meson8b: add support for the NAND clocksMartin Blumenstingl
2018-05-01Merge tag 'meson-clk-fixes-4.17-1' of https://github.com/BayLibre/clk-meson i...Stephen Boyd
2018-04-25clk: meson: meson8b: fix meson8b_cpu_clk parent clock nameMartin Blumenstingl
2018-04-25clk: meson: meson8b: fix meson8b_fclk_div3_div clock nameMartin Blumenstingl
2018-04-25clk: meson: drop meson_aoclk_gate_regmap_opsYixun Lan
2018-04-16clk: meson: honor CLK_MUX_ROUND_CLOSEST in clk_regmapJerome Brunet
2018-03-14clk: meson: Drop unused local variable and add staticStephen Boyd
2018-03-13clk: meson: clean-up clk81 clocksJerome Brunet
2018-03-13clk: meson: add fdiv clock gatesJerome Brunet
2018-03-13clk: meson: add mpll pre-dividerJerome Brunet
2018-03-13clk: meson: axg: add hifi pll clockJerome Brunet
2018-03-13clk: meson: add ROUND_CLOSEST to the pll driverJerome Brunet
2018-03-13clk: meson: add gp0 frac parameter for axg and gxlJerome Brunet
2018-03-13clk: meson: improve pll driver results with fracJerome Brunet
2018-03-13clk: meson: remove special gp0 lock loopJerome Brunet
2018-03-13clk: meson: poke pll CNTL lastJerome Brunet
2018-03-13clk: meson: add fractional part of meson8b fixed_pllJerome Brunet
2018-03-13clk: meson: use hhi syscon if availableJerome Brunet
2018-03-13clk: meson: remove obsolete cpu_clkJerome Brunet
2018-03-13clk: meson: rework meson8b cpu clockJerome Brunet
2018-03-13clk: meson: split divider and gate part of mpllJerome Brunet
2018-03-13clk: meson: migrate plls clocks to clk_regmapJerome Brunet
2018-03-13clk: meson: migrate the audio divider clock to clk_regmapJerome Brunet
2018-03-13clk: meson: migrate mplls clocks to clk_regmapJerome Brunet
2018-03-13clk: meson: add regmap helpers for parmJerome Brunet
2018-03-13clk: meson: migrate muxes to clk_regmapJerome Brunet
2018-03-13clk: meson: migrate dividers to clk_regmapJerome Brunet
2018-03-13clk: meson: migrate gates to clk_regmapJerome Brunet
2018-03-13clk: meson: add regmap to the clock controllersJerome Brunet
2018-03-13clk: meson: remove superseded aoclk_gate_regmapJerome Brunet
2018-03-13clk: meson: switch gxbb ao_clk to clk_regmapJerome Brunet
2018-03-13clk: meson: add regmap clocksJerome Brunet
2018-03-13clk: meson: remove obsolete commentsJerome Brunet
2018-03-13clk: meson: only one loop index is necessary in probeJerome Brunet
2018-03-13clk: meson: use devm_of_clk_add_hw_providerJerome Brunet
2018-03-13clk: meson: use dev pointer where possibleJerome Brunet
2018-02-12clk: meson: add axg misc bit to the mpll driverJerome Brunet
2018-02-12clk: meson: axg: fix the od shift of the sys_pllYixun Lan
2018-02-12clk: meson: axg: add the fractional part of the fixed_pllJerome Brunet
2018-02-12clk: meson: gxbb: add the fractional part of the fixed_pllJerome Brunet
2018-02-12clk: meson: fix rate calculation of plls with a fractional partJerome Brunet
2018-02-12clk: meson: add the gxl hdmi pllJerome Brunet