| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2019-05-20 | clk: meson: eeclk: add init regs | Jerome Brunet | |
| Like the PLL and MPLL, the controller may require some magic setting to be applied on startup. This is needed when the initial setting is not applied by the boot ROM. The controller need to do it when the setting applies to several clock, like all the MPLLs in the case of g12a. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> | |||
| 2019-02-04 | clk: meson: factorise meson64 peripheral clock controller drivers | Jerome Brunet | |
| The function used to probe the peripheral clock controller of the arm64 amlogic SoCs is mostly the same. We now have 3 of those controllers so it is time to factorize things a bit. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lkml.kernel.org/r/20190201145345.6795-5-jbrunet@baylibre.com | |||
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