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path: root/drivers/clk/meson/gxbb.c
AgeCommit message (Expand)Author
2019-02-04clk: meson: factorise meson64 peripheral clock controller driversJerome Brunet
2019-02-02clk: meson: rework and clean drivers dependenciesJerome Brunet
2019-01-18clk: meson: gxbb: claim clock controller input clock from DTJerome Brunet
2018-12-14Merge branch 'clk-fixes' into clk-nextStephen Boyd
2018-12-13Merge tag 'meson-clk-4.21-2' of https://github.com/BayLibre/clk-meson into cl...Stephen Boyd
2018-12-03clk: meson: Mark some things staticStephen Boyd
2018-11-27clk: meson: Fix GXL HDMI PLL fractional bits widthNeil Armstrong
2018-11-23clk: meson-gxbb: Add video clocksNeil Armstrong
2018-11-23clk: meson-gxbb: Fix HDMI PLL for GXL SoCsNeil Armstrong
2018-11-08clk: meson-gxbb: set fclk_div3 as CLK_IS_CRITICALChristian Hewitt
2018-09-26clk: meson: clk-pll: drop hard-coded rates from pll tablesJerome Brunet
2018-09-26clk: meson: clk-pll: remove od parametersJerome Brunet
2018-09-26clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessaryJerome Brunet
2018-09-26clk: meson: clk-pll: add enable bitJerome Brunet
2018-07-09clk: meson: add gen_clkJerome Brunet
2018-07-09clk: meson: stop rate propagation for audio clocksJerome Brunet
2018-07-09clk: meson: remove obsolete register accessJerome Brunet
2018-06-19clk: meson-gxbb: set fclk_div2 as CLK_IS_CRITICALNeil Armstrong
2018-05-18clk: meson: use SPDX license identifiers consistentlyJerome Brunet
2018-05-15clk: meson: gxbb: add the video decoder clocksMaxime Jourdan
2018-03-14clk: meson: Drop unused local variable and add staticStephen Boyd
2018-03-13clk: meson: clean-up clk81 clocksJerome Brunet
2018-03-13clk: meson: add fdiv clock gatesJerome Brunet
2018-03-13clk: meson: add mpll pre-dividerJerome Brunet
2018-03-13clk: meson: add gp0 frac parameter for axg and gxlJerome Brunet
2018-03-13clk: meson: remove special gp0 lock loopJerome Brunet
2018-03-13clk: meson: poke pll CNTL lastJerome Brunet
2018-03-13clk: meson: use hhi syscon if availableJerome Brunet
2018-03-13clk: meson: split divider and gate part of mpllJerome Brunet
2018-03-13clk: meson: migrate plls clocks to clk_regmapJerome Brunet
2018-03-13clk: meson: migrate the audio divider clock to clk_regmapJerome Brunet
2018-03-13clk: meson: migrate mplls clocks to clk_regmapJerome Brunet
2018-03-13clk: meson: migrate muxes to clk_regmapJerome Brunet
2018-03-13clk: meson: migrate dividers to clk_regmapJerome Brunet
2018-03-13clk: meson: migrate gates to clk_regmapJerome Brunet
2018-03-13clk: meson: add regmap to the clock controllersJerome Brunet
2018-03-13clk: meson: remove obsolete commentsJerome Brunet
2018-03-13clk: meson: only one loop index is necessary in probeJerome Brunet
2018-03-13clk: meson: use devm_of_clk_add_hw_providerJerome Brunet
2018-03-13clk: meson: use dev pointer where possibleJerome Brunet
2018-02-12clk: meson: gxbb: add the fractional part of the fixed_pllJerome Brunet
2018-02-12clk: meson: fix rate calculation of plls with a fractional partJerome Brunet
2018-02-12clk: meson: add the gxl hdmi pllJerome Brunet
2018-02-12clk: meson: add od3 to the pll driverJerome Brunet
2018-02-12clk: meson: remove useless pll rate params tablesJerome Brunet
2017-12-14clk: meson: make the spinlock naming more specificYixun Lan
2017-12-08clk: meson: gxbb: remove IGNORE_UNUSED from mmc clocksJerome Brunet
2017-11-27clk: meson: gxbb: fix wrong clock for SARADC/SANAYixun Lan
2017-10-20clk: meson: gxbb: Add VPU and VAPB clocks dataNeil Armstrong
2017-08-23Merge tag 'meson-clk-for-4.14' of git://github.com/baylibre/clk-meson into cl...Stephen Boyd