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path: root/drivers/clk/hisilicon
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2015-06-04clk: make several parent names constUwe Kleine-König
Since commit 2893c379461a ("clk: make strings in parent name arrays const") the name of parent clocks can be const. So add more const in several clock drivers. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-06-03Merge branch 'clk-next-hi6220' into clk-nextMichael Turquette
Conflicts: drivers/clk/Kconfig
2015-06-03clk: hi6220: Clock driver support for Hisilicon hi6220 SoCBintian Wang
Add clock drivers for hi6220 SoC, this driver controls the SoC registers to supply different clocks to different IPs in the SoC. We add one divider clock for hi6220 because the divider in hi6220 also has a mask bit but it doesnot obey the rule defined by flag "CLK_DIVIDER_HIWORD_MASK", we can not get index of the mask bit by left shift fixed bits (e.g. 16 bits), so we add this divider clock to handle it. Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Signed-off-by: Bintian Wang <bintian.wang@huawei.com> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Zhangfei Gao <zhangfei.gao@linaro.org> Tested-by: Will Deacon <will.deacon@arm.com> Tested-by: Tyler Baker <tyler.baker@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2015-06-03clk: hisilicon: Remove __init for marking function prototypesBintian Wang
__init markings on function prototypes are useless, so remove them. Suggested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Bintian Wang <bintian.wang@huawei.com> Tested-by: Will Deacon <will.deacon@arm.com> Tested-by: Tyler Baker <tyler.baker@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2015-05-14clk: hix5hd2: Silence sparse warningsStephen Boyd
drivers/clk/hisilicon/clk-hix5hd2.c:255:13: warning: symbol 'hix5hd2_clk_register_complex' was not declared. Should it be static? Acked-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-04-12clk: don't use __initconst for non-const arraysUwe Kleine-König
The statement static const char *name[]; defines a modifiable array of pointers to constant chars. That is *name[0] = 'f'; is forbidden, but name[0] = "f"; is not. So marking an array that is defined as above with __initconst is wrong. Either an additional const must be added such that the whole definition reads: static const char *const name[] __initconst; or where this is not possible __initdata must be used. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2015-02-02clk: Add rate constraints to clocksTomeu Vizoso
Adds a way for clock consumers to set maximum and minimum rates. This can be used for thermal drivers to set minimum rates, or by misc. drivers to set maximum rates to assure a minimum performance level. Changes the signature of the determine_rate callback by adding the parameters min_rate and max_rate. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [sboyd@codeaurora.org: set req_rate in __clk_init] Signed-off-by: Michael Turquette <mturquette@linaro.org> [mturquette@linaro.org: min/max rate for sun6i_ahb1_clk_determine_rate migrated clk-private.h changes to clk.c]
2014-12-03clk: Change clk_ops->determine_rate to return a clk_hw as the best parentTomeu Vizoso
This is in preparation for clock providers to not have to deal with struct clk. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-11-19clk: hi3620: Move const initdata into correct code sectionBintian Wang
Use __initconst instead of __initdata for constant init data. Signed-off-by: Bintian Wang <bintian.wang@huawei.com> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-09-28clk: hix5hd2: add I2C clocksWei Yan
hix5hd2 add I2C clocks (I2C0~i2C5) Signed-off-by: Wei Yan <sledge.yanwei@huawei.com> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2014-09-28clk: hix5hd2: add watchdog0 clocksGuoxiong Yan
hix5hd2 add watchdog0 clocks Signed-off-by: Guoxiong Yan <yanguoxiong@huawei.com> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2014-09-28clk: hix5hd2: add sd clkJiancheng Xue
Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2014-09-28clk: hix5hd2: add complex clkZhangfei Gao
Support clk of sata, usb and ethernet Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2014-05-12clk: hisi: add clk-hix5hd2.cZhangfei Gao
Signed-off-by: Haifeng Yan <haifeng.yan@linaro.org> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2014-05-12clk: hisi: add hisi_clk_register_gateZhangfei Gao
Add hisi_clk_register_gate register clk gate table Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2014-05-12clk: hisi: use clk_register_mux_table in hisi_clk_register_muxZhangfei Gao
Platform hix5hd2 use mux table, so use clk_register_mux_table instead Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2014-03-20clk: hisilicon: fix warning from smatchZhangfei Gao
drivers/clk/hisilicon/clk-hi3620.c:338 mmc_clk_delay() warn: always true condition '(para >= 0) => (0-u32max >= 0)' Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-03-19Merge tag 'clk-hisi' of ↵Mike Turquette
https://git.kernel.org/pub/scm/linux/kernel/git/hzhuang1/linux into clk-next-hisilcon updating clock drivers for Hisilicon
2014-03-19clk: hisi: remove static variableHaojian Zhuang
Remove the static variable. So these common clock register helper could be used in more SoCs. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2014-03-19clk: hip04: add clock driverHaojian Zhuang
Now only fixed rate clocks are appended into the clock driver. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2014-03-19clk: hisi: assign missing clk to tableHaojian Zhuang
The fixed rate and fixed factor clock isn't registered to clk table. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2014-02-26clk: hisilicon: add hi3620_mmc_clksZhangfei Gao
Suggest by Arnd: abstract mmc tuning as clock behavior, also because different soc have different tuning method and registers. hi3620_mmc_clks is added to handle mmc clock specifically on hi3620. Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-12-11clk: hi3620: add gate clock flagHaojian Zhuang
Add missing CLK_SET_RATE_PARENT flag for gate clock. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2013-12-11clk: hi3620: fix wrong flags on dividerHaojian Zhuang
The flags on dividers should be CLK_DIVIDER_HIWORD_MASK, not CLK_MUX_HIWORD_MASK. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2013-12-04clk: hisilicon: add common clock supportHaojian Zhuang
Enable common clock driver of Hi3620 SoC. clkgate-seperated driver is used to support the clock gate that enable/disable/status registers are seperated. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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