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path: root/drivers/bus/brcmstb_gisb.c
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2020-09-06bus: brcmstb_gisb: Add support for breakpoint interruptsFlorian Fainelli
GISB breakpoint interrupts can be raised when a breakpoint has been enabled to match a specific master and/or GISB register address. Being able to print a message, similar to those done during target abort or timeout greatly helps debug systems. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-08-17bus: brcmstb_gisb: Shorten printsFlorian Fainelli
Do not print the full function name (brcmstb_gisb_arb_decode_addr) which is quite long, and reduces our chances to printing a full line, instead just use "GISB: " as a prefix for these prints. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-17Merge tag 'arm-soc/for-5.3/drivers' of https://github.com/Broadcom/stblinux ↵Olof Johansson
into arm/drivers This pull request contains Broadcom ARM/ARM64/MIPS SoCs drivers changes for 5.3, please pull the following: - Markus provides a set of updates to the DPFE driver to support a new revision of the API to the firmware (version 3) and provides minor fixes about how the MR4-8 words are read for LPDDR4 devices - Florian removes a print of a virtual address in brcmstb_gisb.c * tag 'arm-soc/for-5.3/drivers' of https://github.com/Broadcom/stblinux: memory: brcmstb: dpfe: introduce DPFE API v3 memory: brcmstb: dpfe: prepare for API-dependent sysfs attributes memory: brcmstb: dpfe: prepare support for multiple API versions memory: brcmstb: dpfe: wait for DCPU to be ready memory: brcmstb: dpfe: report firmware loading error memory: brcmstb: dpfe: remove unused code and fix formatting bus: brcmstb_gisb: Remove print of base address memory: brcmstb: dpfe: use byte 3 of registers MR4-MR8 memory: brcmstb: dpfe: optimize generic_show() memory: brcmstb: dpfe: use msleep() over udelay() Signed-off-by: Olof Johansson <olof@lixom.net>
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 655 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-20bus: brcmstb_gisb: Remove print of base addressFlorian Fainelli
Since commit ad67b74d2469 ("printk: hash addresses printed with %p") pointers are being hashed when printed. Displaying the virtual memory at bootup time is not helpful, especially given we use a dev_info() which already displays the platform device's address. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-11-05bus: brcmstb_gisb: simplify getting .driver_dataWolfram Sang
We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-05-13bus: brcmstb_gisb: update to support new revisionDoug Berger
The 7278 introduces a new version of this core. This commit adds support for that revision. Signed-off-by: Doug Berger <opendmb@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-05-13bus: brcmstb_gisb: remove low-level ARM hooksDoug Berger
The ARM architecture can provide meaningful diagnostic output from the GISB arbiter solely from interrupts and notifiers without the need to hook the low level fault handlers. Signed-off-by: Doug Berger <opendmb@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-05-13bus: brcmstb_gisb: add notifier handlingDoug Berger
Check for GISB arbitration errors through a chained notifier when a process dies or a kernel panic occurs. This allows a meaningful GISB diagnostic message to occur along with other diagnostic information from the event. Signed-off-by: Doug Berger <opendmb@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-05-13bus: brcmstb_gisb: correct support for 64-bit address outputDoug Berger
The GISB bus can support addresses beyond 32-bits. So this commit corrects support for reading a captured 64-bit address into a 64-bit variable by obtaining the high bits from the ARB_ERR_CAP_HI_ADDR register (when present) and then outputting the full 64-bit value. It also removes unused definitions. Fixes: 44127b771d9c ("bus: add Broadcom GISB bus arbiter timeout/error handler") Signed-off-by: Doug Berger <opendmb@gmail.com> Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-05-13bus: brcmstb_gisb: Use register offsets with writes tooDoug Berger
This commit corrects the bug introduced in commit f80835875d3d ("bus: brcmstb_gisb: Look up register offsets in a table") such that gisb_write() translates the register enumeration into an offset from the base address for writes as well as reads. Fixes: f80835875d3d ("bus: brcmstb_gisb: Look up register offsets in a table") Signed-off-by: Doug Berger <opendmb@gmail.com> Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-05-13BUS: brcmstb_gisb: Hook to MIPS board_be_handlerFlorian Fainelli
MIPS kernels allow platforms to invoke a custom Bus Error handler, add the necessary code to do this for Broadcom SoCs where the GISB bus error handler can be used. We may get a bus error from an address decoded outside of the GISB bus space, so we need to check the validity of such a capture before printing anything. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Cc: cernekee@gmail.com Cc: arnd@arndb.de Cc: jaedon.shin@gmail.com Cc: pgynther@google.com Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12284/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-05-28bus: brcmstb_gisb: Honor the "big-endian" and "native-endian" DT propertiesKevin Cernekee
On chips strapped for BE, we'll need to use ioread32be/iowrite32be instead of ioread32/iowrite32. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2014-12-14Merge tag 'driver-core-3.19-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core update from Greg KH: "Here's the set of driver core patches for 3.19-rc1. They are dominated by the removal of the .owner field in platform drivers. They touch a lot of files, but they are "simple" changes, just removing a line in a structure. Other than that, a few minor driver core and debugfs changes. There are some ath9k patches coming in through this tree that have been acked by the wireless maintainers as they relied on the debugfs changes. Everything has been in linux-next for a while" * tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (324 commits) Revert "ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries" fs: debugfs: add forward declaration for struct device type firmware class: Deletion of an unnecessary check before the function call "vunmap" firmware loader: fix hung task warning dump devcoredump: provide a one-way disable function device: Add dev_<level>_once variants ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries ath: use seq_file api for ath9k debugfs files debugfs: add helper function to create device related seq_file drivers/base: cacheinfo: remove noisy error boot message Revert "core: platform: add warning if driver has no owner" drivers: base: support cpu cache information interface to userspace via sysfs drivers: base: add cpu_device_create to support per-cpu devices topology: replace custom attribute macros with standard DEVICE_ATTR* cpumask: factor out show_cpumap into separate helper function driver core: Fix unbalanced device reference in drivers_probe driver core: fix race with userland in device_add() sysfs/kernfs: make read requests on pre-alloc files use the buffer. sysfs/kernfs: allow attributes to request write buffer be pre-allocated. fs: sysfs: return EGBIG on write if offset is larger than file size ...
2014-12-08Merge branch 'brcm/stb-smp-uart' into next/driversArnd Bergmann
This resolves a nonobvious merge conflict that I got wrong the first time. * brcm/stb-smp-uart: bus: brcmstb_gisb: save and restore GISB timeout bus: brcmstb_gisb: register the fault code hook ARM: brcmstb: Kconfig: drop unneeded symbol selections ARM: brcmstb: reintroduce SMP support ARM: brcmstb: add debug UART for earlyprintk support Conflicts: drivers/bus/brcmstb_gisb.c Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reported-by: Florian Fainelli <f.fainelli@gmail.com>
2014-12-04Merge tag 'arm-soc/for-3.19/brcmstb-drivers' of ↵Arnd Bergmann
https://github.com/brcm/linux into next/drivers This pull request contains the following changes to the Broadcom GISB bus arbiter from Kevin Cernekee: - Extend brcmstb GISB bus driver to work on MIPS (currently ARM-only) and support 65nm and 40nm MIPS-based chips such as: BCM7038, BCM7400 and BCM7435 * tag 'arm-soc/for-3.19/brcmstb-drivers' of https://github.com/brcm/linux: bus: brcmstb_gisb: Add register offset tables for older chips bus: brcmstb_gisb: Look up register offsets in a table bus: brcmstb_gisb: Introduce wrapper functions for MMIO accesses bus: brcmstb_gisb: Make the driver buildable on MIPS Conflicts: drivers/bus/brcmstb_gisb.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-28bus: brcmstb_gisb: Add register offset tables for older chipsKevin Cernekee
This will select the appropriate register layout based on the DT "compatible" string. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2014-11-28bus: brcmstb_gisb: Look up register offsets in a tableKevin Cernekee
There are at least 4 incompatible variations of this hardware block, so let's use the ARB_* constants as a table index instead of hardcoding specific register offsets. Also, allow for the possibility of adding old devices that are missing some of the registers. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2014-11-28bus: brcmstb_gisb: Introduce wrapper functions for MMIO accessesKevin Cernekee
These will be used to abstract out chip-to-chip differences. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2014-11-28bus: brcmstb_gisb: Make the driver buildable on MIPSKevin Cernekee
BCM7xxx ARM and MIPS platforms share a similar hardware block for reporting GISB errors, so they both benefit from the use of this driver. Conditionally compile the ARM-specific bus error handler so that the GISB error IRQ handler works on other architectures. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2014-11-21bus: brcmstb_gisb: resolve section mismatchFlorian Fainelli
Commit f1bee783dd37 moved the call to hook_fault_code in brcmstb_gisb_arb_probe() which now calls a function annotated with __init, so this one must also be annotated with __init. In order to avoid introducing another section mismatch, call platform_driver_probe() manually and remove the .probe assignment from brcmstb_gisb_arb_driver, this is very similar to what drivers/pci/host/pci-imx6.c does since we basically have the same constraints here. Fixes: f1bee783dd37 ("bus: brcmstb_gisb: register the fault code hook") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-10-20bus: brcmstb_gisb: save and restore GISB timeoutFlorian Fainelli
When the system enters S3, we will lose the GISB timeout value we have configured, make sure that we do save this timeout value, and restore this timeout value prior to re-enabling interrupts such that the GISB timeout interrupt will fire with the expected timeout. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2014-10-20bus: brcmstb_gisb: register the fault code hookFlorian Fainelli
Commit 44127b771d9c31 ("bus: add Broadcom GISB bus arbiter timeout/error handler") added everything that is required to register an ARM fault handler for imprecise external aborts, except that there is nothing calling this currently. We do not need to export that specific function and have to update arch/arm/mach-bcm/brcmstb.c to call it, simply, register the fault handler during the probe() function of the driver. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2014-10-20bus: drop owner assignment from platform_driversWolfram Sang
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-06-19devres: remove devm_request_and_ioremap()Jingoo Han
devm_request_and_ioremap() was obsoleted by the commit 7509657 ("lib: devres: Introduce devm_ioremap_resource()") and has been deprecated for a long time. So, let's remove this function. In addition, all usages of devm_request_and_ioremap() are also removed. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-05-24bus: add Broadcom GISB bus arbiter timeout/error handlerFlorian Fainelli
This patch adds support for the Broadcom GISB arbiter bus timeout/error handler. GISB is a proprietary bus used by Broadcom Set Top Box System-on-a-chip devices (BCM7xxx) which allows multiple masters and clients to be interfaced with each other. The bus arbiter offers support for generating two interrupts towards the host CPU, thus allowing us to "catch" clock gated masters, or masters being volontarily blocked for powersaving purposes, or do general system troubleshooting. We also register a hook with the ARM fault exception handling to allow printing a more informative message than "imprecise external abort at 0x00000000" for instance. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>