summaryrefslogtreecommitdiff
path: root/drivers/base/regmap/regmap-irq.c
AgeCommit message (Collapse)Author
2019-04-25Merge branch 'regmap-5.2' into regmap-nextMark Brown
2019-04-25Merge branch 'regmap-5.1' into regmap-linusMark Brown
2019-04-25regmap: add proper SPDX identifiers on files that did not have them.Greg Kroah-Hartman
There were a few files in the regmap code that did not have SPDX identifiers on them, so fix that up. At the same time, remove the "free form" text that specified the license of the file, as that is impossible for any tool to properly parse. Also, as Mark loves // comment markers, convert all of the headers to be the same to make things look consistent :) Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-04-01regmap: regmap-irq: fix getting type default valuesSrinivas Kandagatla
Checking for value of type default value just after allocating will always be zero and the type register default values will never be read, so fix this! Without this patch setting irq type will be silently ignored. Patch "regmap: regmap-irq: Remove default irq type setting from core" did remove the default mask but it forgot to remove the check before reading the default type register. Fixes: 84267d1b18ab ("regmap: regmap-irq: Remove default irq type setting from core") Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-01-29Merge remote-tracking branch 'regmap/topic/irq' into regmap-nextMark Brown
2019-01-23regmap: regmap-irq: Add main status register supportMatti Vaittinen
There is bunch of devices with multiple logical blocks which can generate interrupts. It's not a rare case that the interrupt reason registers are arranged so that there is own status/ack/mask register for each logical block. In some devices there is also a 'main interrupt register(s)' which can indicate what sub blocks have interrupts pending. When such a device is connected via slow bus like i2c the main part of interrupt handling latency can be caused by bus accesses. On systems where it is expected that only one (or few) sub blocks have active interrupts we can reduce the latency by only reading the main register and those sub registers which have active interrupts. Support this with regmap-irq for simple cases where main register does not require acking or masking. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-01-14regmap-irq: do not write mask register if mask_base is zeroMark Zhang
If client have not provided the mask base register then do not write into the mask register. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com> Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com> Signed-off-by: Mark Zhang <markz@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-12-31regmap: regmap-irq: silently ignore unsupported type settingsMatti Vaittinen
Do not return error if irq-type setting is requested for controlloer which does not support this. This is how regmap-irq has previously handled the undupported type settings and existing drivers seem to be upset if failure is now reported. Fixes: 1c2928e3e321 ("regmap: regmap-irq/gpio-max77620: add level-irq support") Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-12-19regmap: irq: add an option to clear status registers on unmaskBartosz Golaszewski
Some interrupt controllers whose interrupts are acked on read will set the status bits for masked interrupts without changing the state of the IRQ line. Some chips have an additional "feature" where if those set bits are not cleared before unmasking their respective interrupts, the IRQ line will change the state and we'll interpret this as an interrupt although it actually fired when it was masked. Add a new field to the irq chip struct that tells the regmap irq chip code to always clear the status registers before actually changing the irq mask values. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-12-19regmap: regmap-irq/gpio-max77620: add level-irq supportMatti Vaittinen
Add level active IRQ support to regmap-irq irqchip. Change breaks existing regmap-irq type setting. Convert the existing drivers which use regmap-irq with trigger type setting (gpio-max77620) to work with this new approach. So we do not magically support level-active IRQs on gpio-max77620 - but add support to the regmap-irq for chips which support them =) We do not support distinguishing situation where HW supports rising and falling edge detection but not both. Separating this would require inventing yet another flags for IRQ types. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-12-19regmap: regmap-irq: Remove default irq type setting from coreMatti Vaittinen
The common code should not set IRQ type. Read HW defaults to the cache at startup instead of forcing type to EDGE_BOTH. If default setting is needed this should be done via normal mechanisms or by chip specific code if normal mechanisms are not suitable for some reason. Common regmap-irq code should not have defaults hard-coded but keep the HW/boot defaults untouched. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-12-13regmap: irq: handle HW using separate rising/falling edge interruptsBartosz Golaszewski
Some interrupt controllers use separate bits for controlling rising and falling edge interrupts in the mask register i.e. they have one interrupt for rising edge and one for falling. We already handle the case where we have a single interrupt in the mask register and a separate type configuration register. Add a new switch to regmap_irq_chip which tells the framework to use the mask_base address for configuring the edge of the interrupts that define type_falling/rising_mask values. For such interrupts we never update the type_base bits. For interrupts that don't define type masks or their regmap irq chip doesn't set the type_in_mask to true everything stays the same. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-06-28regmap: irq: add chip option mask_writeonlyMichael Grzeschik
Some irq controllers have writeonly/multipurpose register layouts. In those cases we read invalid data back. Here we add the option mask_writeonly as masking option. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-06-09regmap: irq: allow to register one cell interrupt controllersVladimir Zapolskiy
The change makes possible to use regmap-irq interface within drivers of simple interrupt controllers, which don't have an option to handle different interrupt types and thus have one cell interrupt controllers described in device tree bindings. Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-01-12regmap: Fixup the kernel-doc comments on functions/structuresCharles Keepax
Most of the kernel-doc comments in regmap don't actually generate correctly. This patch fixes up a few common issues, corrects some typos and adds some missing argument descriptions. The most common issues being using a : after the function name which causes the short description to not render correctly and not separating the long and short descriptions of the function. There are quite a few instances of arguments not being described or given the wrong name as well. This patch doesn't fixup functions/structures that are currently missing descriptions. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-03regmap: irq: Add support to call client specific pre/post interrupt serviceLaxman Dewangan
Regmap irq implements the generic interrupt service routine which is common for most of devices. Some devices, like MAX77620, MAX20024 needs the special handling before and after servicing the interrupt as generic. For the example, MAX77620 programming guidelines for interrupt servicing says: 1. When interrupt occurs from PMIC, mask the PMIC interrupt by setting GLBLM. 2. Read IRQTOP and service the interrupt accordingly. 3. Once all interrupts has been checked and serviced, the interrupt service routine un-masks the hardware interrupt line by clearing GLBLM. The step (2) is implemented in regmap irq as generic routine. For step (1) and (3), add callbacks from regmap irq to client driver to handle chip specific configurations. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-02-29regmap: irq: Enable irq retriggering for nested irqsGrygorii Strashko
When nested interrupts are handled with regmap irq framework, we need to mark the interrupts to be resend for pending interrupts on enable_irq. Else the events might be lost for nested irqs. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-02-15regmap: irq: add devm apis for regmap_{add,del}_irq_chipLaxman Dewangan
Add device managed APIs for regmap_add_irq_chip() and regmap_del_irq_chip() so that it can be managed by device framework for freeing it. This helps on following: 1. Maintaining the sequence of resource allocation and deallocation regmap_add_irq_chip(&d); devm_requested_threaded_irq(virq) On free path: regmap_del_irq_chip(d); and then removing the irq registration. On this case, regmap irq is deleted before the irq is free. This force to use normal irq registration. By using devm apis, the sequence can be maintain properly: devm_regmap_add_irq_chip(&d); devm_requested_threaded_irq(virq); and resource deallocation will be done in reverse order by device framework. 2. No need to delete the regmap_irq_chip in error path or remove callback and hence there is less code on this path. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-02-09regmap: irq: dispose all virtual irq before removing domainLaxman Dewangan
It is require to dispose all virtual irq of hwirq on chip created on given irq domain before removing this irq domain. Hence dispose all mapped irqs before deleting the irq domains in regmap_del_irq_chip(); Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-01-05Merge remote-tracking branches 'regmap/topic/64bit' and ↵Mark Brown
'regmap/topic/irq-type' into regmap-next
2016-01-05regmap: irq: add support for configuration of trigger typeLaxman Dewangan
Some of devices supports the trigger level for interrupt like rising/falling edge specially for GPIOs. The interrupt support of such devices may have uses the generic regmap irq framework for implementation. Add support to configure the trigger type device interrupt register via regmap-irq framework. The regmap-irq framework configures the trigger register only if the details of trigger type registers are provided. [Fixed use of terery operator for legibility -- broonie] Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-20regmap: replace kmalloc with kmalloc_arraylixiubo
Replace kmalloc with specialized function kmalloc_array when the size is a multiplication of : number * size Signed-off-by: lixiubo <lixiubo@cmss.chinamobile.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-20regmap: replace kzalloc with kcalloclixiubo
Replace kzalloc with specialized function kcalloc when the size is a multiplication of : number * sizeof Signed-off-by: lixiubo <lixiubo@cmss.chinamobile.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-09-17regmap: irq: add ack_invert flag for chips using cleared bits as ackGuo Zeng
An user will be CSR SiRFSoC ARM chips. Signed-off-by: Guo Zeng <Guo.Zeng@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-09-17regmap: irq: add support for chips who have separate unmask registersGuo Zeng
Some chips have separate unmask registers from mask registers for some consideration of concurrency SMP write performance. And this patch adds a flag for it. An user will be CSR SiRFSoC ARM chips. Signed-off-by: Guo Zeng <Guo.Zeng@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-21regmap: Split use_single_rw internally into use_single_read/writeMarkus Pargmann
use_single_rw currently reflects the capabilities of the connected device. The capabilities of the bus are currently missing for this variable. As there are read only and write only buses we need seperate values for use_single_rw to also reflect tha capabilities of the bus. This patch splits use_single_rw into use_single_read and use_single_write. The initialization is changed to check the configuration for use_single_rw and to check the capabilities of the used bus. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-06-09regmap: kill off set_irq_flags usageRob Herring
set_irq_flags is ARM specific with custom flags which have genirq equivalents. Convert drivers to use the genirq interfaces directly, so we can kill off set_irq_flags. The translation of flags is as follows: IRQF_VALID -> !IRQ_NOREQUEST IRQF_PROBE -> !IRQ_NOPROBE IRQF_NOAUTOEN -> IRQ_NOAUTOEN For IRQs managed by an irqdomain, the irqdomain core code handles clearing and setting IRQ_NOREQUEST already, so there is no need to do this in .map() functions and we can simply remove the set_irq_flags calls. Some users also set IRQ_NOPROBE and this has been maintained although it is not clear that is really needed. There appears to be a great deal of blind copy and paste of this code. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-06-02regmap: irq: Fixed a typo errordashsriram
Fixed a typo error in the file Signed-off-by: Sriram Dash <dash.sriram@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-27regmap: Constify irq_domain_opsKrzysztof Kozlowski
The irq_domain_ops are not modified by the driver and the irqdomain core code accepts pointer to a const data. Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-02-14regmap-irq: set IRQF_ONESHOT flag to ensure IRQ requestValentin Rothberg
Since commit 1c6c69525b40eb76de8adf039409722015927dc3 ("genirq: Reject bogus threaded irq requests") threaded IRQs without a primary handler need to be requested with IRQF_ONESHOT, otherwise the request will fail. The %irq_flags flag is used to request the threaded IRQ and is also a parameter of the caller. Hence, we cannot be sure that IRQF_ONESHOT is set. This change avoids the potentially missing flag by setting IRQF_ONESHOT when requesting the threaded IRQ. Generated by: scripts/coccinelle/misc/irqf_oneshot.cocci Signed-off-by: Valentin Rothberg <Valentin.Rothberg@lip6.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
2014-05-26regmap: irq: Fix possible ZERO_SIZE_PTR pointer dereferencing error.Xiubo Li
Since we cannot make sure the 'chip->num_regs' will always be none zero from the users, and then if 'chip->num_regs' equals to zero by mistake or other reasons, the kzalloc() will return ZERO_SIZE_PTR, which equals to ((void *)16). So this patch fix this with just checking the 'chip->num_regs' before calling kzalloc(). This also sorts the header files in alphabetical order at the same time. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-13regmap: irq: Set data pointer only on regmap_add_irq_chip successKrzysztof Kozlowski
After setting the 'data' pointer (wchich is returned to the caller for freeing later) the regmap_add_irq_chip() could still fail for various reasons (ENOMEM, regmap_read or regmap_write failure). In such case the memory under 'data' was freed in error path and error value was returned but the 'data' variable was not changed. This could lead to errors if the caller passed such 'data' to regmap_del_irq_chip(). The 'data' pointer should be changed atomically from the caller perspective - set it only on regmap_add_irq_chip() success. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03regmap: irq: Remove domain on exitMark Brown
irqdomain now supports removal of domains on exit so we can properly clean up on deletion of a regmap irqchip. Signed-off-by: Mark Brown <broonie@linaro.org>
2013-12-16regmap: irq: Allow using zero value for ack_baseAlexander Shiyan
In some cases, clear interrupt register may be at address 0. This patch allows to use such configurations by adding additional configuration bit to indicate this. [With doc fix from Levente Kurusa <levex@linux.com> -- broonie] Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-10-22regmap: irq: clear status when disable irqYi Zhang
clear the status bit if the mask register doesn't prevent the chip level irq from being asserted OR in the following sequence, there will be irq storm happens: 1) interrupt is triggered; 2) another thread disables it(the mask bit is set); 3) _Then_ the interrupt thread is not ACKed(the status bit is not cleared), and it's ignored; 4) if the irq is still asserted because of the uncleared status bit, the irq storm happens; Signed-off-by: Yi Zhang <yizhang@marvell.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-07-23regmap: irq: Allow to acknowledge masked interrupts during initializationPhilipp Zabel
In case the hardware interrupt mask register does not prevent the chip level irq from being asserted by the corresponding interrupt status bit, already set interrupt bits should to be cleared once after masking them during initialization. Add a flag to let drivers enable this behavior. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-03-19regmap: irq: Clarify error message when we fail to request primary IRQMark Brown
Display the name for the chip rather than just the primary IRQ so it is clearer what exactly has failed. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-03-01regmap: irq: call pm_runtime_put in pm_runtime_get_sync failed caseLi Fei
Even in failed case of pm_runtime_get_sync, the usage_count is incremented. In order to keep the usage_count with correct value and runtime power management to behave correctly, call pm_runtime_put(_sync) in such case. Signed-off-by Liu Chuansheng <chuansheng.liu@intel.com> Signed-off-by: Li Fei <fei.li@intel.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-01-04regmap: irq: Support wake IRQ mask inversionMark Brown
Support devices which have an enable rather than mask register for wake sources. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-01-04regmap: irq: Fix sync of wake statuses to hardwareMark Brown
This wasn't implemented but happened to work on test systems due to lack of wake mask inversion support. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-01-04regmap: irq: Use a bulk read for interrupt status where possibleMark Brown
If the interrupt status registers are a single block of registers and the chip supports bulk reads then do a single bulk read rather than pay the extra I/O cost. This restores the original behaviour which was lost when support for register striding was added. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-01-03regmap: irq: Factor register read out of the IRQ parsing loopMark Brown
In preparation for adding back support for block reads. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-12-24regmap: irq: enable wake support by defaultLaxman Dewangan
regmap-irq framework is used vastly by mfd drivers and some of devices like TPS65910, TPS80036 do not support the wake base register to enable wake. Currently wake in regmap-irq only supported if client driver passes the wake base register. As the regmap-irq is mostly used by mfd devices and it is require to have wake support from these devices in most of use cases, enabling wake support by default in regmap-irq. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-10-15regmap: irq: Allow users to retrieve the irq_domainMark Brown
This is useful for integration with other subsystems, especially MFD, and provides an alternative API for users that request their own IRQs. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-09-09regmap: no need primary handler for nested irqYunfan Zhang
The primary handler will NOT be called if the interrupt nests into another interrupt thread. Remove it to avoid confusing. Signed-off-by: Yunfan Zhang <yfzhang@marvell.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-08-30regmap: irq: Add mask invert flag for enable registerXiaofan Tian
Currently, regmap will write 1 to mask_base to mask an interrupt and write 0 to unmask it. But some chips do not have an interrupt mask register, and only have interrupt enable register. Then we should write 0 to disable interrupt and 1 to enable. So add an mask_invert flag to handle this. If it is not set, behavior is same as previous. If set it to 1, the mask value will be inverted before written to mask_base Signed-off-by: Xiaofan Tian <tianxf@marvell.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-08-07regmap: irq: Enable devices for runtime PM while handling interruptsMark Brown
Some devices need to have a runtime PM reference while handling interrupts to ensure that the register I/O is available. Support this with a flag in the chip. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-08-04regmap: irq: initialize all irqs to wake disabledStephen Warren
The kerneldoc for irq_set_irq_wake() says: Enable/disable power management wakeup mode, which is disabled by default. regmap_irq_set_wake() clears bits to enable wake for an interrupt, and sets bits to disable wake. Hence, we should set all bits in wake_buf initially, to mirror the expected disabled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-08-04regmap: set MASK_ON_SUSPEND/SKIP_SET_WAKE if no wake_baseStephen Warren
If a regmap-irq chip has no wake base: * There's no point calling .irq_set_wake, hence IRQCHIP_SKIP_SET_WAKE. * If some IRQs in the chip are enabled for wake and some aren't, we should mask those interrupts that are not wake enabled, so that if they occur during suspend, the system is not awoken. Hence, IRQCHIP_MASK_ON_SUSPEND. Note that IRQCHIP_MASK_ON_SUSPEND is handled by check_wakeup_irqs(), which always iterates over every single interrupt in the system, irrespective of whether an interrupt is a child of a controller whose output interrupt has no wake-enabled inputs and hence is presumably masked itself. Hence this change might cause interrupt unnecessary masking operations and associated register I/O. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-08-04regmap: name irq_chip based on regmap_irq_chip's nameStephen Warren
This is intended to give each irq_chip a useful name, rather than hard- coding them all as "regmap". Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>