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2019-05-21treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 18Thomas Gleixner
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program see the file copying if not write to the free software foundation 675 mass ave cambridge ma 02139 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 52 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154042.342335923@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-02-28ata: libahci: Only warn for AHCI_HFLAG_MULTI_MSI set when genuine custom irq ↵John Garry
handler implemented For an AHCI controller with AHCI_HFLAG_MULTI_MSI flag set, we may get the following log, regardless of whether a custom irq handler was implemented or not: [ 14.700238] ahci 0000:74:03.0: both AHCI_HFLAG_MULTI_MSI flag set and custom irq handler implemented This is because we can set hpriv->irq_handler to ahci_single_level_irq_intr() if not already set, in ahci_init_one()->ahci_pci_save_initial_config()->ahci_save_initial_config(). Stop having this warn being misleading by adding a check for hpriv->irq_handler != ahci_single_level_irq_intr. Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-08-24Merge branch 'for-4.19' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata Pull libata updates from Tejun Heo: "Nothing too interesting. Mostly ahci and ahci_platform changes, many around power management" * 'for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: (22 commits) ata: ahci_platform: enable to get and control reset ata: libahci_platform: add reset control support ata: add an extra argument to ahci_platform_get_resources() ata: sata_rcar: Add r8a77965 support ata: sata_rcar: exclude setting of PHY registers in Gen3 ata: sata_rcar: really mask all interrupts on Gen2 and later Revert "ata: ahci_platform: allow disabling of hotplug to save power" ata: libahci: Allow reconfigure of DEVSLP register ata: libahci: Correct setting of DEVSLP register ata: ahci: Enable DEVSLP by default on x86 with SLP_S0 ata: ahci: Support state with min power but Partial low power state Revert "ata: ahci_platform: convert kcalloc to devm_kcalloc" ata: sata_rcar: Add rudimentary Runtime PM support ata: sata_rcar: Provide a short-hand for &pdev->dev ata: Only output sg element mapped number in verbose debug ata: Guard ata_scsi_dump_cdb() by ATA_VERBOSE_DEBUG ata: ahci_platform: convert kcalloc to devm_kcalloc ata: ahci_platform: convert kzallloc to kcalloc ata: ahci_platform: correct parameter documentation for ahci_platform_shutdown libata: remove ata_sff_data_xfer_noirq() ...
2018-07-30ata: libahci: Allow reconfigure of DEVSLP registerSrinivas Pandruvada
There are two modes in which DEVSLP can be entered. The OS initiated or hardware autonomous. In hardware autonomous mode, BIOS configures the AHCI controller and the device to enable DEVSLP. But they may not be ideal for all cases. So in this case, OS should be able to reconfigure DEVSLP register. Currently if the DEVSLP is already enabled, we can't set again as it will simply return. There are some systems where the firmware is setting high DITO by default, in this case we can't modify here to correct settings. With the default in several seconds, we are not able to transition to DEVSLP. This change will allow reconfiguration of devslp register if DITO is different. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2018-07-30ata: libahci: Correct setting of DEVSLP registerSrinivas Pandruvada
We have seen that on some platforms, SATA device never show any DEVSLP residency. This prevent power gating of SATA IP, which prevent system to transition to low power mode in systems with SLP_S0 aka modern standby systems. The PHY logic is off only in DEVSLP not in slumber. Reference: https://www.intel.com/content/dam/www/public/us/en/documents/datasheets /332995-skylake-i-o-platform-datasheet-volume-1.pdf Section 28.7.6.1 Here driver is trying to do read-modify-write the devslp register. But not resetting the bits for which this driver will modify values (DITO, MDAT and DETO). So simply reset those bits before updating to new values. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2018-07-30ata: ahci: Support state with min power but Partial low power stateSrinivas Pandruvada
Currently when min_power policy is selected, the partial low power state is not entered and link will try aggressively enter to only slumber state. Add a new policy which still enable DEVSLP but also try to enter partial low power state. This policy is presented as "min_power_with_partial". For information the difference between partial and slumber Partial – PHY logic is powered up, and in a reduced power state. The link PM exit latency to active state maximum is 10 ns. Slumber – PHY logic is powered up, and in a reduced power state. The link PM exit latency to active state maximum is 10 ms. Devslp – PHY logic is powered down. The link PM exit latency from this state to active state maximum is 20 ms, unless otherwise specified by DETO. Suggested-and-reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2018-06-18libahci: Fix possible Spectre-v1 pmp indexing in ahci_led_store()John Garry
Currently smatch warns of possible Spectre-V1 issue in ahci_led_store(): drivers/ata/libahci.c:1150 ahci_led_store() warn: potential spectre issue 'pp->em_priv' (local cap) Userspace controls @pmp from following callchain: em_message->store() ->ata_scsi_em_message_store() -->ap->ops->em_store() --->ahci_led_store() After the mask+shift @pmp is effectively an 8b value, which is used to index into an array of length 8, so sanitize the array index. Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2018-06-18ata: ahci: rpm_put port on port_stop to match rpm_get in port_startSamuel Morris
This change balances out the final ahci_port_resume in port_start to ensure reference counts are correct after port stop. Signed-off-by: Samuel Morris <samorris@lexmark.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2018-06-05Merge branch 'for-4.18' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata Pull libata updates from Tejun Heo: - libata has always been limiting the maximum queue depth to 31, with one entry set aside mostly for historical reasons. This didn't use to make much difference but Jens found out that modern hard drives can actually perform measurably better with the extra one queue depth. Jens updated libata core so that it can make use of full 32 queue depth - Damien updated command retry logic in error handling so that it doesn't unnecessarily retry when upper layer (SCSI) is gonna handle them - A couple misc changes * 'for-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: sata_fsl: use the right type for tag bitshift ahci: enable full queue depth of 32 libata: don't clamp queue depth to ATA_MAX_QUEUE - 1 libata: add extra internal command sata_nv: set host can_queue count appropriately libata: remove assumption that ATA_MAX_QUEUE - 1 is the max libata: use ata_tag_internal() consistently libata: bump ->qc_active to a 64-bit type libata: convert core and drivers to ->hw_tag usage libata: introduce notion of separate hardware tags libata: Fix command retry decision libata: Honor RQF_QUIET flag libata: Make ata_dev_set_mode() less verbose libata: Fix ata_err_string() libata: Fix comment typo in ata_eh_analyze_tf() sata_nv: don't use block layer bounce buffer ata: hpt37x: Convert to use match_string() helper
2018-05-11libata: convert core and drivers to ->hw_tag usageJens Axboe
Anything that goes to the hardware should use ->hw_tag, anything related to internal lookup should be using ->tag. Signed-off-by: Jens Axboe <axboe@kernel.dk> Signed-off-by: Tejun Heo <tj@kernel.org>
2018-04-26libahci: Allow drivers to override stop_engineEvan Wang
Marvell armada37xx, armada7k and armada8k share the same AHCI sata controller IP, and currently there is an issue (Errata Ref#226)that the SATA can not be detected via SATA Port-MultiPlayer(PMP). After debugging, the reason is found that the value of Port-x FIS-based Switching Control (PxFBS@0x40) became wrong. According to design, the bits[11:8, 0] of register PxFBS are cleared when Port Command and Status (0x18) bit[0] changes its value from 1 to 0, i.e. falling edge of Port Command and Status bit[0] sends PULSE that resets PxFBS bits[11:8; 0]. So it needs save the port PxFBS register before PxCMD ST write and restore the port PxFBS register afterwards in ahci_stop_engine(). This commit allows drivers to override ahci_stop_engine behavior for use by the Marvell AHCI driver(and potentially other drivers in the future). Signed-off-by: Evan Wang <xswang@marvell.com> Cc: Ofer Heifetz <oferh@marvell.com> Cc: Tejun Heo <tj@kernel.org> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2018-02-12ahci: Add check for device presence (PCIe hot unplug) in ahci_stop_engine()Stefan Roese
Exit directly with ENODEV, if the AHCI controller is not available anymore. Otherwise a delay of 500ms for each port is added to the remove function while trying to issue a command on the non-existent controller. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tejun Heo <tj@kernel.org> Signed-off-by: Tejun Heo <tj@kernel.org>
2017-10-19ahci: Convert timers to use timer_setup()Kees Cook
In preparation for unconditionally passing the struct timer_list pointer to all timer callbacks, switch to using the new timer_setup() and from_timer() to pass the timer pointer explicitly. Adds a pointer back to link structure. Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Tejun Heo <tj@kernel.org> Cc: linux-ide@vger.kernel.org Link: https://lkml.kernel.org/r/20171016215658.GA101965@beast
2017-06-22libata: Add the AHCI_HFLAG_NO_WRITE_TO_RO flagDoug Berger
While most hardware will simply ignore a write to a read-only register, some hardware will signal an abort if this occurs. This commit introduces the flag AHCI_HFLAG_NO_WRITE_TO_RO to prevent the AHCI library from attempting to write to the HOST_CAP, HOST_CAP2, and HOST_PORTS_IMPL registers which may be read-only. Signed-off-by: Doug Berger <opendmb@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2017-06-22libata: Add the AHCI_HFLAG_YES_ALPM flagDoug Berger
Some hardware is capable of supporting Aggresive Link Power Management even though it is not indicated by the Host Capability register. This commit adds the AHCI_HFLAG_YES_ALPM flag to the AHCI library to allow indication of this quirk when the Host Capability register is Read Only and therefore cannot be changed. Signed-off-by: Doug Berger <opendmb@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2017-06-12libahci: wrong comments in ahci_do_softreset()Minwoo Im
AHCI 1.3.1 Spec says that software shall build two H2D register FISes in the command list to send a software reset. The comments in ahci_do_softreset() is currently D2H instead of H2D. Signed-off-by: Minwoo Im <dn3108@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2017-05-16ata: update references for libata documentationMauro Carvalho Chehab
The libata documentation is now using ReST. Update references to it to point to the new place. Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com> Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2017-01-31sata: ahci: export ahci_do_hardreset() locallyBartosz Golaszewski
We need a way to retrieve the information about the online state of the link in the ahci-da850 driver. Create a new function: ahci_do_hardreset() which is called from ahci_hardreset() for backwards compatibility, but has an additional argument: 'online' - which can be used to check if the link is online after this function returns. The new routine will be used in the ahci-da850 driver to avoid code duplication when implementing a workaround for tha da850 SATA controller quirk/instability. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Acked-by: Tejun Heo <tj@kernel.org> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2016-10-19ata: ATA Command Priority Disabled By DefaultAdam Manzanares
Add a sysfs entry to turn on priority information being passed to a ATA device. By default this feature is turned off. This patch depends on ata: Enabling ATA Command Priorities tj: Renamed ncq_prio_on to ncq_prio_enable and removed trivial ata_ncq_prio_on() and open-coded the test. Signed-off-by: Adam Manzanares <adam.manzanares@hgst.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2016-09-06ahci: use pci_alloc_irq_vectorsChristoph Hellwig
Use the new pci_alloc_irq_vectors API to allocate MSI-X and MSI vectors. The big advantage over the old code is that we can use the same API for MSI and MSI-X, and that we don't need to store the MSI-X vector mapping in driver-private data structures. This first conversion keeps the probe order as-is: MSI-X multi vector, MSI multi vector, MSI single vector, MSI-X single vector and last a single least legacy interrupt line. There is one small change of behavior: we now check the "MSI Revert to Single Message" flag for MSI-X in addition to MSI. Because the API to find the Linux IRQ number for a MSI/MSI-X vector is PCI specific, but libahaci is bus-agnostic I had to a get_irq_vector function pointer to struct ahci_host_priv. The alternative would be to move the multi-vector case of ahci_host_activate to ahci.c and just call ata_host_activate directly from the others users of ahci_host_activate. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Tejun Heo <tj@kernel.org>
2016-09-06Merge branch 'master' into for-4.9Tejun Heo
2016-08-11ahci: disable correct irq for dummy portsChristoph Hellwig
irq already contains the interrupt number for the port, don't add the port index to it. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Tejun Heo <tj@kernel.org> Fixes: d684a90d38e2 ("ahci: per-port msix support") Cc: stable@vger.kernel.org v4.5+
2016-08-11ahci: also use a per-port lock for the multi-MSIX caseChristoph Hellwig
Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Tejun Heo <tj@kernel.org>
2016-07-20AHCI: Clear GHC.IS to prevent unexpectly asserting INTxPang Raymond
Due to PCI subsystem behaviour, unloading AHCI driver will disable MSI and enable INTx. When HBA supports MSIx or Multiple MSI, Driver's irq handler doesn't clear GHC.IS register. It works well when reading or writing data and GHC.IS is always non-zero. But when unloading driver (or any other operation which causes disable MSIx and enable INTx), PCI subsystem uses config write(Rx04.bit10) to enable INTx. Because GHC.IS is non-zero, HBA will falsely assume some port needs interrupt service. Then it asserts INTx. To make things worse, when AHCI controller shares the same interrupt pin with other PCI device, that PCI device's ISR will be called and nobody de-asserts previous INTx. This patch clears GHC.IS in ahci_port_stop() even when using MSIx or MMSI to prevent this case. It ensures GHC.IS is zero before PCI subsystem enables INTx. tj: Minor updates to the comment. Signed-off-by: Raymond Pang <raymond_rule@hotmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2016-07-14libata: use ata_is_ncq() accessorsHannes Reinecke
Use accessor functions instead of the raw value. Signed-off-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Tejun Heo <tj@kernel.org>
2016-05-13Merge branch 'for-4.6-fixes' into for-4.7Tejun Heo
2016-04-01libahci: save port map for forced port mapSrinivas Kandagatla
In usecases where force_port_map is used saved_port_map is never set, resulting in not programming the PORTS_IMPL register as part of initial config. This patch fixes this by setting it to port_map even in case where force_port_map is used, making it more inline with other parts of the code. Fixes: 566d1827df2e ("libata: disable forced PORTS_IMPL for >= AHCI 1.3") Cc: stable@vger.kernel.org # v4.5+ Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Acked-by: Tejun Heo <tj@kernel.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Tejun Heo <tj@kernel.org>
2016-03-30libata: Fixup awkward whitespace in warning by removing line continuation.Sander Eikelenboom
Signed-off-by: Sander Eikelenboom <linux@eikelenboom.it> Signed-off-by: Tejun Heo <tj@kernel.org>
2016-03-11Merge branch 'for-4.5-fixes' into for-4.6Tejun Heo
2016-02-29ata: ahci: don't mark HotPlugCapable Ports as external/removableManuel Lauss
The HPCP bit is set by bioses for on-board sata ports either because they think sata is hotplug capable in general or to allow Windows to display a "device eject" icon on ports which are routed to an external connector bracket. However in Redhat Bugzilla #1310682, users report that with kernel 4.4, where this bit test first appeared, a lot of partitions on sata drives are now mounted automatically. This patch should fix redhat and a lot of other distros which unconditionally automount all devices which have the "removable" bit set. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org> Fixes: 8a3e33cf92c7 ("ata: ahci: find eSATA ports and flag them as removable" changes userspace behavior) Link: http://lkml.kernel.org/g/56CF35FA.1070500@redhat.com Cc: stable@vger.kernel.org #v4.4+
2016-02-19ahci: Add functions to manage runtime PM of AHCI portsMika Westerberg
Add new functions ahci_rpm_get_port()/ahci_rpm_put_port() that change runtime PM status of AHCI ports. Depending if the AHCI host has runtime PM enabled or disabled calling these may trigger runtime suspend/resume of the host controller. We also call these functions in appropriate places to make sure host controller registers are available before using them. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2016-02-19ahci: Cache host controller versionMika Westerberg
This allows sysfs nodes to read the cached value directly instead of powering up possibly runtime suspended controller. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2016-02-11ata: Remove the AHCI_HFLAG_EDGE_IRQ support from libahci.Suman Tripathi
The flexibility to override the irq handles in the LLD's are already present, so controllers implementing a edge trigger latch can implement their own interrupt handler inside the driver. This patch removes the AHCI_HFLAG_EDGE_IRQ support from libahci and moves edge irq handling to ahci_xgene. tj: Minor update to description. Signed-off-by: Suman Tripathi <stripathi@apm.com> Signed-off-by: Tejun Heo <tj@kenrel.org>
2016-02-11libahci: Implement the capability to override the generic ahci interrupt ↵Suman Tripathi
handler. This patch implements the capability to override the generic AHCI interrupt handler so that specific ahci drivers can implement their own custom interrupt handler routines. It also exports ahci_handle_port_intr so that custom irq_handler implementations can use it. tj: s/ahci_irq_handler/irq_handler/ and updated description. Signed-off-by: Suman Tripathi <stripathi@apm.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2016-01-25libata: disable forced PORTS_IMPL for >= AHCI 1.3Tejun Heo
Some early controllers incorrectly reported zero ports in PORTS_IMPL register and the ahci driver fabricates PORTS_IMPL from the number of ports in those cases. This hasn't mattered but with the new nvme controllers there are cases where zero PORTS_IMPL is valid and should be honored. Disable the workaround for >= AHCI 1.3. Signed-off-by: Tejun Heo <tj@kernel.org> Reported-by: Andy Lutomirski <luto@amacapital.net> Link: http://lkml.kernel.org/g/CALCETrU7yMvXEDhjAUShoHEhDwifJGapdw--BKxsP0jmjKGmRw@mail.gmail.com Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Cc: stable@vger.kernel.org
2016-01-25drivers: ata: wake port before DMA stop for ALPMDanesh Petigara
The AHCI driver code stops and starts port DMA engines at will without considering the power state of the particular port. The AHCI specification isn't very clear on how to handle this scenario, leaving implementation open to interpretation. Broadcom's STB SATA host controller is unable to handle port DMA controller restarts when the port in question is in low power mode. When a port enters partial or slumber mode, its PHY is powered down. When a controller restart is requested, the controller's internal state machine expects the PHY to be brought back up by software which never happens in this case, resulting in failures. To avoid this situation, logic is added to manually wake up the port just before its DMA engine is stopped, if the port happens to be in a low power state. HBA initiated power management ensures that the port eventually returns to its configured low power state, when the link is idle (as per the conditions listed in the spec). A new host flag is also added to ensure this logic is only exercised for hosts with the above limitation. tj: Formatting changes. Signed-off-by: Danesh Petigara <dpetigara@broadcom.com> Reviewed-by: Markus Mayer <mmayer@broadcom.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2016-01-11Merge branch 'for-4.5' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata Pull libata updates from Tejun Heo: "Mostly low level driver specific changes. Two changes are somewhat noteworthy. First, Dan's patchset to support per-port msix interrupt handling for ahci, which was tried last cycle but had to be backed out due to a couple issues, is back and seems to be working fine. Second, libata exception handling now uses usleep_range() instead of msleep() for sleeps < 20ms which can make things snappier in some corner cases" * 'for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: libata: skip debounce delay on link resume ata: ahci_brcmstb: disable DIPM support ata: ahci_brcmstb: enable support for ALPM drivers: libata-core: Use usleep_range() instead of msleep() for short sleeps (<20 ms) sata_sx4: correctly handling failed allocation ata: ahci_brcmstb: add support for MIPS-based platforms ahci: qoriq: Adjust the default register values on ls1021a ahci: qoriq: Update the default Rx watermark value ahci: qoriq: Adjust the default register values on ls1043a ahci: compile out msi/msix infrastructure ata: core: fix irq description on AHCI single irq systems ata: ahci_brcmstb: remove unused definitions ata: ahci_brcmstb: add a quirk for MIPS-based platforms ata: ahci_brcmstb: disable NCQ for MIPS-based platforms ata: sata_rcar: Remove obsolete platform_device_id entries sata_rcar: Add compatible string for r8a7795 ahci: kill 'intr_status' ahci: switch from 'threaded' to 'hardirq' interrupt handling ahci: per-port msix support
2015-12-07ahci: compile out msi/msix infrastructureDan Williams
Quoting Arnd: The AHCI driver is used for some on-chip devices that do not use PCI for probing, and it can be built even when CONFIG_PCI is disabled, but that now results in a build failure: ata/libahci.c: In function 'ahci_host_activate_multi_irqs': ata/libahci.c:2475:4: error: invalid use of undefined type 'struct msix_entry' ata/libahci.c:2475:21: error: dereferencing pointer to incomplete type 'struct msix_entry' Add ifdef CONFIG_PCI_MSI infrastructure to compile out the multi-msi and multi-msix code. Reported-by: Arnd Bergmann <arnd@arndb.de> Tested--by: Arnd Bergmann <arnd@arndb.de> [arnd: fix up pci enabled case] Reported-by: Paul Gortmaker <paul.gortmaker@windriver.com> Fixes: d684a90d38e2 ("ahci: per-port msix support") Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2015-11-30AHCI: Fix softreset failed issue of Port MultiplierXiangliang Yu
Current code doesn't update port value of Port Multiplier(PM) when sending FIS of softreset to device, command will fail if FBS is enabled. There are two ways to fix the issue: the first is to disable FBS before sending softreset command to PM device and the second is to update port value of PM when sending command. For the first way, i can't find any related rule in AHCI Spec. The second way can avoid disabling FBS and has better performance. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: stable@vger.kernel.org
2015-11-16ahci: switch from 'threaded' to 'hardirq' interrupt handlingDan Williams
For high frequency I/O the overhead of threaded interrupts impacts performance. A quick out-of-the-box test (i.e. no affinity tuning) shows ~10% random read performance at ~20% less cpu. The cpu wins appear to be from reduced lock contention. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2015-11-16ahci: per-port msix supportDan Williams
Some AHCI controllers support per-port MSI-X vectors. At the same time the Linux AHCI driver needs to support one-off architectures that implement a single MSI-X vector for all ports. The heuristic for enabling AHCI ports becomes, in order of preference: 1/ per-port multi-MSI-X 2/ per-port multi-MSI 3/ single MSI 4/ single MSI-X 5/ legacy INTX This all depends on AHCI implementations with potentially broken MSI-X requesting less vectors than the number of ports. If this assumption is violated we will need to start explicitly white-listing AHCI-MSIX implementations. Reported-by: Ricardo Neri <ricardo.neri@intel.com> [ricardo: fix struct msix_entry handling] Reported-by: kernel test robot <ying.huang@linux.intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2015-10-31ahci: cleanup ahci_host_activate_multi_irqsDan Williams
With devm there is no need to explicitly free irqs on error. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2015-10-31ahci: ahci_host_activate: kill IRQF_SHAREDDan Williams
MSI messages are per-device, so there will never be another "shared" device in the interrupt chain. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2015-09-30ata: ahci: find eSATA ports and flag them as removableManuel Lauss
If the AHCI ports' HPCP or ESP bits are set, the port should be considered external (e.g. eSATA) and is marked as removable. Userspace tools like udisks then treat it like an usb drive. With this patch applied, when I plug a drive into the esata port, KDE pops up a window asking what to do with the drives(s), just like it does for any random USB stick. Removability is indicated to the upper layers by way of the SCSI RMB bit, as I haven't found another way to signal userspace to treat a sata disk like any usb stick. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2015-06-25Merge branch 'for-4.2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata Pull libata updates from Tejun Heo: - a number of libata core changes to better support NCQ TRIM. - ahci now supports MSI-X in single IRQ mode to support a new controller which doesn't implement MSI or INTX. - ahci now supports edge-triggered IRQ mode to support a new controller which for some odd reason did edge-triggered IRQ. - the usual controller support additions and changes. * 'for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: (27 commits) libata: Do not blacklist Micron M500DC ata: ahci_mvebu: add suspend/resume support ahci, msix: Fix build error for !PCI_MSI ahci: Add support for Cavium's ThunderX host controller ahci: Add generic MSI-X support for single interrupts to SATA PCI driver libata: finally use __initconst in ata_parse_force_one() drivers: ata: add support for Ceva sata host controller devicetree:bindings: add devicetree bindings for ceva ahci ahci: added support for Freescale AHCI sata ahci: Store irq number in struct ahci_host_priv ahci: Move interrupt enablement code to a separate function Doc: libata: Fix spelling typo found in libata.xml ata:sata_nv - Change 1 to true for bool type variable. ata: add Broadcom AHCI SATA3 driver for STB chips Documentation: devicetree: add Broadcom SATA binding libata: Fix regression when the NCQ Send and Receive log page is absent ata: hpt366: fix constant cast warning ata: ahci_xgene: potential NULL dereference in probe ata: ahci_xgene: Add AHCI Support for 2nd HW version of APM X-Gene SoC AHCI SATA Host controller. libahci: Add support to handle HOST_IRQ_STAT as edge trigger latch. ...
2015-06-03ahci: Store irq number in struct ahci_host_privRobert Richter
Currently, ahci supports only msi and intx. To also support msix the handling of the irq number need to be changed. The irq number for msix devices is taken from msi_list instead of pci_dev. Thus, the irq number of a device needs to be stored in struct ahci_host_priv now. This allows the host controller to be activated in a generic way. This change is only intended for ahci drivers. For that reason the irq number is stored in struct ahci_host_priv used only by ahci drivers. Thus, the ABI changes only for ahci_host_activate(), but existing ata drivers (about 50) are unaffected and keep unchanged. All users of ahci_host_activate() have been updated. While touching drivers/ata/libahci.c, doing a small code cleanup in ahci_port_start(). Signed-off-by: Robert Richter <rrichter@cavium.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2015-05-10libahci: Add support to handle HOST_IRQ_STAT as edge trigger latch.Suman Tripathi
This patch adds the support to handle HOST_IRQ_STAT as edge trigger latch. Signed-off-by: Suman Tripathi <stripathi@apm.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2015-05-10libahci: Refactoring of ahci_single_irq_intr function.Suman Tripathi
This patch refactors the ahci_single_irq_intr function and also rename it to ahci_single_level_irq_intr as it handles a level triggered latch. Signed-off-by: Suman tripathi <stripathi@apm.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2015-04-25libata: Add helper to determine when PHY events should be ignoredGabriele Mazzotta
This is a preparation commit that will allow to add other criteria according to which PHY events should be dropped. Signed-off-by: Gabriele Mazzotta <gabriele.mzt@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: stable@vger.kernel.org
2015-01-09ahci: Use dev_info() to inform about the lack of Device Sleep supportGabriele Mazzotta
According to the Serial ATA AHCI specification, Device Sleep is an optional feature and as such no errors should be printed if it's missing. Keep informing users, but use dev_info() instead of dev_err(). Signed-off-by: Gabriele Mazzotta <gabriele.mzt@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>