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Age	Commit message (Collapse)	Author
2013-12-03	ahci: imx: Explicitly clear IMX6Q_GPR13_SATA_MPLL_CLK_EN	Marek Vasut
	We must clear this IMX6Q_GPR13_SATA_MPLL_CLK_EN bit on i.MX6Q, otherwise Linux will fail to find the attached drive on some boards. This entire fix was: Reported-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Cc: Richard Zhu <r65037@freescale.com> Cc: Linux-IDE <linux-ide@vger.kernel.org> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: stable@vger.kernel.org
2013-10-15	ahci: imx: setup power saving methods	Richard Zhu
	In order to save power consumption as much as possible. * Disable sata phy internal pll reference clock when sysetem enter into suspend mode, enable it after resume. * Setup module parameter used to enable imx ahci test power down mode(PDDQ) or not, when there is no device detected on the port * minor modifications: - The format of the copyright is changed, because that the original one can't pass fsl internal patch reivew without the character '(c)'. - Exports ahci_platform_ops and ahci_error_handler(). NOTE: * The hot-plug can't be supported when PDDQ mode is ever enabled. * module parameter usage how-to: - default: enable PDDQ mode when no device detected. - add "ahci-imx.hotplug=1" into kernel command line if your don't want to enable PDDQ mode when no device detected on the port. tj: Slightly updated description and comments. Signed-off-by: Richard Zhu <r65037@freescale.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2013-07-24	ahci_imx: add ahci sata support on imx platforms	Richard Zhu
	imx6q contains one Synopsys AHCI SATA controller, But it can't share ahci_platform driver with other controllers because there are some misalignments of the generic AHCI controller - the bits definitions of the HBA registers, the Vendor Specific registers, the AHCI PHY clock and the AHCI signals adjustment window(GPR13 register). - CAP_SSS(bit20) of the HOST_CAP is writable, default value is '0', should be configured to be '1' - bit0 (only one AHCI SATA port on imx6q) of the HOST_PORTS_IMPL should be set to be '1'.(default 0) - One Vendor Specific register HOST_TIMER1MS(offset:0xe0) should be configured regarding to the frequency of AHB bus clock. - Configurations of the AHCI PHY clock, and the signal parameters of the GPR13 Setup its own ahci sata driver, contained the imx6q specific initialized codes, re-use the generic ahci_platform driver, and keep the generic ahci_platform driver clean as much as possible. tj: patch description reformatted Signed-off-by: Richard Zhu <r65037@freescale.com> Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Tejun Heo <tj@kernel.org>