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path: root/drivers/acpi/cppc_acpi.c
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2015-11-20Merge branches 'pm-cpufreq' and 'acpi-cppc'Rafael J. Wysocki
* pm-cpufreq: Revert "Documentation: kernel_parameters for Intel P state driver" cpufreq: mediatek: fix build error cpufreq: intel_pstate: Add separate support for Airmont cores cpufreq: intel_pstate: Replace BYT with ATOM Revert "cpufreq: intel_pstate: Use ACPI perf configuration" Revert "cpufreq: intel_pstate: Avoid calculation for max/min" * acpi-cppc: ACPI / CPPC: Use h/w reduced version of the PCCT structure
2015-11-14ACPI / CPPC: Use h/w reduced version of the PCCT structureAshwin Chaugule
CPPC is enabled only on platforms which support the h/w reduced ACPI specification, so use the h/w reduced version of the PCCT consistently when deferencing PCCT contents. Fixes: 337aadff8e45 (ACPI: Introduce CPU performance controls using CPPC) Signed-off-by: Ashwin Chaugule <ashwin.chaugule@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-10-26ACPI / CPPC: Fix potential memory leakAshwin Chaugule
Commit 337aadff8e45 (ACPI: Introduce CPU performance controls using CPPC) leads to the following static checker warning: drivers/acpi/cppc_acpi.c:527 acpi_cppc_processor_probe() warn: overwrite may leak 'cpc_ptr' Fix the warning by removing the bogus per-CPU pointer dereference. Fixes: 337aadff8e45 (ACPI: Introduce CPU performance controls using CPPC) Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Ashwin Chaugule <ashwin.chaugule@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-10-26ACPI / CPPC: signedness bug in register_pcc_channel()Dan Carpenter
The "pcc_subspace_idx" is -1 if it hasn't been initialized yet. We need it to be signed. Fixes: 337aadff8e45 (ACPI: Introduce CPU performance controls using CPPC) Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Ashwin Chaugule <ashwin.chaugule@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-10-12ACPI: Introduce CPU performance controls using CPPCAshwin Chaugule
CPPC stands for Collaborative Processor Performance Controls and is defined in the ACPI v5.0+ spec. It describes CPU performance controls on an abstract and continuous scale allowing the platform (e.g. remote power processor) to flexibly optimize CPU performance with its knowledge of power budgets and other architecture specific knowledge. This patch adds a shim which exports commonly used functions to get and set CPPC specific controls for each CPU. This enables CPUFreq drivers to gather per CPU performance data and use with exisiting governors or even allows for customized governors which are implemented inside CPUFreq drivers. Signed-off-by: Ashwin Chaugule <ashwin.chaugule@linaro.org> Reviewed-by: Al Stone <al.stone@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>