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2014-05-30Merge tag 'qcom-soc-for-3.16-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/soc Merge "Qualcomm ARM Based SoC Updates for v3.16-2" from Kumar Gala: * Updated Kconfig DEBUG_QCOM_UARTDM help to include APQ8084 info * tag 'qcom-soc-for-3.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom: ARM: debug: qcom: add UART addresses to Kconfig help for APQ8084 Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-29Merge tag 'samsung-clk' of ↵Olof Johansson
http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc Merge "Samsung clock updates for 3.16" from Kukjin Kim: In this time, it is having dependency with arch/arm/ for 3.16, I pulled them into samsung tree from Tomasz under agreement from Mike. - Pull for_3.16/exynos5260 from Tomasz Figa: "This pull request contains patches preparing Samsung Common Clock Framework helpers to support Exynos5260 by adding support for multiple clock providers and then adding clock driver for Exynos5260." - Pull for_3.16/clk_fixes_non_critical from Tomasz Figa: "This pull requests contains a number of non-critical fixes for Samsung clock framework and drivers, including: 1) a series of fixes for Exynos5420 to correct clock definitions and make the driver closer to the documentation, 2) several missing clocks and clock IDs added to Exynos4, Exynos5250 and Exynos5420 drivers, 3) fix for incorrect initialization of clock table with NULL, 4) compiler warning fix." - Pull for_3.16/clk_cleanup from Tomasz Figa: "This pull requests contains minor clean-up related to Samsung clock support, including: 1) move Kconfig entries of Samsung clock drivers to drivers/clk, 2) compile drivers/clk/samsung conditionally when COMMON_CLK_SAMSUNG is selected, 3) remove obsolete Kconfig lines after moving s3c24xx to CCF." - Pull for_3.16/exynos3250 from Tomasz Figa: "This small pull request contains a patch adding clock driver for Exynos3250, which depends on previous pull requests in this series." - add dt bindings for exynos3250 clock - add exynos5800 specific clocks in current exynos5420 clock Note that this branch is based on s3c24xx ccf branch * tag 'samsung-clk' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (59 commits) clk: exynos5420: Add 5800 specific clocks dt-bindings: add documentation for Exynos3250 clock controller ARM: S3C24XX: fix merge conflict clk: samsung: exynos3250: Add clocks using common clock framework drivers: clk: use COMMON_CLK_SAMSUNG for Samsung clock support ARM: S3C24XX: move S3C24XX clock Kconfig options to Samsung clock Kconfig file ARM: select COMMON_CLK_SAMSUNG for ARCH_EXYNOS and ARCH_S3C64XX clk: samsung: add new Kconfig for Samsung common clock option ARM: S3C24XX: Remove omitted Kconfig selects and conditionals clk: samsung: exynos5420: add more registers to restore list clk: samsung: exynos5420: add misc clocks clk: samsung: exynos5420: update clocks for MAU Block clk: samsung: exynos5420: fix register offset for sclk_bpll clk: samsung: exynos5420: correct sysmmu-mfc parent clocks clk: samsung: exynos5420: update clocks for FSYS and FSYS2 blocks clk: samsung: exynos5420: update clocks for WCORE block clk: samsung: exynos5420: update clocks for PERIS and GEN blocks clk: samsung: exynos5420: update clocks for PERIC block clk: samsung: exynos5420: update clocks for DISP1 block clk: samsung: exynos5420: update clocks for G2D and G3D blocks ... Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-29Merge tag 'exynos-mcpm' of ↵Olof Johansson
http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc Merge "Exynos MCPM support for v3.16" from Kukjin Kim: - adding MCPM backend support for SMP secondary boot and core switching on Samsung's Exynos5420. Tested on exynos5420-smdk5420 and exynos5420 based chromebook (peach-pit) using the "/dev/b.L_switcher" user interface. Secondary core boot-up has also been tested on both the boards. * tag 'exynos-mcpm' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Add MCPM call-back functions ARM: dts: add CCI node for exynos5420 ARM: EXYNOS: Add generic cluster power control functions ARM: EXYNOS: use generic exynos cpu power control functions ARM: EXYNOS: Add generic cpu power control functions for exynos SoCs Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-29ARM: debug: qcom: add UART addresses to Kconfig help for APQ8084Georgi Djakov
Add information about the APQ8084 debug UART physical and virtual addresses in the DEBUG_QCOM_UARTDM Kconfig help section. Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-05-26Merge tag 'zynq-cleanup-for-3.16' of git://git.xilinx.com/linux-xlnx into ↵Olof Johansson
next/soc Merge "Xilinx Zynq changes for v3.16" from Michal Simek: arm: Xilinx Zynq cleanup patches for v3.16 - Add support for BIG Endian - Add SOC_BUS support - Sort Kconfig options - Fix early console * tag 'zynq-cleanup-for-3.16' of git://git.xilinx.com/linux-xlnx: ARM: zynq: Enable big-endian ARM: zynq: Fix uart0 early console virtual address clocksource: cadence_ttc: Use readl/writel_relaxed instead of __raw ARM: zynq: Sort Kconfig options ARM: zynq: Add support for SOC_BUS Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-26Merge tag 'berlin-soc-3.16' of https://github.com/shesselba/linux-berlin ↵Olof Johansson
into next/soc Merge "ARM: berlin: SoC changes for v3.16" from Sebastian Hesselbart: Despite relatively young Berlin SoC support, we already have support for a BG2Q SoC provided by Alexandre Belloni and Antoine Tenart. Also, we gained support for DW gpio and a pinctrl driver. * tag 'berlin-soc-3.16' of https://github.com/shesselba/linux-berlin: ARM: berlin: add the pinctrl dependency for the Marvell Berlin SoCs ARM: berlin: add the LIBGPIO as a dependency for the BG2Q ARM: berlin: add MACH_BERLIN_BG2Q symbol ARM: berlin: add Marvell Armada 1500 pro to Marvell doc Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-26Merge tag 'omap-for-v3.16/pm-signed' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Merge "ARM: omap pm changes for v3.16 merge window, resend" from Tony Lindgren: PM related fixes for omap3 that were discovered during omap3 conversion to device tree. This series sets up the PMIC signaling in a way where we can test for PM regressions easily by looking at state of the the sys_clkreq and sys_off_mode pins. Note that this series alone does not make omap3 PM to cut off core voltage during off-idle, changes to twl4030-power.c configurations are still needed. Those will be posted separately. * tag 'omap-for-v3.16/pm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Enable CPUidle in omap2plus_defconfig ARM: dts: Enable N900 keyboard sleep leds by default ARM: OMAP2+: Fix voltage scaling init for device tree ARM: dts: Configure omap3 twl4030 I2C4 pins by default ARM: OMAP3: Fix voltage control for deeper idle states ARM: OMAP3: Disable broken omap3_set_off_timings function ARM: OMAP3: Fix idle mode signaling for sys_clkreq and sys_off_mode ARM: dts: Fix omap serial wake-up when booted with device tree mfd: twl-core: Fix idle mode signaling for omaps when booted with device tree Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-26Merge tag 'omap-for-v3.16/soc-signed' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Pull "ARM: omap soc changes for v3.16 merge window" from Tony Lindgren: SoC related changes for omaps. * tag 'omap-for-v3.16/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: DRA752: add detection of SoC information ARM: OMAP2+: Remove suspend_set_ops from common pm late init ARM: OMAP2+: hwmod: OMAP5 DSS hwmod data ARM: omap4: hwmod_data: Clean up audio related structures (remove/merge them) Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-26ARM: sunxi: allow building without reset controllerArnd Bergmann
The sunxi reset controller code is only used with sun6i (a31). After the platform has been split up into per-soc options, it's now possible to build it without the reset controller code, so the base platform init must not call into the reset driver if that is turned off at compile time. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-26ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLAREHeiko Stübner
With the newly introduced CPU_METHOD_OF_DECLARE is not necessary anymore to reference the relevant smp_ops in the board file, but instead it can simply be set by the enable-method property of the cpu nodes. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-24Merge tag 'for-3.16/bcm-soc' of git://github.com/broadcom/mach-bcm into next/socArnd Bergmann
Merge "mach-bcm 3.16 soc updates" From Matt Porter: * only show ARCH_BCM in multi v6/v7 configs * enable ARM erratum 775420 * bcm_defconfig updates for pwm * tag 'for-3.16/bcm-soc' of git://github.com/broadcom/mach-bcm: ARM: bcm_defconfig: Enable PWM and Backlight ARM: mach-bcm: add ARM_ERRATA_775420 ARM: bcm: Restrict ARCH_BCM selection to ARCH_MULTI_V6_V7 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-24Merge branch 'bcm/cleanup' into next/socArnd Bergmann
Conflicts: arch/arm/mach-bcm/Kconfig
2014-05-23Merge tag 'sunxi-core-for-3.16-2' of https://github.com/mripard/linux into ↵Arnd Bergmann
next/soc Merge "Allwinner Core additions for 3.16, take 2" from Maxime Ripard: - Convert the A31 SMP operations to the CPU_METHOD_OF_DECLARE mechanism - Remove the reset code from the machine definition, that removes pretty much all the code left in mach-sunxi * tag 'sunxi-core-for-3.16-2' of https://github.com/mripard/linux: ARM: sunxi: Remove init_machine callback ARM: sunxi: Remove reset code from the platform ARM: sun6i: Retire the smp field in A31 machine Documentation: dt: bindings: Document Allwinner A31 enable method ARM: sun6i: Use CPU_METHOD_OF_DECLARE Documentation: dt: bindings: Document ARM PSCI enable method Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-23Merge tag 'qcom-soc-for-3.16' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/soc Merge "Qualcomm ARM Based SoC Updates for v3.16" from Kumar Gala: * Enabling building pinctrl and AMBA bus support * Clean up debug UART selection * tag 'qcom-soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom: ARM: qcom: Select PINCTRL by default for ARCH_QCOM ARM: debug: qcom: make UART address selection configuration option ARM: qcom: Enable ARM_AMBA option for Qualcomm SOCs. Conflicts: arch/arm/Kconfig.debug arch/arm/mach-qcom/Kconfig Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-23Merge tag 'mvebu-soc-3.16-2' of git://git.infradead.org/linux-mvebu into ↵Arnd Bergmann
next/soc Merge "mvebu SoC changes for v3.16 (incremental #2)" from Jason Cooper <jason@lakedaemon.net>: - mvebu - fix coherency on big-endian in -next - hardware IO coherency - L2/PCIe deadlock workaround - small coherency cleanups * tag 'mvebu-soc-3.16-2' of git://git.infradead.org/linux-mvebu: ARM: mvebu: returns ll_get_cpuid() to ll_get_coherency_cpumask() ARM: mvebu: improve comments in coherency_ll.S ARM: mvebu: fix indentation of assembly instructions in coherency_ll.S ARM: mvebu: fix big endian booting after coherency code rework ARM: mvebu: coherency: fix registration of PCI bus notifier when !PCI ARM: mvebu: implement L2/PCIe deadlock workaround ARM: mvebu: use hardware I/O coherency also for PCI devices Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-23Merge branch 'axxia/soc' into next/socArnd Bergmann
Patches from Anders Berg applied individually: Here is version 4 of platform support for AXM5516 SoC. The clk driver is now applied to clk-next. The rest should be ready for arm-soc. Haven't got any response from the power/reset maintainers... I hope this driver can be taken via arm-soc as well. The AXM55xx family consists of devices that may contain up to 16 ARM Cortex-A15 cores (in a 4x4 cluster configuration). The cores within each cluster share an L2 cache, and the clusters are connected to each other via a CCN-504 cache coherent interconnect. This machine requires CONFIG_ARM_LPAE enabled as all peripherals are located above 4GB in the memory map. * axxia/soc: ARM: dts: axxia: Add reset controller power: reset: Add Axxia system reset driver ARM: axxia: Adding defconfig for AXM55xx ARM: dts: Device tree for AXM55xx. ARM: Add platform support for LSI AXM55xx SoC Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-23ARM: dts: axxia: Add reset controllerAnders Berg
Add the reset controller to the AXM5xx device tree. Signed-off-by: Anders Berg <anders.berg@lsi.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-23ARM: axxia: Adding defconfig for AXM55xxAnders Berg
Add a defconfig file for the LSI Axxia family of devices (CONFIG_ARCH_AXXIA). Signed-off-by: Anders Berg <anders.berg@lsi.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-23ARM: dts: Device tree for AXM55xx.Anders Berg
Add device tree for the Amarillo validation board with an AXM5516 SoC. Signed-off-by: Anders Berg <anders.berg@lsi.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-23ARM: Add platform support for LSI AXM55xx SoCAnders Berg
The AXM55xx family consists of devices that may contain up to 16 ARM Cortex-A15 cores (in a 4x4 cluster configuration). The cores within each cluster share an L2 cache, and the clusters are connected to each other via a CCN-504 cache coherent interconnect. This machine requires CONFIG_ARM_LPAE enabled as all peripherals are located above 4GB in the memory map. Signed-off-by: Anders Berg <anders.berg@lsi.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-23ARM: sunxi: Remove init_machine callbackMaxime Ripard
The init_machine hook is now at its default value. We can remove it. Even though the sun4i and sun7i machines are nothing more than generic machines now, leave them in so that we won't have to add them back if needed, and so that the machine is still displayed in /proc/cpuinfo. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-05-23ARM: sunxi: Remove reset code from the platformMaxime Ripard
Now that reset is handled either by the watchdog driver for the sun4i, sun5i and sun7i, and by a driver of its own for sun6i, we can remove it from the platform code. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2014-05-22ARM: qcom: Select PINCTRL by default for ARCH_QCOMAndy Gross
Add missing PINCTRL selection. This enables selection of pinctrollers for Qualcomm processors. Signed-off-by: Andy Gross <agross@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-05-22ARM: debug: qcom: make UART address selection configuration optionIvan T. Ivanov
Separate Qualcomm low-level debugging UART to two options. DEBUG_MSM_UART is used in earlier non-multi platform arches, like MSM7X00A, QSD8X50 and MSM7X30. DEBUG_QCOM_UARTDM is used in multi-plafrom arches and have embedded data mover. Make DEBUG_UART_PHYS and DEBUG_UART_BASE user adjustable by Kconfig menu. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-05-22ARM: qcom: Enable ARM_AMBA option for Qualcomm SOCs.Srinivas Kandagatla
As some of the IPs on Qualcomm SOCs are based on ARM PrimeCell IPs. For example SDCC controller is PrimeCell MCI pl180. Adding this option will give flexibility to reuse the existing drivers as it is without major modifications. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-05-22ARM: mvebu: returns ll_get_cpuid() to ll_get_coherency_cpumask()Thomas Petazzoni
In the refactoring of the coherency fabric assembly code, a function called ll_get_cpuid() was created to factorize common logic between functions adding CPU to the SMP coherency group, enabling and disabling the coherency. However, the name of the function is highly misleading: ll_get_cpuid() makes one think tat it returns the ID of the CPU, i.e 0 for CPU0, 1 for CPU1, etc. In fact, this is not at all what this function returns: it returns a CPU mask for the current CPU, usable for the coherency fabric configuration and control registers. Therefore this commit renames this function to ll_get_coherency_cpumask(), and adds additional comments on top of the function to explain in more details what it does, and also how the endianess issue is handled. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400762882-10116-5-git-send-email-thomas.petazzoni@free-electrons.com Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-22ARM: mvebu: improve comments in coherency_ll.SThomas Petazzoni
This commit makes no functional change, it only improves a bit the various code comments in mach-mvebu/coherency_ll.S, by fixing a few typos and adding a few more details. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400762882-10116-4-git-send-email-thomas.petazzoni@free-electrons.com Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-22ARM: mvebu: fix indentation of assembly instructions in coherency_ll.SThomas Petazzoni
This commit does not make any functional change, it only fixes the indentation of a few assembly instructions in arch/arm/mach-mvebu/coherency_ll.S. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400762882-10116-3-git-send-email-thomas.petazzoni@free-electrons.com Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-22ARM: mvebu: fix big endian booting after coherency code reworkThomas Petazzoni
As part of the introduction of the cpuidle support for Armada XP, the coherency code was significantly reworked, especially in the coherency_ll.S file. However, when the ll_get_cpuid function was created, the big-endian specific code that switches the endianess of the register was not updated properly. This patch fixes this code, and therefore makes big endian systems bootable again. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400762882-10116-2-git-send-email-thomas.petazzoni@free-electrons.com Fixes: 2e8a5942f875 ("ARM: mvebu: Split low level functions to manipulate HW coherency") Reported-by: Kevin Hilman <khilman@linaro.org> Cc: Kevin Hilman <khilman@linaro.org> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-22ARM: mvebu: coherency: fix registration of PCI bus notifier when !PCIThomas Petazzoni
Commit b0063aad5dd8 ("ARM: mvebu: use hardware I/O coherency also for PCI devices") added a reference to the pci_bus_type variable, but this variable is only available when CONFIG_PCI is enabled. Therefore, there is now a build failure in !CONFIG_PCI situations. This commit fixes that by enclosing the entire initcall into a IS_ENABLED(CONFIG_PCI) condition. Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400598783-706-1-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-22ARM: mvebu: implement L2/PCIe deadlock workaroundThomas Petazzoni
The Marvell Armada 375 and Armada 38x SOCs, which use the Cortex-A9 CPU core, the PL310 cache and the Marvell PCIe hardware block are affected a L2/PCIe deadlock caused by a system erratum when hardware I/O coherency is used. This deadlock can be avoided by mapping the PCIe memory areas as strongly-ordered (note: MT_UNCACHED is strongly-ordered), and by removing the outer cache sync done in software. This is implemented in this patch by: * Registering a custom arch_ioremap_caller function that allows to make sure PCI memory regions are mapped MT_UNCACHED. * Adding at runtime the 'arm,io-coherent' property to the PL310 cache controller. This cannot be done permanently in the DT, because the hardware I/O coherency can only be enabled when CONFIG_SMP is enabled, in the current kernel situation. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400165974-9059-4-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-21Merge tag 'tegra-for-3.16-soc' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc Merge "ARM: tegra: core code changes for 3.16" from Stephen Warren: This branch contains just a single patch this time around. Thierry enhanced Tegra's restart code to allow programming PMC scratch registers to request specific behaviour after reboot. One of the most useful options for mainline software is the ability to reboot directly into USB recovery mode, which e.g. allows the bootloader to be reflashed. * tag 'tegra-for-3.16-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: Support reboot modes Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-21Merge tag 'imx-soc-3.16' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc Merge "ARM: imx: soc changes for 3.16" from Shawn Guo: i.MX SoC changes for 3.16: - A few cleanups on mx21ads board file, which should make the later conversion to DT a little bit easier. - Add some missing clocks and drop unused clk lookups for i.MX1 and i.MX27 clock drivers - Add initial i.MX SoloX (imx6sx) SoC support - Remove mx51_babbage and mach-cpuimx51sd board files, as the equivalent DT support is ready for the boards - Clean up device tree timer initialization a little bit - Add missing i2c4 clock for i.MX6 DualLite/Solo - Add missing CKO clock i.MX25 - Add shared gate clock support for i.MX specific clk_gate2 - Add low-level debug support for SoC VF610 - Some random code cleanups and defconfig updates * tag 'imx-soc-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (33 commits) ARM: mx25: Add CLKO support ARM: i.MX1 clk: Remove clk_register_clkdev() for unused clocks ARM: i.MX1 clk: Add missing clocks ARM: imx: add basic imx6sx SoC support ARM: imx: add clock driver for imx6sx ARM: imx: add low-level debug support for imx6sx ARM: mx51: Remove mach-cpuimx51sd board file ARM: i.MX: Setup IRQ handler from IRQ driver ARM: i.MX27 pca100: remove deprecated IRQF_DISABLED ARM: imx/mxs defconfigs: add MTD_SPI_NOR (new dependency for M25P80) ARM: i.MX: Fix eMMa PrP resource size ARM: imx_v4_v5_defconfig: drop CONFIG_COMMON_CLK_DEBUG option ARM: i.MX27 clk: Remove clk_register_clkdev() for unused clocks ARM: i.MX27 clk: Add missing clocks for MSHC and RTIC ARM: imx6q: add the missing esai_ahb clock ARM: imx: add shared gate clock support ARM: imx: lock is always valid for clk_gate2 ARM: imx: define struct clk_gate2 on our own ARM: i.MX: Remove #ifdef CONFIG_OF ARM: imx_v6_v7_defconfig: enable option CONFIG_LOCALVERSION_AUTO ... Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-21Merge tag 'sunxi-core-for-3.16' of https://github.com/mripard/linux into ↵Olof Johansson
next/soc Merge "Allwinner SoCs core additions for 3.16" from Maxime Ripard: Refactor the Kconfig options to have one Kconfig option per machine. * tag 'sunxi-core-for-3.16' of https://github.com/mripard/linux: ARM: sunxi: select MFD_SUN6I_PRCM when sun6i arch support is enabled ARM: sunxi: Split the various SoCs support in Kconfig Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-20ARM: zynq: Enable big-endianMichal Simek
Enable ARCH_SUPPORTS_BIG_ENDIAN in Kconfig. zynq_secondary_trampoline is the first function that is called on secondary CPU. Reference: "ARM: mcpm: fix big endian issue in mcpm startup code" (sha1: 519ceb9fd10cd7e836d0aa97b2068cc9e97f463b) Fix early printk support. Based on: "ARM: pl01x debug code endian fix" (sha1: 76e3faf156fa95b6465e747d702b94faf67117fc) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-20ARM: zynq: Fix uart0 early console virtual addressMichal Simek
Virtual address have to have the same offset within a 2MB aligned section of virtual/phycial address space. Fix uart0 virtual address to be align with physical one. Also remove UART_SIZE which is completely unused. Reported-by: Russ Smith <russells@google.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-20ARM: zynq: Sort Kconfig optionsMichal Simek
Keep options sorted. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-20ARM: zynq: Add support for SOC_BUSMichal Simek
Provide information through SOC_BUS to user space. Silicon revision is provided through devcfg device. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-19Merge tag 'sti-soc-for-v3.16' of ↵Olof Johansson
git://git.stlinux.com/devel/kernel/linux-sti into next/soc Merge "ARM: STi: SoC changes for v3.16" from Maxime Coquelin: SoC changes for STi platforms - Add support for STiH407 * tag 'sti-soc-for-v3.16' of git://git.stlinux.com/devel/kernel/linux-sti: ARM: STi: Add STiH407 SoC support Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-19Merge tag 'renesas-soc-cleanup-for-v3.16' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Renesas ARM Based SoC soc-cleanup Updates for v3.16" from Simon Horman: r8a7791 (R-Car H2) SoC and its Koelsch board and, r8a7740 (R-Mobile A1) SoC and its Armadillo800eva board * Set CPU clock frequency from OF nodes * tag 'renesas-soc-cleanup-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Set clock frequency in HZ from OF nodes ARM: shmobile: Use shmobile_init_late() on r8a7740 ARM: shmobile: Remove unused r8a7791_init_early() ARM: shmobile: Use r8a7791 DT CPU Frequency for Koelsch ARM: shmobile: Use r8a7791 DT CPU Frequency in common case ARM: shmobile: Remove unused r8a7740_init_delay() ARM: shmobile: Use r8a7740 DT CPU Frequency for Armadillo DT Ref ARM: shmobile: Use r8a7740 DT CPU Frequency in common case ARM: shmobile: Add r8a7740 Maximum CPU Frequency to DTS Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-19Merge tag 'renesas-clock2-for-v3.16' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Second Round of Renesas ARM Based SoC Clock Updates for v3.16" from Simon Horman: r8a7791 (R-Car M2) SoC * Correct SYS-DMAC clock defines r8a7740 (R-Mobile A1) SoC * Correct name of DT Ethernet clock * tag 'renesas-clock2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7791: Correct SYS-DMAC clock defines ARM: shmobile: r8a7740: Correct name of DT Ethernet clock Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-19Merge branch 'cleanup/kconfig' into next/socOlof Johansson
Bring in the cleanup branch due to conflicts in new additions. Should really have been the base before the other branch, but this way works too. * cleanup/kconfig: ARM: qcom: clean-up unneeded kconfig selects ARM: bcm: clean-up unneeded kconfig selects ARM: mvebu: clean-up unneeded kconfig selects Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-19Merge tag 'mvebu-soc-3.16' of git://git.infradead.org/linux-mvebu into next/socOlof Johansson
Merge "ARM: mvebu: SoC changes for v3.16" from Jason Cooper: mvebu SoC changes for v3.16 - Armada 375/38x coherency support - Armada 375/38x SMP support - mvebu PMSU and CPU reset support - Armada 370/XP cpuidle support - kirkwood remove platform init of audio device - small fixes and cleanup for new SoC (375/38x) Note: - due to complex deps, cpuidle changes Acked by appropriate maintainer for going though arm-soc tree. * tag 'mvebu-soc-3.16' of git://git.infradead.org/linux-mvebu: (46 commits) ARM: mvebu: Fix pmsu compilation when ARMv6 is selected ARM: mvebu: conditionalize Armada 375 coherency workaround ARM: mvebu: conditionalize Armada 375 SMP workaround ARM: mvebu: add Armada 375 A0 revision definition ARM: mvebu: initialize mvebu-soc-id earlier ARM: mvebu: fix thermal quirk SoC revision check ARM: Kirkwood: t5325: Remove platform device to instantiate audio ARM: Kirkwood: Remove platform driver for codec ARM: mvebu: Add thermal quirk for the Armada 375 DB board ARM: mvebu: Select HAVE_ARM_TWD only if SMP is enabled ARM: mvebu: fix the name of the parameter used in mvebu_get_soc_id ARM: mvebu: remove unnecessary ifdef around l2x0_of_init ARM: mvebu: register the cpuidle driver for the Armada XP SoCs cpuidle: mvebu: Add initial CPU idle support for Armada 370/XP SoC ARM: mvebu: Register notifier callback for the cpuidle transition ARM: mvebu: refine which files are build in mach-mvebu ARM: mvebu: Add the PMSU related part of the cpu idle functions ARM: mvebu: Allow to power down L2 cache controller in idle mode ARM: mvebu: Low level function to disable HW coherency support ARM: mvebu: Split low level functions to manipulate HW coherency ... Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-19Merge tag 'mvebu-soc-orion5x-3.16' of git://git.infradead.org/linux-mvebu ↵Olof Johansson
into next/soc Merge "ARM: mvebu: SoC orion5x DT conversion for v3.16" from Jason Cooper: mvebu SoC orion5x DT conversion for v3.16 - orion5x - convert to DT * tag 'mvebu-soc-orion5x-3.16' of git://git.infradead.org/linux-mvebu: (29 commits) ARM: orion: remove no longer needed gpio DT code ARM: orion: remove no longer needed DT IRQ code ARM: orion5x: convert Maxtor Shared Storage II to the Device Tree ARM: orion5x: convert d2net to Device Tree ARM: orion5x: convert RD-88F5182 to Device Tree ARM: orion5x: remove unneeded code for edmini_v2 ARM: orion5x: keep TODO list in edmini_v2 DT ARM: orion5x: use DT to describe NOR on edmini_v2 ARM: orion5x: use DT to describe EHCI on edmini_v2 ARM: orion5x: use DT to describe I2C devices on edmini_v2 ARM: orion5x: convert edmini_v2 to DT pinctrl ARM: orion5x: add standard pinctrl configs for sata0 and sata1 ARM: orion5x: add Device Bus description at SoC level ARM: orion5x: update I2C description at SoC level ARM: orion5x: enable pinctrl driver at SoC level ARM: orion5x: switch to DT interrupts and timer ARM: orion: switch to a per-platform handle_irq() function ARM: orion5x: convert to use 'clocks' property for UART controllers ARM: orion5x: switch to use the clock driver for DT platforms ARM: orion5x: add interrupt for Ethernet in Device Tree ... Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-19ARM: DRA752: add detection of SoC informationNishanth Menon
Currently the files in /sys/devices/soc0/ show no information about DRA7. Few userspace programs do depend on this information to make SoC specific support. So update logic to detect the relevant information and provide to userspace. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-19ARM: OMAP2+: Remove suspend_set_ops from common pm late initDave Gerlach
In omap2_common_pm_late_init suspend_set_ops was called to set common suspend handling functions for all omap platforms. This created two problems. First, these suspend ops were being set for all platforms, regardless of whether or not suspend support has been integrated so in the case of AM33XX, suspend to mem was presented as available but failed every time. Second, some platforms will need to define a completely separate set of suspend ops, such as AM33XX, due to differences from previous omap platforms so there is no need to always set the common omap ops. This patch moves the suspend_set_ops call from omap2_common_pm_late_init into a separate function that then gets called in the omap*_pm_init functions for each platform. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-19ARM: berlin: add the pinctrl dependency for the Marvell Berlin SoCsAntoine Tenart
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-05-19ARM: berlin: add the LIBGPIO as a dependency for the BG2QAntoine Tenart
The BG2Q has GPIOs driven by the dwapb GPIO driver. Add the LIBGPIO as a dependency to be able to support them. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Reviewed-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-05-19ARM: berlin: add MACH_BERLIN_BG2Q symbolAlexandre Belloni
Now that we start supporting the Marvell Berlin BG2Q, add a symbol allowing to differentiate that SoC from the other SoCs of the Berlin family. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-05-17ARM: sun6i: Retire the smp field in A31 machineMaxime Ripard
Now that we can rely on the enable-method, remove the smp field declaration from A31 machine. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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