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2013-05-09microblaze: Do not select OPT_LIB_ASM by defaultMichal Simek
This option is valid only for BE systems. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-09microblaze: Fix initrd supportMichal Simek
Initrd/ramdisk support has been never validated. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-09microblaze: Do not use r6 in head.SMichal Simek
r6 stores pointer to ramdisk and shouldn't be used before it is passed to machine_early_init. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-09microblaze: pci: Remove duplicated headerMichal Simek
Remove duplicated header. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-09microblaze: Set the default irq_domainDan Christensen
Register the irq_domain created during initialization as the default so that device drivers can pass NULL to irq_create_mapping and get a virtual irq to pass to request_irq. Signed-off-by: Dan Christensen <opello@opello.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-09microblaze: pci: Remove duplicated include from pci-common.cWei Yongjun
Remove duplicated include. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-09KVM: VMX: fix halt emulation while emulating invalid guest sateGleb Natapov
The invalid guest state emulation loop does not check halt_request which causes 100% cpu loop while guest is in halt and in invalid state, but more serious issue is that this leaves halt_request set, so random instruction emulated by vm86 #GP exit can be interpreted as halt which causes guest hang. Fix both problems by handling halt_request in emulation loop. Reported-by: Tomas Papan <tomas.papan@gmail.com> Tested-by: Tomas Papan <tomas.papan@gmail.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> CC: stable@vger.kernel.org Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-05-09blackfin: smp: fix smp build after drop asm/system.hSteven Miao
Signed-off-by: Steven Miao <realmz6@gmail.com>
2013-05-09blackfin: fix bootup core clock and system clock displayJames Cosin
From: James Cosin <jkosin@intcomgrp.com> fixes the number of digits to 6 after the decimal point to regain the significant 0s in the frequency after the decimal point. Signed-off-by: Steven Miao <realmz6@gmail.com>
2013-05-08ARM: dts: Configure and fix the McSPI pins for 4430sdpTony Lindgren
The bootloader configures the pins, but has pull bits set without pull enable bits. While this is harmless, and won't do anything, it seems to cause confusion at least for me every time looking at the pin configuration. Fix it for DT based boot. Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08ARM: dts: AM33XX: Add GPMC nodePhilip Avinash
Add GPMC data node to AM33XX device tree file. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08ARM: dts: OMAP4460: Fix CPU OPP voltagesNishanth Menon
commit d16fb25 (ARM: dts: OMAP4460: Add CPU OPP table) introduced wrong OPP voltages per OPP by mistake. Sync the OPP tables with existing OMAP4460 OPP data in arch/arm/mach-omap2/opp4xxx_data.c Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08ARM: dts: OMAP36xx: Fix CPU OPP voltagesNishanth Menon
commit 3027e26 (ARM: dts: OMAP36xx: Add CPU OPP table) introduced wrong OPP voltages per OPP by mistake. Sync the OPP tables with existing OMAP36xx OPP data in arch/arm/mach-omap2/opp3xxx_data.c Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08ARM: OMAP4+: omap2plus_defconfig: Enable audio via TWL6040 as modulePeter Ujfalusi
Boards supported upstream all use TWL6040 as audio codec, enable the common ASoC machine driver by default for them. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08ARM: OMAP2: AM33XX: id: Add support for new AM335x PG2.1 SiVaibhav Hiremath
Add support for chip id detection of AM335x PG2.1 Silicon. Currently omap3xxx_check_revision() detects PG1.0 and PG2.0 only, this patch extends it by adding PG2.1 Si support. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08omap: mux: add AM/DM37x gpiosChristoph Fritz
This patch adds GPIO pins found on AM/DM37x. Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08Merge branch 'omap-gpmc-fixes-for-v3.10' of git://github.com/jonhunter/linux ↵Tony Lindgren
into fixes
2013-05-08ARM: OMAP1: DMA: fix error handling in omap1_system_dma_init()Wei Yongjun
Add the missing iounmap() before return from omap1_system_dma_init() in the error handling case. Also removed platform_device_del() on add resources error case which cause dup device delete. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08ARM: OMAP2+: omap_device: use late_initcall_syncKevin Hilman
If DEBUG_LL and earlyprintk are enabled, and omap-serial.c is compiled as a module, the kernel boot hangs early as the clocks for serial port are cut while earlyprintk still uses the port. The problem is a race between the late_initcall for omap_device (which idles devices that have no drivers) and the late_initcall in kernel/printk.c which turns off the earlyconsole. Any printks that happen between this omap_device late initcall and the earlyconsole late initcall will crash when accessing the UART. The fix is to ensure the omap_device initcall happens after the earlyconsole initcall. Reported-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08ARM: OMAP: RX-51: change probe order of touchscreen and panel SPI devicesAaro Koskinen
Commit 9fdca9df (spi: omap2-mcspi: convert to module_platform_driver) broke the SPI display/panel driver probe on RX-51/N900. The exact cause is not fully understood, but it seems to be related to the probe order. SPI communication to the panel driver (spi1.2) fails unless the touchscreen (spi1.0) has been probed/initialized before. When the omap2-mcspi driver was converted to a platform driver, it resulted in that the devices are probed immediately after the board registers them in the order they are listed in the board file. Fix the issue by moving the touchscreen before the panel in the SPI device list. The patch fixes the following failure: [ 1.260955] acx565akm spi1.2: invalid display ID [ 1.265899] panel-acx565akm display0: acx_panel_probe panel detect error [ 1.273071] omapdss CORE error: driver probe failed: -19 Tested-by: Sebastian Reichel <sre@debian.org> Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Pali Rohár <pali.rohar@gmail.com> Cc: Joni Lapilainen <joni.lapilainen@gmail.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Felipe Balbi <balbi@ti.com> Cc: stable@vger.kernel.org Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08ARM: OMAP3: Beagle: Fix USB Host on beagle xM Ax/BxRoger Quadros
On Beagle xM Rev. Ax/Bx, the USB power enable GPIO logic is reversed when compared to other revisions i.e. it is active high instead of active low. Use the beagle_config.usb_pwr_level flag correctly so that the power regulator can be configured at runtime. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08Merge tag 'arm64-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64 Pull arm64 update from Catalin Marinas: - Since drivers/irqchip/irq-gic.c no longer has dependencies on arm32 specifics (the 'gic' branch merged), it can be enabled on arm64. - Enable arm64 support for poweroff/restart (for code under drivers/power/reset/). - Fixes (dts file, exception handling, bitops) * tag 'arm64-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64: arm64: Treat the bitops index argument as an 'int' arm64: Ignore the 'write' ESR flag on cache maintenance faults arm64: dts: fix #address-cells for foundation-v8 arm64: vexpress: Add support for poweroff/restart arm64: Enable support for the ARM GIC interrupt controller
2013-05-08Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/rkuo/linux-hexagon-kernel Pull Hexagon fixes from Richard Kuo: "A bug fix and a Kconfig cleanup" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rkuo/linux-hexagon-kernel: HEXAGON: Remove non existent reference to GENERIC_KERNEL_EXECVE & GENERIC_KERNEL_THREAD Hexagon: fix register used to call do_work_pending
2013-05-08ARM: dts: OMAP4: Fix ethernet IRQ for OMAP4 boardsJon Hunter
Commit ff5c9059 (ARM: dts: OMAP3+: Correct gpio #interrupts-cells property) updated the number of interrupt cells required for configuring gpios as interrupts for other devices (such as ethernet controllers). This update allowed the interrupt type (edge, level, etc) to be configured via device-tree (as described in the Documentation/devicetree/bindings/gpio/gpio-omap.txt). This broke ethernet support on the OMAP4 SDP board that defines a gpio as the ethernet IRQ because the interrupt type (level, edge, etc) was not getting configured correctly. This board use the ks8851 ethernet chip which has an active low interrupt. Fix this by defining the gpio interrupt as active-low in the device-tree binding. Please note that the OMAP4-VAR-SOM also uses the same ethernet controller and it is expected it will have the same problem. So the same fix is also applied to this board. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08xen: mask x2APIC feature in PVZhenzhong Duan
On x2apic enabled pvm, doing sysrq+l, got NULL pointer dereference as below. SysRq : Show backtrace of all active CPUs BUG: unable to handle kernel NULL pointer dereference at (null) IP: [<ffffffff8125e3cb>] memcpy+0xb/0x120 Call Trace: [<ffffffff81039633>] ? __x2apic_send_IPI_mask+0x73/0x160 [<ffffffff8103973e>] x2apic_send_IPI_all+0x1e/0x20 [<ffffffff8103498c>] arch_trigger_all_cpu_backtrace+0x6c/0xb0 [<ffffffff81501be4>] ? _raw_spin_lock_irqsave+0x34/0x50 [<ffffffff8131654e>] sysrq_handle_showallcpus+0xe/0x10 [<ffffffff8131616d>] __handle_sysrq+0x7d/0x140 [<ffffffff81316230>] ? __handle_sysrq+0x140/0x140 [<ffffffff81316287>] write_sysrq_trigger+0x57/0x60 [<ffffffff811ca996>] proc_reg_write+0x86/0xc0 [<ffffffff8116dd8e>] vfs_write+0xce/0x190 [<ffffffff8116e3e5>] sys_write+0x55/0x90 [<ffffffff8150a242>] system_call_fastpath+0x16/0x1b That's because apic points to apic_x2apic_cluster or apic_x2apic_phys but the basic element like cpumask isn't initialized. Mask x2APIC feature in pvm to avoid overwrite of apic pointer, update commit message per Konrad's suggestion. Signed-off-by: Zhenzhong Duan <zhenzhong.duan@oracle.com> Tested-by: Tamon Shiose <tamon.shiose@oracle.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2013-05-08xen/spinlock: Fix check from greater than to be also be greater or equal to.Konrad Rzeszutek Wilk
During review of git commit cb9c6f15f318aa3aeb62fe525aa5c6dcf6eee159 ("xen/spinlock: Check against default value of -1 for IRQ line.") Stefano pointed out a bug in the patch. Unfortunatly due to vacation timing the fix was not applied and this patch fixes it up. Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2013-05-08xen/smp/pvhvm: Don't point per_cpu(xen_vpcu, 33 and larger) to shared_infoKonrad Rzeszutek Wilk
As it will point to some data, but not event channel data (the shared_info has an array limited to 32). This means that for PVHVM guests with more than 32 VCPUs without the usage of VCPUOP_register_info any interrupts to VCPUs larger than 32 would have gone unnoticed during early bootup. That is OK, as during early bootup, in smp_init we end up calling the hotplug mechanism (xen_hvm_cpu_notify) which makes the VCPUOP_register_vcpu_info call for all VCPUs and we can receive interrupts on VCPUs 33 and further. This is just a cleanup. Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2013-05-08MIPS: microMIPS: Support dynamic ASID sizing.Steven J. Hill
Changes for pure microMIPS cores to dynamically determine the ASID size at boot time. Includes bug fix https://patchwork.linux-mips.org/patch/5230/ Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Signed-off-by: Jonas Gorski <jogo@openwrt.org>
2013-05-08MIPS: Allow ASID size to be determined at boot time.Steven J. Hill
Original patch by Ralf Baechle and removed by Harold Koerfgen with commit f67e4ffc79905482c3b9b8c8dd65197bac7eb508. This allows for more generic kernels since the size of the ASID and corresponding masks can be determined at run-time. This patch is also required for the new Aptiv cores and has been tested on Malta and Malta Aptiv platforms. [ralf@linux-mips.org: Added relevant part of fix https://patchwork.linux-mips.org/patch/5213/] Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08MIPS: FW: malta: Code formatting clean-ups.Steven J. Hill
Clean-up code according to the 'checkpatch.pl' script. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08MIPS: FW: Remove obsolete header file for MTI platforms.Steven J. Hill
Remove 'arch/mips/include/asm/mips-boards/prom.h' and get rid of all inclusions of it by Malta and SEAD-3 platforms. [ralf@linux-mips.org: Fold in John Crispin <blogic@openwrt.org>'s "MIPS: ar7 powertv build"]. [ralf@linux-mips.org: Fold in John Crispin <blogic@openwrt.org>'s "MIPS: unbreak powertv build"]. [ralf@linux-mips.org: Test. Build. Your. Fscking. Code. Or...] Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08MIPS: FW: malta: Use new common FW library variable processing.Steven J. Hill
Remove old YAMON prom code and use common firmware library code. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08MIPS: FW: sead3: Use new common FW library variable processing.Steven J. Hill
Remove old YAMON prom code and use common firmware library code. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08MIPS: FW: Add environment variable processing.Steven J. Hill
Add parsing of the environment and command line variables passed to the kernel to the firmware library. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08MIPS: Add declarations to MIPS Technologies Inc. generic header.Steven J. Hill
Add declaration of 'mips_scroll_message' and 'mips_display_message' to the common generic header file for the MIPS Technologies Inc. development boards. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08MIPS: sead3: Use generic suspend/resume for LEDs.Lars-Peter Clausen
Setting the LED_CORE_SUSPENDRESUME flag causes the LED driver core to call led_classdev_suspend/led_classdev_resume during suspend/resume. Since this is exactly what the driver's custom suspend/resume callbacks do we can replace them by setting the LED_CORE_SUSPENDRESUME flag. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08KVM: x86: fix maintenance of guest/host xcr0 stateMarcelo Tosatti
Emulation of xcr0 writes zero guest_xcr0_loaded variable so that subsequent VM-entry reloads CPU's xcr0 with guests xcr0 value. However, this is incorrect because guest_xcr0_loaded variable is read to decide whether to reload hosts xcr0. In case the vcpu thread is scheduled out after the guest_xcr0_loaded = 0 assignment, and scheduler decides to preload FPU: switch_to { __switch_to __math_state_restore restore_fpu_checking fpu_restore_checking if (use_xsave()) fpu_xrstor_checking xrstor64 with CPU's xcr0 == guests xcr0 Fix by properly restoring hosts xcr0 during emulation of xcr0 writes. Analyzed-by: Ulrich Obergfell <uobergfe@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-05-08arm64: Treat the bitops index argument as an 'int'Catalin Marinas
The bitops prototype use an 'int' as the bit index type but the asm implementation assume it to be a 'long'. Since the compiler does not guarantee zeroing the upper 32-bits in a register when used as 'int', change the bitops implementation accordingly. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-05-08arm64: Ignore the 'write' ESR flag on cache maintenance faultsCatalin Marinas
ESR.WnR bit is always set on data cache maintenance faults even though the page is not required to have write permission. If a translation fault (page not yet mapped) happens for read-only user address range, Linux incorrectly assumes a permission fault. This patch adds the check of the ESR.CM bit during the page fault handling to ignore the 'write' flag. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Tim Northover <Tim.Northover@arm.com> Cc: stable@vger.kernel.org
2013-05-08arm64: dts: fix #address-cells for foundation-v8Mark Rutland
Commit 90556ca1 ("arm64: vexpress: Add dts files for the ARMv8 RTSM models") added foundation-v8.dts, but erroneously set /cpus/#address-cells = <1> while providing two cells in each cpus/cpu@N node's reg property. As of commit ea393a2e ("arm64: smp: honour #address-size when parsing CPU reg property") we read in as many address cells as specified rather than always reading two. This means that for foundation-v8.dts, we only read the first reg cell (zero) for each cpu node, and receive a lot of warnings at boot of the form "/cpus/cpu@1: duplicate cpu reg properties in the DT". This patch corrects foundation-v8.dts to have the correct value for /cpus/#address-cells. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Will Deacon <will.deacon@arm.com> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-05-08arm64: vexpress: Add support for poweroff/restartCatalin Marinas
This patch adds the arm_pm_poweroff definition expected by the vexpress-poweroff.c driver and enables the latter for arm64. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Pawel Moll <pawel.moll@arm.com>
2013-05-08arm64: Enable support for the ARM GIC interrupt controllerCatalin Marinas
This patch enables ARM_GIC on the arm64 kernel. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-05-08Merge branch 'gic' into HEADCatalin Marinas
* arm64-prep-gic: irqchip: gic: Perform the gic_secondary_init() call via CPU notifier irqchip: gic: Call handle_bad_irq() directly arm: Move chained_irq_(enter|exit) to a generic file arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h
2013-05-07Merge branch 'akpm' (incoming from Andrew)Linus Torvalds
Merge more incoming from Andrew Morton: - Various fixes which were stalled or which I picked up recently - A large rotorooting of the AIO code. Allegedly to improve performance but I don't really have good performance numbers (I might have lost the email) and I can't raise Kent today. I held this out of 3.9 and we could give it another cycle if it's all too late/scary. I ended up taking only the first two thirds of the AIO rotorooting. I left the percpu parts and the batch completion for later. - Linus * emailed patches from Andrew Morton <akpm@linux-foundation.org>: (33 commits) aio: don't include aio.h in sched.h aio: kill ki_retry aio: kill ki_key aio: give shared kioctx fields their own cachelines aio: kill struct aio_ring_info aio: kill batch allocation aio: change reqs_active to include unreaped completions aio: use cancellation list lazily aio: use flush_dcache_page() aio: make aio_read_evt() more efficient, convert to hrtimers wait: add wait_event_hrtimeout() aio: refcounting cleanup aio: make aio_put_req() lockless aio: do fget() after aio_get_req() aio: dprintk() -> pr_debug() aio: move private stuff out of aio.h aio: add kiocb_cancel() aio: kill return value of aio_complete() char: add aio_{read,write} to /dev/{null,zero} aio: remove retry-based AIO ...
2013-05-07aio: don't include aio.h in sched.hKent Overstreet
Faster kernel compiles by way of fewer unnecessary includes. [akpm@linux-foundation.org: fix fallout] [akpm@linux-foundation.org: fix build] Signed-off-by: Kent Overstreet <koverstreet@google.com> Cc: Zach Brown <zab@redhat.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Mark Fasheh <mfasheh@suse.com> Cc: Joel Becker <jlbec@evilplan.org> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Jens Axboe <axboe@kernel.dk> Cc: Asai Thambi S P <asamymuthupa@micron.com> Cc: Selvan Mani <smani@micron.com> Cc: Sam Bradshaw <sbradshaw@micron.com> Cc: Jeff Moyer <jmoyer@redhat.com> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: Benjamin LaHaise <bcrl@kvack.org> Reviewed-by: "Theodore Ts'o" <tytso@mit.edu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-05-08MIPS: Export symbols used by KVM/MIPS moduleSanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08MIPS: ASM offsets for VCPU arch specific fields.Sanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08MIPS: If KVM is enabled then use the KVM specific routine to flush the TLBs ↵Sanjay Lal
on a ASID wrap. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08MIPS: Export routines needed by the KVM module.Sanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: Routines to handle specific traps/exceptions while executing the ↵Sanjay Lal
guest. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>