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path: root/arch/tile/gxio/iorpc_trio.c
AgeCommit message (Collapse)Author
2013-09-16tile: improve gxio iorpc autogenerated code styleChris Metcalf
Fix some whitespace style issues in some auto-generated files. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-08-06tile PCI RC: support more MSI-X interrupt vectorsChris Metcalf
To support PCIe devices with higher number of MSI-X interrupt vectors, e.g. 16 for the LSI RAID card, enhance the Gx RC stack to provide more MSI-X vectors by using the TRIO Scatter Queues, which provide 8 more vectors in addition to ~10 from the Map Mem regions. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-07-11arch/tile: provide kernel support for the tilegx TRIO shimChris Metcalf
Provide kernel support for the tilegx "Transaction I/O" (TRIO) on-chip hardware. This hardware implements the PCIe interface for tilegx; the driver changes to use TRIO for PCIe are in a subsequent commit. The change is layered on top of the tilegx GXIO IORPC subsystem. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>