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path: root/arch/riscv/kernel
AgeCommit message (Expand)Author
2018-10-22RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartidPalmer Dabbelt
2018-10-22RISC-V: Disable preemption before enabling interruptsAtish Patra
2018-10-22RISC-V: Comment on the TLB flush in smp_callin()Palmer Dabbelt
2018-10-22RISC-V: Filter ISA and MMU values in cpuinfoPalmer Dabbelt
2018-10-22RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}Palmer Dabbelt
2018-10-22RISC-V: No need to pass scause as arg to do_IRQ()Anup Patel
2018-10-22RISC-V: Use swiotlb on RV64 onlyZong Li
2018-10-22Auto-detect whether a FPU existsAlan Kao
2018-10-22Allow to disable FPU supportAlan Kao
2018-10-22Refactor FPU code in signal setup/return proceduresAlan Kao
2018-10-22Extract FPU context operations from entry.SAlan Kao
2018-10-02RISCV: Fix end PFN for low memoryAtish Patra
2018-09-04riscv: Do not overwrite initrd_start and initrd_endGuenter Roeck
2018-08-28RISC-V: Use a less ugly workaround for unused variable warningsPalmer Dabbelt
2018-08-20RISC-V: Define sys_riscv_flush_icache when SMP=nPalmer Dabbelt
2018-08-13RISC-V: Fix !CONFIG_SMP compilation errorAtish Patra
2018-08-13RISC-V: Add the directive for alignment of stvec's valueZong Li
2018-08-13clocksource: new RISC-V SBI timer driverPalmer Dabbelt
2018-08-13RISC-V: implement low-level interrupt handlingChristoph Hellwig
2018-08-13RISC-V: simplify software interrupt / IPI codeChristoph Hellwig
2018-08-13RISC-V: remove timer leftoversChristoph Hellwig
2018-08-13RISC-V: Add early printk support via the SBI consolePalmer Dabbelt
2018-08-13RISC-V: Don't increment sepc after breakpoint.Jim Wilson
2018-08-13RISC-V: Use KBUILD_CFLAGS instead of KCFLAGS when building the vDSOPalmer Dabbelt
2018-07-04RISC-V: Fix the rv32i kernel buildPalmer Dabbelt
2018-07-04RISC-V: Fix PTRACE_SETREGSET bug.Jim Wilson
2018-07-04RISC-V: Don't include irq-riscv-intc.hPalmer Dabbelt
2018-07-04riscv: remove unnecessary of_platform_populate callRob Herring
2018-07-04RISC-V: fix R_RISCV_ADD32/R_RISCV_SUB32 relocationsAndreas Schwab
2018-07-04RISC-V: Change variable type for 32-bit compatibleZong Li
2018-06-16Merge tag 'riscv-for-linus-4.18-merge_window' of git://git.kernel.org/pub/scm...Linus Torvalds
2018-06-11RISC-V: Make our port sparse-cleanPalmer Dabbelt
2018-06-11RISC-V: Handle R_RISCV_32 in modulesAndreas Schwab
2018-06-11riscv/ftrace: Export _mcount when DYNAMIC_FTRACE isn't setAlan Kao
2018-06-09riscv: split the declaration of __copy_userLuc Van Oostenryck
2018-06-08Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds
2018-06-07riscv: no __user for probe_kernel_address()Luc Van Oostenryck
2018-06-04Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds
2018-06-04perf: riscv: preliminary RISC-V supportAlan Kao
2018-05-19riscv: add swiotlb supportChristoph Hellwig
2018-05-17drivers: base: cacheinfo: setup DT cache properties earlyJeremy Linton
2018-04-25signal/riscv: Replace do_trap_siginfo with force_sig_faultEric W. Biederman
2018-04-25signal/riscv: Use force_sig_fault where appropriateEric W. Biederman
2018-04-25signal: Ensure every siginfo we send has all bits initializedEric W. Biederman
2018-04-24RISC-V: build vdso-dummy.o with -no-pieAurelien Jarno
2018-04-04Merge tag 'riscv-for-linus-4.17-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds
2018-04-04Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds
2018-04-02RISC-V: Fixes to module loadingPalmer Dabbelt
2018-04-02RISC-V: Support SUB32 relocation type in kernel moduleZong Li
2018-04-02RISC-V: Support ADD32 relocation type in kernel moduleZong Li