Age | Commit message (Expand) | Author |
---|---|---|
2018-11-01 | RISC-V: refresh defconfig | Anup Patel |
2018-08-13 | irqchip: add a SiFive PLIC driver | Christoph Hellwig |
2018-06-11 | RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfig | Palmer Dabbelt |
2018-04-02 | RISC-V: Enable module support in defconfig | Zong Li |
2018-01-07 | RISC-V: Add a basic defconfig | Karsten Merker |
2017-09-26 | RISC-V: Build Infrastructure | Palmer Dabbelt |