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2008-03-24[POWERPC] Fix Oops with TQM5200 on TQM5200Anatolij Gustschin
The "bestcomm-core" driver defines its of_match table as follows static struct of_device_id mpc52xx_bcom_of_match[] = { { .type = "dma-controller", .compatible = "fsl,mpc5200-bestcomm", }, { .type = "dma-controller", .compatible = "mpc5200-bestcomm", }, {}, }; so while registering the driver, the driver's probe function won't be called, because the device tree node doesn't have a device_type property. Thus the driver's bcom_engine structure won't be allocated. Referencing this structure later causes observed Oops. Checking bcom_eng pointer for NULL before referencing data pointed by it prevents oopsing, but fec driver still doesn't work (because of the lost bestcomm match and resulted task allocation failure). Actually the compatible property exists and should match and so the fec driver should work. This removes .type = "dma-controller" from the bestcomm driver's mpc52xx_bcom_of_match table to solve the problem. Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-24[POWERPC] mpc5200: Fix null dereference if bestcomm fails to initializeGrant Likely
If the bestcomm initialization fails, calls to the task allocate function should fail gracefully instead of oopsing with a NULL deref. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-24[POWERPC] Fix crash in init_ipic_sysfs on efikaOlaf Hering
The global primary_ipic in arch/powerpc/sysdev/ipic.c can remain NULL if ipic_init() fails, which will happen on machines that don't have an ipic interrupt controller. init_ipic_sysfs() will crash in that case. Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-24[POWERPC] Don't use 64k pages for ioremap on pSeriesPaul Mackerras
On pSeries, the hypervisor doesn't let us map in the eHEA ethernet adapter using 64k pages, and thus the ehea driver will fail if 64k pages are configured. This works around the problem by always using 4k pages for ioremap on pSeries (but not on other platforms). A better fix would be to check whether the partition could ever have an eHEA adapter, and only force 4k pages if it could, but this will do for 2.6.25. This is based on an earlier patch by Tony Breeds. Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-20[POWERPC] Update some defconfigsPaul Mackerras
Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-20[POWERPC] Hide resources on Axon PCIE root complex nodesMichael Ellerman
The PCI bridge representing the PCIE root complex on Axon, contains device BARs for a memory range and ROM that define inbound accesses. This confuses the kernel resource management code -- the resources need to be hidden when Axon is a host bridge. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-20[POWERPC] Fix cell IOMMU code to cope with empty dma-ranges and non-PCI devicesMichael Ellerman
The cell IOMMU code to parse the dma-ranges properties, used for the fixed mapping, was broken in two ways for some devices. Firstly it didn't cope with empty dma-ranges properties. An empty property implies no translation so can be safely skipped. The code also wrongly assumed it would be looking at PCI devices, and hard coded the number of address and size cells. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-20[POWERPC] Fix build failure for tqm8540 and sbc85xx defconfigsPaul Gortmaker
The wrapper script didn't have entries for the TQM8540 board and the SBC8548 or SBC8560 boards. I've assumed that the TQM8540 console is 8250 based and not CPM based by looking at its defconfig. There was also a trailing * on the TQM8555 entry that I removed too. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-20[POWERPC] Fix PMU + soft interrupt disable bugAnton Blanchard
Since the PMU is an NMI now, it can come at any time we are only soft disabled. We must hard disable around the two places we allow the kernel stack SLB and r1 to go out of sync. Otherwise the PMU exception can force a kernel stack SLB into another slot, which can lead to it getting evicted, which can lead to a nasty unrecoverable SLB miss in the exception entry code. Signed-off-by: Anton Blanchard <anton@samba.org> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-20[POWERPC] user_regset PTRACE_SETREGS regression fixRoland McGrath
The PTRACE_SETREGS request was only recently added on powerpc, and gdb does not use it. So it slipped through without getting all the testing it should have had. The user_regset changes had a simple bug in storing to all of the 32-bit general registers block on 64-bit kernels. This bug only comes up with PTRACE_SETREGS, not PPC_PTRACE_SETREGS. It causes a BUG_ON to hit, so this fix needs to go in ASAP. Signed-off-by: Roland McGrath <roland@redhat.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-13[POWERPC] Fix large hash table allocation on Cell bladesMichael Ellerman
My recent hack to allocate the hash table under 1GB on cell was poorly tested, *cough*. It turns out on blades with large amounts of memory we fail to allocate the hash table at all. This is because RTAS has been instantiated just below 768MB, and 0-x MB are used by the kernel, leaving no areas that are both large enough and also naturally-aligned. For the cell IOMMU hack the page tables must be under 2GB, so use that as the limit instead. This has been tested on real hardware and boots happily. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-13[POWERPC] Export empty_zero_pageTheodore Ts'o
Once again, this time with feeling.... - Ted >From c91cfaabc17f8a53807a2f31f067a732e34a1550 Mon Sep 17 00:00:00 2001 From: Theodore Ts'o <tytso@mit.edu> Date: Wed, 12 Mar 2008 11:50:39 -0400 Subject: Export empty_zero_page The empty_zero_page symbol is exported by most other architectures (s390, ia64, x86, um), and an upcoming ext4 patch needs it because ZERO_PAGE() references empty_zero_page, and we need it to zero out an unitialized extents in ext4 files. Signed-off-by: "Theodore Ts'o" <tytso@mit.edu> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-13[POWERPC] Fix arch/powerpc/platforms/powermac/pic.c when !CONFIG_ADB_PMUTony Breeds
When building arch/powerpc/platforms/powermac/pic.c when !CONFIG_ADB_PMU we get the following warnings: arch/powerpc/platforms/powermac/pic.c: In function 'pmacpic_find_viaint': arch/powerpc/platforms/powermac/pic.c:623: warning: label 'not_found' defined but not used This fixes it. Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-13[POWERPC] Fix bogus test for unassigned PCI resourcesBenjamin Herrenschmidt
A bogus test for unassigned resources that came from our 32-bit PCI code ended up being "merged" by my previous patch series, breaking some 64-bit setups where devices have legal resources ending at 0xffffffff. This fixes it by completely changing the test. We now test for res->start == 0, as the generic code expects, and we also only do so on platforms that don't have the PPC_PCI_PROBE_ONLY flag set, as there are cases of pSeries and iSeries where it could be a valid value and those can't reassign devices. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-13[POWERPC] Fix zImage-dtb.initrd build errorGrant Likely
The pattern substitution rules were failing when used with zImage-dtb targets. If zImage-dtb.initrd was selected, the pattern substitution would generate "zImage.initrd-dtb" instead of "zImage-dtb.initrd" which caused the build to fail. This renames zImage-dtb to dtbImage to avoid the problem entirely. By not using the zImage prefix then is no potential for namespace collisions. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-13[POWERPC] Add __ucmpdi2 for 64-bit comparisons in 32-bit kernelsPaul Mackerras
Some drivers (such as V4L2) have code that causes gcc to generate calls to __ucmpdi2 when compiling for 32-bit powerpc, which results in either a link-time error or a module that can't be loaded, as we don't currently have a __ucmpdi2. This adds one so these drivers can be used. Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-12Merge branch 'master' of ↵Paul Mackerras
git://git.kernel.org/pub/scm/linux/kernel/git/jk/spufs into merge
2008-03-11[POWERPC] spufs: fix rescheduling of non-runnable contextsJeremy Kerr
At present, we can hit the BUG_ON in __spu_update_sched_info by reading the regs file of a context between two calls to spu_run. The spu_release_saved called by spufs_regs_read() is resulting in the (now non-runnable) context being placed back on the run queue, so the next call to spu_run ends up in the bug condition. This change uses the SPU_SCHED_SPU_RUN flag to only reschedule a context if it's still in spu_run(). Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
2008-03-11[POWERPC] spufs: don't (ab)use SCHED_IDLEJeremy Kerr
commit 4ef11014 introduced a usage of SCHED_IDLE to detect when a context is within spu_run. Instead of SCHED_IDLE (which has other meaning), add a flag to sched_flags to tell if a context should be running. Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
2008-03-10[POWERPC] QE: Make qe_get_firmware_info reentrantIonut Nicu
The function was returning NULL the second time it was called if the firmware was uploaded from the boot loader or the first time it was called if the firmware was uploaded from the kernel. Signed-off-by: Ionut Nicu <ionut.nicu@freescale.com> Acked-By: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-10[POWERPC] 83xx: Make 83xx perfmon support selectableAndy Fleming
Not all e300 cores support the performance monitors, and the ones that don't will be confused by the mf/mtpmr instructions. This allows the support to be optional, so the 8349 can turn it off while the 8379 can turn it on. Sadly, those aren't config options, so it will be left to the defconfigs and the users to make that determination. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-07[POWERPC] 85xx: sbc8548 - Fix incorrect PCI-X and PCI interrupt mapJeremy McNicoll
The following patch allows interrupts to occur on the sbc8548. Currently PCI and PCI-X devices get assigned an IRQ but the interrupt count never increases. This solves the problem and adds PCI support as well. Signed-off-by: Jeremy McNicoll <jeremy.mcnicoll@windriver.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-07[POWERPC] QE: Fix QE firmware uploading limitTimur Tabi
Fix a typo in qe_upload_firmware() that prevented uploading firmware on systems with more than one RISC core. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-07[POWERPC] 8xx: Fix wrapper platform for adder875, and combine defconfigs.Scott Wood
This fixes the following bug: http://ozlabs.org/pipermail/linuxppc-dev/2008-February/051979.html Separate defconfigs are no longer needed now that CONFIG_DEVICE_TREE is gone. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-07[POWERPC] 8xx: fix swapVitaly Bordug
This makes swap routines operate correctly on the ppc_8xx based machines. Code has been revalidated on mpc885ads (8M sdram) with recent kernel. Based on patch from Yuri Tikhonov <yur@emcraft.com> to do the same on arch/ppc instance. Recent kernel's size makes swap feature very important on low-memory platforms, those are actually non-operable without it. Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-07[POWERPC] 83xx: Add local bus device nodes to MPC837xMDS device trees.Li Yang
Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-07[POWERPC] 83xx: Fix wrong USB phy type in mpc837xmds dtsLi Yang
Due to chip constraint MPC837x USB DR module can only use ULPI and serial PHY interfaces. The patch fixes the wrong type in dts. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-04Kprobes: indicate kretprobe support in KconfigAnanth N Mavinakayanahalli
Add CONFIG_HAVE_KRETPROBES to the arch/<arch>/Kconfig file for relevant architectures with kprobes support. This facilitates easy handling of in-kernel modules (like samples/kprobes/kretprobe_example.c) that depend on kretprobes being present in the kernel. Thanks to Sam Ravnborg for helping make the patch more lean. Per Mathieu's suggestion, added CONFIG_KRETPROBES and fixed up dependencies. Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Acked-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-03-03Merge branch 'for-2.6.25' of ↵Paul Mackerras
master.kernel.org:/pub/scm/linux/kernel/git/arnd/cell-2.6 into merge
2008-03-03[POWERPC] Convert the cell IOMMU fixed mapping to 16M IOMMU pagesMichael Ellerman
The only tricky part is we need to adjust the PTE insertion loop to cater for holes in the page table. The PTEs for each segment start on a 4K boundary, so with 16M pages we have 16 PTEs per segment and then a gap to the next 4K page boundary. It might be possible to allocate the PTEs for each segment separately, saving the memory currently filling the gaps. However we'd need to check that's OK with the hardware, and that it actually saves memory. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] Allow for different IOMMU page sizes in cell IOMMU codeMichael Ellerman
Make some preliminary changes to cell_iommu_alloc_ptab() to allow it to take the page size as a parameter rather than assuming IOMMU_PAGE_SIZE. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] Cell IOMMU: n_pte_pages is in 4K page units, not IOMMU_PAGE_SIZEMichael Ellerman
We use n_pte_pages to calculate the stride through the page tables, but we also use it to set the NPPT value in the segment table entry. That is defined as the number of 4K pages per segment, so we should calculate it as such regardless of the IOMMU page size. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] Split setup of IOMMU stab and ptab, allocate dynamic/fixed ptabs ↵Michael Ellerman
separately Currently the cell IOMMU code allocates the entire IOMMU page table in a contiguous chunk. This is nice and tidy, but for machines with larger amounts of RAM the page table allocation can fail due to it simply being too large. So split the segment table and page table setup routine, and arrange to have the dynamic and fixed page tables allocated separately. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] Move allocation of cell IOMMU pad pageMichael Ellerman
There's no need to allocate the pad page unless we're going to actually use it - so move the allocation to where we know we're going to use it. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] Remove unused pte_offset variableMichael Ellerman
The cell IOMMU code no longer needs to save the pte_offset variable separately, it is incorporated into tbl->it_offset. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] Use it_offset not pte_offset in cell IOMMU codeMichael Ellerman
The cell IOMMU tce build and free routines use pte_offset to convert the index passed from the generic IOMMU code into a page table offset. This takes into account the SPIDER_DMA_OFFSET which sets the top bit of every DMA address. However it doesn't cater for the IOMMU window starting at a non-zero address, as the base of the window is not incorporated into pte_offset at all. As it turns out tbl->it_offset already contains the value we need, it takes into account the base of the window and also pte_offset. So use it instead! Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] Clearup cell IOMMU fixed mapping terminologyMichael Ellerman
It's called the fixed mapping, not the static mapping. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] enable hardware watchpoints on cell bladesJens Osterkamp
Ulrich Weigand has found that the hardware watchpoints on cell were not working back in November : http://ozlabs.org/pipermail/linuxppc-dev/2007-November/046135.html This patch sets them during initialization. Signed-off-by: Jens Osterkamp <jens@de.ibm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] move celleb DABRX definitionsJens Osterkamp
This moves the private DABRX definitions for celleb from beat.h to reg.h to make them usable for all. Signed-off-by: Jens Osterkamp <jens@de.ibm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] OProfile: enable callgraph support for CellBob Nelson
This patch enables OProfile callgraph support for the Cell processor. The original code was just calling a function to add the PC value, now it will call a function that first checks the callgraph depth. Callgraph is already enabled on the other Power platforms. Signed-off-by: Bob Nelson <rrnelson@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03Merge branch 'master' of ↵Paul Mackerras
git://git.kernel.org/pub/scm/linux/kernel/git/jk/spufs into merge
2008-03-03Merge branch 'for-2.6.25' of ↵Paul Mackerras
master.kernel.org:/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx into merge
2008-02-29[POWERPC] spufs: fix use time accounting on SPE-overcommitAndre Detsch
The spu_runcntl_RW register is restored within spu_restore function. So, at the end of spu_bind_context, the SPU context is not just loaded, but running. This change corrects the state switch to account the time as USER. Signed-off-by: Andre Detsch <adetsch@br.ibm.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
2008-02-29[POWERPC] spufs: serialize SLB invalidation against SLB loadingArnd Bergmann
There is a potential race between flushes of the entire SLB in the MFC and the point where new entries are being established. The problem is that we might put a ESID entry into the MFC SLB when the VSID entry has just been cleared by the global flush. This can be circumvented by holding the register_lock throughout both the flushing and the creation of SLB entries. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
2008-02-29[POWERPC] spufs: invalidate SLB translation before adding a new entryArnd Bergmann
When we replace an SLB entry in the MFC after using up all the available entries, there is a short window in which an incorrect entry is marked as valid. The problem is that the 'valid' bit is stored in the ESID, which is always written after the VSID. Overwriting the VSID first will make the original ESID entry point to the new VSID, which means that any concurrent DMA accessing the old ESID ends up being redirected to the new virtual address. A few cycles later, we write the new ESID and everything is fine again. That race can be closed by writing a zero entry to the ESID first, which makes sure that the VSID is not accessed until we write the new ESID. Note that we don't actually need to invalidate the SLB entry using the invalidation register, which would also flush any ERAT entries for that segment, because the segment translation does not become invalid but is only removed from the SLB cache. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
2008-02-29[POWERPC] spufs: synchronize IRQ when disablingArnd Bergmann
There is a small race between the context save procedure and the SPU interrupt handling, where we expect all interrupt processing to have finished after disabling them, while an interrupt is still being processed on another CPU. The obvious fix is to call synchronize_irq() after disabling the interrupts at the start of the context save procedure to make sure we never access the SPU any more during an ongoing save or even after that. Thanks to Benjamin Herrenschmidt for pointing this out. Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
2008-02-29[POWERPC] spufs: fix order of sputrace thread IDsJeremy Kerr
Currently, we get the following output from sputrace: [5.097935954] 1606: spufs_ps_nopfn__enter (thread = 1605, spu = -1) [5.097958164] 1606: spufs_ps_nopfn__insert (thread = 1605, spu = 15) [5.097973529] 1607: spufs_ps_nopfn__enter (thread = 1605, spu = -1) [5.097989174] 1607: spufs_ps_nopfn__insert (thread = 1605, spu = 14) Which leads me to believe that 160[67] is the current thread ID, and 1605 is the context backing the psmap. However, the 'current' and 'owner' tids are reversed - the 'current' tid is on the right. This change puts the current thread ID in the left-hand column instead, and renames the right to 'ctxthread'. Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
2008-02-28[POWERPC] 4xx: Use correct board info structure in cuboot wrappersJosh Boyer
Correct the remaining 44x cuboot wrappers to define TARGET_4xx as well. This creates the correct structure to use, including things like the second MAC address. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-02-28[POWERPC] spufs: fix invalid scheduling of forgotten contextsJeremy Kerr
At present, we have a situation where a context with no owner is re-scheduled by spu_forget: Thread 1: reading regs file Thread 2: context owner spu_forget() - ctx->owner = NULL - set SPU_SCHED_WAS_ACTIVE spu_acquire_saved() - context is in saved state spu_release_saved() - SPU_SCHED_WAS_ACTIVE is set, so spu_activate() the context, which now has no owner In spu_forget(), we shouldn't be requesting a re-schedule by setting SPU_SCHED_WAS_ACTIVE. This change removes the set_bit in spu_forget(), so that spu_release_saved() doesn't reinsert this destroyed context on to the run queue. Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
2008-02-27[POWERPC] 44x: add missing define TARGET_4xx and TARGET_440GX to cuboot-taishanValentine Barshak
In order to get the proper boad info (bd_info) structure defined in ppcboot.h both TARGET_4xx and TARGET_44x should be defined for all PowerPC 440 boards. The 440GX boards also need TARGET_440GX defined since they have 4 EMACs and there are 4 MAC addesses in bd_info passed by u-boot. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>