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2012-03-20Merge branch 'sched-core-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull scheduler changes for v3.4 from Ingo Molnar * 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (27 commits) printk: Make it compile with !CONFIG_PRINTK sched/x86: Fix overflow in cyc2ns_offset sched: Fix nohz load accounting -- again! sched: Update yield() docs printk/sched: Introduce special printk_sched() for those awkward moments sched/nohz: Correctly initialize 'next_balance' in 'nohz' idle balancer sched: Cleanup cpu_active madness sched: Fix load-balance wreckage sched: Clean up parameter passing of proc_sched_autogroup_set_nice() sched: Ditch per cgroup task lists for load-balancing sched: Rename load-balancing fields sched: Move load-balancing arguments into helper struct sched/rt: Do not submit new work when PI-blocked sched/rt: Prevent idle task boosting sched/wait: Add __wake_up_all_locked() API sched/rt: Document scheduler related skip-resched-check sites sched/rt: Use schedule_preempt_disabled() sched/rt: Add schedule_preempt_disabled() sched/rt: Do not throttle when PI boosting sched/rt: Keep period timer ticking when rt throttling is active ...
2012-03-20highmem: kill all __kmap_atomic()Cong Wang
[swarren@nvidia.com: highmem: Fix ARM build break due to __kmap_atomic rename] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Cong Wang <amwang@redhat.com>
2012-03-20powerpc: remove the second argument of k[un]map_atomic()Cong Wang
Signed-off-by: Cong Wang <amwang@redhat.com>
2012-03-18powerpc/mpc5200: update mpc5200_defconfig to fit for charon boardHeiko Schocher
Add following options to mpc5200_defconfig: - CONFIG_MTD_PLATRAM=y (selects CONFIG_MTD_RAM, so this is removed) - CONFIG_FIXED_PHY=y - CONFIG_SENSORS_LM80=y - CONFIG_FB_FOREIGN_ENDIAN=y - CONFIG_FB_SM501=m - CONFIG_RTC_DRV_DS1374=y Signed-off-by: Heiko Schocher <hs@denx.de> cc: Grant Likely <grant.likely@secretlab.ca> cc: Wolfgang Denk <wd@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2012-03-17powerpc/44x: Add additional device support for APM821xx SoC and Bluestone boardVinh Nguyen Huu Tuong
This patch updates the dts file for bluestone board with support: - UART1 - L2 cache - NAND with NDFC - PCI-E Signed-off-by: Vinh Nguyen Huu Tuong <vhtnguyen@apm.com> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
2012-03-17powerpc/44x: Add support PCI-E for APM821xx SoC and Bluestone boardVinh Nguyen Huu Tuong
This patch extends PCI-E driver to support PCI-E for APM821xx SoC on Bluestone board. Signed-off-by: Vinh Nguyen Huu Tuong <vhtnguyen@apm.com> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
2012-03-17powerpc/44x: The bug fixed support for APM821xx SoC and Bluestone boardVinh Nguyen Huu Tuong
This patch consists of: - Fix the pvr mask for checking pvr in cputable.c - Fix the cpu name as consistent with cpu name is describled in dts file Signed-off-by: Vinh Nguyen Huu Tuong <vhtnguyen@apm.com> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
2012-03-16powerpc: add support for MPIC message register APIJia Hongtao
Some MPIC implementations contain one or more blocks of message registers that are used to send messages between cores via IPIs. A simple API has been added to access (get/put, read, write, etc ...) these message registers. The available message registers are initially discovered via nodes in the device tree. A separate commit contains a binding for the message register nodes. Signed-off-by: Meador Inge <meador_inge@mentor.com> Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/fsl: Added aliased MSIIR register address to MSI node in dtsDiana CRACIUN
The MSIIR register for each MSI bank is aliased to a different address. The MSI node reg property was updated to contain this address: e.g. reg = <0x41600 0x200 0x44140 4>; The first region contains the address and length of the MSI register set and the second region contains the address of the aliased MSIIR register at 0x44140. Signed-off-by: Diana CRACIUN <Diana.Craciun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: mpc8548cds - add 36-bit dtsZhao Chenhui
Create mpc8548cds_36b.dts. Support 36-bit mode. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Refactor mpc8548cds device treeZhao Chenhui
* Create mpc8548cds.dtsi * Move lbc, soc and pci0 nodes to mpc8548cds_32b.dtsi * Change cuImage.mpc8548cds to cuImage.mpc8548cds_32b * Rename mpc8548cds.dts to mpc8548cds_32b.dts Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: mpc8548cds - Add FPGA node to dtschenhui zhao
Remove FPGA(CADMUS) macros in code. Move it to dts. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: mpc8548cds - fix alias in mpc8548si-pre.dtsiZhao Chenhui
Correct ethernet1 and add ethernet2 and ethernet3. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: mpc8548cds - Add RapidIO node to dtschenhui zhao
Enable RapidIO and add rapidio and rmu nodes to dts. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: mpc8548cds - Add NOR flash node to dtschenhui zhao
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: mpc85xxcds - Fix PCI I/O space resource of PCI bridgechenhui zhao
There is a PCI bridge(Tsi310) between the MPC8548 and a VIA southbridge chip. The bootloader sets the PCI bridge to open a window from 0x0000 to 0x1fff on the PCI I/O space. But the kernel can't set the I/O resource. In the routine pci_read_bridge_io(), if the base which is read from PCI_IO_BASE is equal to zero, the routine don't set the I/O resource of the child bus. To allow the legacy I/O space on the VIA southbridge to be accessed, use the fixup to fix the PCI I/O space of the PCI bridge. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add Quicc Engine support for p1025rdbZhicheng Fan
Signed-off-by: Zhicheng Fan <b32736@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Abstract common define of signal multiplex control for qeZhicheng Fan
The mpc85xx_rdb and mpc85xx_mds have commom define of signal multiplex for qe, so they need to go in common header, the patch abstract them to fsl_guts.h Signed-off-by: Zhicheng Fan <b32736@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: allow CONFIG_PHYS_64BIT to be selectableTimur Tabi
Remove the "select PHYS_64BIT" from the Kconfig entry for the P1022DS, so that large physical address support is a selectable option for non-CoreNet reference boards. The option is enabled in mpc85xx_[smp_]defconfig so that the default is unchanged. However, now it can be deselected. The P1022DS had this option defined because the default device tree for this board uses 36-bit addresses. This had the side-effect of forcing this option on for all boards that use mpc85xx_[smp_]defconfig. Some users may want to disable this feature to create an optimized configuration for boards with <= 2GB of RAM. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: l2sram - Add compatible entry for mpc8548 L2 controllerchenhui zhao
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/dts: fix the compatible string of sec 4.0Liu Shuo
Fix the compatible string of sec 4.0 to match with CAAM driver according to Documentation/devicetree/bindings/crypto/fsl-sec4.txt Signed-off-by: Liu Shuo <shuo.liu@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add missing config option for CACHE SRAM codeClaudiu Manoil
fsl_85xx_l2ctlr.o and fsl_85xx_cache_sram.o are built only if CONFIG_FSL_85XX_CACHE_SRAM is defined. The driver that qualifies and wants to make use of the CACHE SRAM's exported API (i.e. a freescale net driver) should (be able to) select this config option. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Fix compiler error with THIS_MODULE and relatedClaudiu Manoil
CC arch/powerpc/sysdev/fsl_85xx_l2ctlr.o arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:209:13: error: 'THIS_MODULE' undeclared here (not in a function) arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:229:20: error: expected declaration specifiers or '...' before string constant cc1: warnings being treated as errors arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:229:1: error: data definition has no type or storage class arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:229:1: error: type defaults to 'int' in declaration of 'MODULE_DESCRIPTION' arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:229:20: error: function declaration isn't a prototype arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:230:16: error: expected declaration specifiers or '...' before string constant arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:230:1: error: data definition has no type or storage class arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:230:1: error: type defaults to 'int' in declaration of 'MODULE_LICENSE' arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:230:16: error: function declaration isn't a prototype make[1]: *** [arch/powerpc/sysdev/fsl_85xx_l2ctlr.o] Error 1 ... CC arch/powerpc/sysdev/fsl_85xx_cache_sram.o cc1: warnings being treated as errors arch/powerpc/sysdev/fsl_85xx_cache_sram.c:69:1: error: data definition has no type or storage class arch/powerpc/sysdev/fsl_85xx_cache_sram.c:69:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' arch/powerpc/sysdev/fsl_85xx_cache_sram.c:69:1: error: parameter names (without types) in function declaration arch/powerpc/sysdev/fsl_85xx_cache_sram.c:80:1: error: data definition has no type or storage class arch/powerpc/sysdev/fsl_85xx_cache_sram.c:80:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' arch/powerpc/sysdev/fsl_85xx_cache_sram.c:80:1: error: parameter names (without types) in function declaration make[1]: *** [arch/powerpc/sysdev/fsl_85xx_cache_sram.o] Error 1 Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Acked-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/83xx: mpc836x - fix failed phy detection for ucc ethernet on MDSPaul Gortmaker
The mpc836x_mds platform has been broken since the commit 6fe3264945ee63292cdfb27b6e95bc52c603bb09 "netdev/phy: Use mdiobus_read() so that proper locks are taken" which caused the fsl_pq_mdio TBI autoprobe to oops. The oops was "fixed" in commit 28d8ea2d568534026ccda3e8936f5ea1e04a86a1 "fsl_pq_mdio: Clean up tbi address configuration" by simply removing the the autoscan code, and making tbi nodes mandatory. Some of the newer reference platforms were updated to have tbi nodes in 220669495bf8b68130a8218607147c7b74c28d2b "powerpc: Add TBI PHY node to first MDIO bus" but the older mpc836x didn't get one and hence was just failing with -EBUSY as follows: fsl-pq_mdio: probe of e0102120.mdio failed with error -16 ... net eth0: Could not attach to PHY eth0: Cannot initialize PHY, aborting. Add a TBI node and use the 1st free address for it. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: p1022ds: enable monitor switching via pixis indirect modeTimur Tabi
When the P1022's DIU video controller is active, the pixis must be accessed in "indirect" mode, which uses localbus chip select addresses. Switching between the DVI and LVDS monitor ports is handled by the pixis, so that switching needs to be done via indirect mode. This has the side-effect of no longer requiring U-Boot to enable the DIU. Now Linux can enable the DIU all by itself. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Board support for GE IMP3AMartyn Welch
Initial board support for the GE IMP3A, a 3U compactPCI card with a p2020 processor. Signed-off-by: Martyn Welch <martyn.welch@ge.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc: Move GE PIC driversMartyn Welch
Move the GE PIC drivers to allow these to be used by non-86xx boards. Signed-off-by: Martyn Welch <martyn.welch@ge.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16gpio: Move GE GPIO driver to reside within GPIO subsystemMartyn Welch
The GE GPIO driver provides basic support (set direction, read/write state) for the GPIO provided on some GE single board computers. This patch moves the driver from the 86xx specific platform directrory to the GPIO subsystem so that it can be used on non-86xx boards. Signed-off-by: Martyn Welch <martyn.welch@ge.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc: Add GE FPGA config optionMartyn Welch
This patch adds the GE_FPGA configuration option. This is being carried out as ground work to allow the PIC and GPIO drivers to be move from the powerpc 86xx platform directory to more general locations to allow them to be used on non-86xx boards and to reduce churn when further boards using these drivers are added. Signed-off-by: Martyn Welch <martyn.welch@ge.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add dts for p1020rdb-pc boardZhicheng Fan
P1020RDB-PC Overview ------------------ 1Gbyte DDR3 SDRAM 32 Mbyte NAND flash 10 16Mbyte NOR flash 16 Mbyte SPI flash SD connector to interface with the SD memory card Real-time clock on I2C bus PCIe: - x1 PCIe slot - x1 mini-PCIe slot 10/100/1000 BaseT Ethernet ports: - eTSEC1, RGMII: one 10/100/1000 port using VitesseTM VSC7385 L2 switch - eTSEC2, SGMII: one 10/100/1000 port using VitesseTM VSC8221 - eTSEC3, RGMII: one 10/100/1000 port using AtherosTM AR8021 USB 2.0 port: - Two USB2.0 Type A receptacles - One USB2.0 signal to Mini PCIe slot Dual RJ45 UART ports: - DUART interface: supports two UARTs up to 115200 bps for console display Signed-off-by: Zhicheng Fan <b32736@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add p1020rdb-pc platform supportZhicheng Fan
Signed-off-by: Zhicheng Fan <b32736@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: add P1020UTM-PC platform supportJerry Huang
The p1020utm-pc has the similar feature as the p1020rdb. Therefore, p1020utm-pc use the same platform file as the p1/p2 rdb board. Overview of P1020UTM-PC platform: - DDR3 1GB - NOR flash 32MB - I2C EEPROM 256Kb - eTSEC1 (RGMII PHY Atheros AR8021) - eTSEC2 (SGMII PHY Vitesse VSC8221) - eTSEC3 (RGMII PHY Atheros AR8021) - SDHC - 2 USB ports - PCIe (Lane1 to dual SATA controller) Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: add P1020MBG-PC platform supportJerry Huang
The p1020mbg-pc has the similar feature as the p1020rdb. Therefore, p1020mbg-pc use the same platform file as the p1/p2 rdb board. Overview of P1020MBG-PC platform: - DDR3 2GB - NOR flash 64MB - I2C EEPROM 256Kb - eTSEC1 (RGMII PHY) connected to VSC7385 L2 switch - eTSEC2 (SGMII PHY) - eTSEC3 (RGMII PHY) - SDHC - 2 USB ports - 4 TDM ports - PCIe (Lane1 to dual SATA controller) Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Clean up partition nodes in dts for MPC8572DSJia Hongtao
Signed-off-by: Jin Qing <b24347@freescale.com> Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: p1022ds: disable the NOR flash node if video is enabledTimur Tabi
The Freescale P1022 has a unique pin muxing "feature" where the DIU video controller's video signals are muxed with 24 of the local bus address signals. When the DIU is enabled, the bulk of the local bus is disabled, preventing access to memory-mapped devices like NOR flash and the pixis FPGA. Therefore, if the DIU is going to be enabled, then memory-mapped devices on the localbus, like NOR flash, need to be disabled. This also means that the localbus is not a 'simple-bus' any more, so remove that string from the compatible node. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: create 32-bit DTS for the P1022DSTimur Tabi
Create a 32-bit address space version of p1022ds.dts. To avoid confusion, p1022ds.dts is renamed to p1022ds_36b.dts. We also create p1022ds.dtsi to store some common nodes. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add magic-packet properties for etsecXie Xiaobo
The properties indicates that the hardware supports waking up via magic packet. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add some DTS nodes and attributes for mpc8536dsXie Xiaobo
Add partitions for NOR and NAND Flash. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/fsl_msi: return proper error value when ioremap failed.Liu Shuo
Signed-off-by: Liu Shuo <soniccat.liu@gmail.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: fix typo in p1010rdb.dtsiGustavo Zacarias
Fix typo introduced by "powerpc: Add TBI PHY node to first MDIO bus" from Andy Fleming. It's device_type rather than device-type, which causes the mdio probe to fail thus making all gianfar ethernet interfaces unusable. Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: p2020rdb & p1010rdb - lower spi flash freq to 40MhzSebastian Andrzej Siewior
This is here most likely since the FSL bsp. Back in the FSL bsp it was set to 50Mhz and working. However the driver divided the SoC freq. only by 2. According to the TRM the platform clock (which the manual refers in its formula) is the system clock divided by two. So in the end it has to divide by 4 and this is what the fsl-spi driver in tree is doing. Since then the flash is not wokring I guess. After chaning the freq from 50Mhz to 40Mhz like others do then I can access the flash. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: p2020rdb - move the NAND address.Sebastian Andrzej Siewior
It is not at 0xffa00000. According to current u-boot source the NAND controller is always at 0xff800000 and it is either at CS0 or CS1 depending on NAND or NAND+NOR mode. In 36bit mode it is shifted to 0xfff800000 but it has always an eight there and never an A. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/srio: Fix the compile errors when building with 64bitLiu Gang
For the file "arch/powerpc/sysdev/fsl_rmu.c", there will be some compile errors while using the corenet64_smp_defconfig: .../fsl_rmu.c:315: error: cast from pointer to integer of different size .../fsl_rmu.c:320: error: cast to pointer from integer of different size .../fsl_rmu.c:320: error: cast to pointer from integer of different size .../fsl_rmu.c:320: error: cast to pointer from integer of different size .../fsl_rmu.c:330: error: cast to pointer from integer of different size .../fsl_rmu.c:332: error: cast to pointer from integer of different size .../fsl_rmu.c:339: error: cast to pointer from integer of different size .../fsl_rmu.c:340: error: cast to pointer from integer of different size .../fsl_rmu.c:341: error: cast to pointer from integer of different size .../fsl_rmu.c:348: error: cast to pointer from integer of different size .../fsl_rmu.c:348: error: cast to pointer from integer of different size .../fsl_rmu.c:348: error: cast to pointer from integer of different size .../fsl_rmu.c:659: error: cast from pointer to integer of different size .../fsl_rmu.c:659: error: format '%8.8x' expects type 'unsigned int', but argument 5 has type 'size_t' .../fsl_rmu.c:985: error: cast from pointer to integer of different size .../fsl_rmu.c:997: error: cast to pointer from integer of different size Rewrote the corresponding code with the support of 64bit building. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reported-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/srio: Fix the relocation errors when building with 64bitLiu Gang
For the file "arch/powerpc/sysdev/fsl_rio.c", there will be some relocation errors while using the corenet64_smp_defconfig: WARNING: modpost: Found 6 section mismatch(es). To see full details build your kernel with: 'make CONFIG_DEBUG_SECTION_MISMATCH=y' GEN .version CHK include/generated/compile.h UPD include/generated/compile.h CC init/version.o LD init/built-in.o LD .tmp_vmlinux1 arch/powerpc/sysdev/built-in.o:(__ex_table+0x0): relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3208 arch/powerpc/sysdev/built-in.o:(__ex_table+0x2): relocation truncated to fit: R_PPC64_ADDR16 against `.fixup' arch/powerpc/sysdev/built-in.o:(__ex_table+0x4): relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3230 arch/powerpc/sysdev/built-in.o:(__ex_table+0x6): relocation truncated to fit: R_PPC64_ADDR16 against `.fixup'+c arch/powerpc/sysdev/built-in.o:(__ex_table+0x8): relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3250 arch/powerpc/sysdev/built-in.o:(__ex_table+0xa): relocation truncated to fit: R_PPC64_ADDR16 against `.fixup'+18 Rewrote the corresponding code with the support of 64bit building. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add dts for p1025rdb boardZhicheng Fan
P1025RDB Overview ------------------ 1Gbyte DDR3 SDRAM 32 Mbyte NAND flash 16Mbyte NOR flash 16 Mbyte SPI flash SD connector to interface with the SD memory card Real-time clock on I2C bus PCIe: - x1 PCIe slot - x1 mini-PCIe slot 10/100/1000 BaseT Ethernet ports: - eTSEC1, RGMII: one 10/100/1000 port using AtherosTM AR8021 - eTSEC2, SGMII: one 10/100/1000 port using VitesseTM VSC8221 - eTSEC3, RGMII: one 10/100/1000 port using AtherosTM AR8021 USB 2.0 port: - Two USB2.0 Type A receptacles - One USB2.0 signal to Mini PCIe slot Dual RJ45 UART ports: - DUART interface: supports two UARTs up to 115200 bps for console display Signed-off-by: Zhicheng Fan <b32736@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add p1025rdb platform supportZhicheng Fan
Signed-off-by: Zhicheng Fan <b32736@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add usb controller version infoRamneek Mehresh
Add usb controller version info for the following: MPC8536, P1010, P1020, P1021, P1022, P1023, P2020, P2041, P3041, P3060, P5020 Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add p2020rdb-pc dts supportTang Yuantian
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Tang Yuantian <b29983@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Adds Support for P2020RDB-PC boardTang Yuantian
P2020RDB-PC Board shares the same design(PCB) as P102x RDB style platforms. The difference between this platform and the already existing P2020RDB is mainly with respect to DDR. The P2020RDB-PC has a DDR3 memory. The P2020RDB-PC also has a CPLD device connected to local bus. The main differences from the P102x RDB-PC is 64-bit DDR and SYSCLK of 100Mhz. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Tang Yuantian <b29983@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Added P1021RDB-PC Platform supportXu Jiucheng
Signed-off-by: Xu Jiucheng <B37781@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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