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2012-07-24MIPS: Netlogic: SMP wakeup code updateJayachandran C
Update for core intialization code. Initialize status register after receiving NMI for CPU wakeup. Add the low level L1D flush code before enabling threads in core. Also convert the ehb to _ehb so that it works under more GCC versions. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3755/ Patchwork: https://patchwork.linux-mips.org/patch/4095/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24MIPS: Netlogic: Update comments in smpboot.SJayachandran C
No change in logic, comments update and whitespace cleanup. * A few comments in the file were in assembler style and the rest int C style, convert all of them to C style. * Mark workarounds for Ax silicon with a macro XLP_AX_WORKAROUND * Whitespace fixes - use tabs consistently * rename __config_lsu macro to xlp_config_lsu Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3749/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24MIPS: BCM63XX: Add 96328avng reference boardJonas Gorski
This allows booting to command line. Ethernet is not supported yet, but PCIe connected wireless should work. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3958/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24MIPS: Expose PCIe drivers for MIPSJonas Gorski
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3957/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24MIPS: BCM63XX: Add PCIe Support for BCM6328Jonas Gorski
Add support for the PCIe port found on BCM6328. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3956/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24MIPS: BCM63XX: Move the PCI initialization into its own functionJonas Gorski
Also make the cpu check a bit more explicit. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3953/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24MIPS: BCM63XX: Add basic BCM6328 supportJonas Gorski
This includes CPU speed, memory size detection and working UART, but lacking the appropriate drivers, no support for attached flash. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3951/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24MIPS: BCM63XX: Use the Chip ID register for identifying the SoCJonas Gorski
Newer BCM63XX SoCs use virtually the same CPU ID, differing only in the revision bits. But since they all have the Chip ID register at the same location, we can use that to identify the SoC we are running on. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3955/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24MIPS: BCM63XX: Add flash type detectionJonas Gorski
On BCM6358 and BCM6368 the attached flash type is exposed through a bootstrapping register. Use it for auto detecting the flash type on those and default to parallel flash for earlier SoCs. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3954/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24MIPS: BCM63XX: Move flash registration out of board_bcm963xx.cJonas Gorski
board_bcm963xx.c is already large enough. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3952/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24MIPS: BCM63XX: add RNG driver platform_device stubFlorian Fainelli
Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: mpm@selenic.com Cc: herbert@gondor.apana.org.au Patchwork: https://patchwork.linux-mips.org/patch/3325/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24MIPS: BCM63XX: add RNG peripheral definitionsFlorian Fainelli
Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: mpm@selenic.com Cc: herbert@gondor.apana.org.au Patchwork: https://patchwork.linux-mips.org/patch/3326/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24MIPS: BCM63XX: add support for "ipsec" clockFlorian Fainelli
This module is only available on BCM6368 so far and does not require resetting the block. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: mpm@selenic.com Cc: herbert@gondor.apana.org.au Patchwork: https://patchwork.linux-mips.org/patch/3324/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24MIPS: OCTEON: Remove some unused files.David Daney
These FPA related files are not used anywhere in the kernel. Remove them. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3892/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24MIPS: BCM63XX: Fix platform_devices idFlorian Fainelli
There is only one watchdog and VoIP DSP platform devices per board, use -1 as the platform_device id accordingly. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3313/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Add CPU support for Loongson1BKelvin Cheung
Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology (ICT) and the Chinese Academy of Sciences (CAS), which implements the MIPS32 release 2 instruction set. [ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device which also is why it identifies itself with the Legacy Vendor ID in the PrID register. When applying the patch I shoveled some code around to keep things in alphabetical order and avoid forward declarations.] Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Cc: To: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: wuzhangjin@gmail.com Cc: zhzhl555@gmail.com Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3976/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Enable vmlinuz for JZ4740Lluís Batlle i Rossell
This patch adds support for building a compressed kernel for the JZ4740 architecture. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3563/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: JZ4740: reset: Initialize hibernate wakeup counters.Maarten ter Huurne
In hibernation mode only the wakeup logic and the RTC are left running, so this is what users perceive as power down. If the counters are not initialized, the corresponding pin (typically connected to the power button) has to be asserted for two seconds before the device wakes up. Most users expect a shorter wakeup time. I took the timing values of 100 ms and 60 ms from BouKiCHi's patch for the Dingoo A320 kernel. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3563/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: JZ4740: qi_lb60: Look for NAND chip in bank 1.Maarten ter Huurne
All NanoNotes have their NAND in bank 1. Specifying the bank is required since multi-bank support was introduced. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3561/ Acked-By: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MTD: NAND: JZ4740: Multi-bank support with autodetectionMaarten ter Huurne
The platform data can now specify which external memory banks to probe for NAND chips, and in which order. Banks that contain a NAND are used and the other banks are freed. Squashed version of development done in jz-2.6.38 branch. Original patch by Lars-Peter Clausen with some bug fixes from me. Thanks to Paul Cercueil for the initial autodetection patch. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3560/ Acked-By: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Fixup ordering of micro assembler instructions.Steven J. Hill
A number of new instructions have been added to the micro assembler causing the list to no longer be in alphabetical order. This patch fixes up the name ordering. Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3789/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Unify memcpy.S and memcpy-inatomic.SDavid Daney
We can save the 451 lines of code that comprise memcpy-inatomic.S at the expense of a single instruction in the memcpy prolog. We also use an additional register (t6), so this may cause increased register pressure in some places as well. But I think the reduced maintenance burden, of not having two nearly identical implementations, makes it worth it. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Octeon: Implement Octeon specific __copy_user_inatomicDavid Daney
The generic version seems to prefetch past the end of memory. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3929/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Malta: Move PIIX4 PCI fixup to where it belongs.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: PCI: Add missing __devinit attributions to fixup functions.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Alchemy: Use kmemdup rather than duplicating its implementationThomas Meyer
The semantic patch that makes this change is available in scripts/coccinelle/api/memdup.cocci. Signed-off-by: Thomas Meyer <thomas@m3y3r.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/3058/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: loongson: use IS_ENABLED()Florian Fainelli
Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3336/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: DEC: use IS_ENABLED()Florian Fainelli
Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3333/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: TX49XX: use IS_ENABLED()Florian Fainelli
Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3335/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: TXX9: use IS_ENABLED() macroFlorian Fainelli
Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3334/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: PNX833x: use IS_ENABLED() macroFlorian Fainelli
Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3332/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Alchemy: use IS_ENABLED() macroFlorian Fainelli
Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3331/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: SMTC: Support for Multi-threaded FPUsSteven J. Hill
Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3603/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Remove dead code related to 1004K oprofile support.Steven J. Hill
Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3854/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Octeon: Use device tree to register serial ports.David Daney
Switch to using the device tree to register serial ports. Add all the ports with compatible = "cavium,octeon-3860-uart". Octeon serial ports have their own device type, required port flags, and I/O functions, so using of_serial.c is not indicated. We need to do this as late_initcall, as the 8250 driver must be initialized before we add any ports. 8250 initialization is done at device_initcall time. The OCTEON_IRQ_UART{0,1,2} symbols are removed as they are now unused and interfere with irq_domain used by the device tree code. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: Rob Herring <rob.herring@calxeda.com> Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3942/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23netdev: octeon_mgmt: Convert to use device tree.David Daney
The device tree will supply the register bank base addresses, make register addressing relative to those. PHY connection is now described by the device tree. The OCTEON_IRQ_MII{0,1} symbols are also removed as they are now unused and interfere with the irq_domain used for device tree irq mapping. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: David S. Miller <davem@davemloft.net> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/3941/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23netdev: mdio-octeon.c: Convert to use device tree.David Daney
Get the MDIO bus controller addresses from the device tree, small clean up in use of devm_* Remove, now unused, platform device setup code. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: David S. Miller <davem@davemloft.net> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/3938/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23i2c: Convert i2c-octeon.c to use device tree.David Daney
There are three parts to this: 1) Remove the definitions of OCTEON_IRQ_TWSI and OCTEON_IRQ_TWSI2. The interrupts are specified by the device tree and these hard coded irq numbers block the used of the irq lines by the irq_domain code. 2) Remove platform device setup code from octeon-platform.c, it is now unused. 3) Convert i2c-octeon.c to use device tree. Part of this includes using the devm_* functions instead of the raw counterparts, thus simplifying error handling. No functionality is changed. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: Grant Likely <grant.likely@secretlab.ca> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/3939/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Octeon: Setup irq_domains for interrupts.David Daney
Create two domains. One for the GPIO lines, and the other for on-chip sources. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3936/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Octeon: Initialize and fixup device tree.David Daney
If a compiled in device tree template is used, trim out unwanted parts based on legacy platform probing. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3935/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Prune some target specific code out of prom.cDavid Daney
This code is not common enough to be in a shared file. It is also not used by any existing boards, so just remove it. [ralf@linux-mips.org: Dropped removal of irq_create_of_mapping which was already removed by abd2363f6a5f1030b935e0bdc15cf917313b3b10 [irq_domain/mips: Allow irq_domain on MIPS]. Moved device_tree_init() and dependencies to its sole user, the XLP code.] Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: grant.likely@secretlab.ca Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2946/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Octeon: Add device tree source files.David Daney
The two device tree files octeon_3xxx.dts and octeon_68xx.dts are trimmed by code in a subsequent patch to reflect the hardware actually present on the board. To this end several properties that are not part of the declared bindings are added to aid in trimming off unwanted nodes. Since the device tree and the code that trims it are bound into the kernel binary, these 'marker' properties never escape into the wild, and are purely an implementation detail of the kernel early boot process. This is done for backwards compatibility with existing boards (identified by a board type enumeration value by their bootloaders). New boards will always pass a device tree from the bootloader, the built-in trees are ignored in this case. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3937/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: OCTEON: Consolidate the edge and level irq_chip structures.David Daney
We can consolidate octeon_irq_chip_ciu_edge and octeon_irq_chip_ciu as they only differ in the .irq_ack element, and that is unused by the level handler. This gets rid of a bunch of duplicate definitions. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3931/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: OCTEON: Remove unneeded OCTEON_IRQ_* defines.David Daney
The follow-on patch to add irq_domain support will be the supported method for using these irq lines, so get these defines out of the way in preperation for that. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3930/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Octeon: Remove use of OCTEON_IRQ_RST.David Daney
This symbol will be removed, so don't use it as part of the definition of OCTEON_IRQ_LAST. Set OCTEON_IRQ_LAST to 127 so there is space for all the automatically allocated (via irq_domain) irqs. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3946/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Octeon: Add irq handlers for GPIO interrupts.David Daney
This is needed for follow-on on patches for Octeon to use the Device Tree to configure GPIO interrupts. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3932/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: OCTEON: Remove some unused files.David Daney
These FPA related files are not used anywhere in the kernel. Remove them. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3892/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: BCM63xx: Make board setup code register the spi platform deviceFlorian Fainelli
Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Patchwork: https://patchwork.linux-mips.org/patch/3317/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: BCM63xx: Add stub to register the SPI platform driverFlorian Fainelli
This patch adds the necessary stub to register the SPI platform driver. Since the registers are shuffled between the 4 BCM63xx CPUs supported by this SPI driver we also need to generate the internal register layout and export this layout for the driver to use it properly. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Patchwork: https://patchwork.linux-mips.org/patch/3321/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: BCM63xx: Define internal registers offsets of the SPI controllerFlorian Fainelli
BCM6338, BCM6348, BCM6358 and BCM6368 basically use the same SPI controller though the internal registers are shuffled, which still allows a common driver to drive that IP block. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Patchwork: https://patchwork.linux-mips.org/patch/3318/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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