summaryrefslogtreecommitdiff
path: root/arch/mips
AgeCommit message (Collapse)Author
2013-05-09Merge branch 'next/kvm' into mips-for-linux-nextRalf Baechle
2013-05-09KVM/MIPS32: Binary patching of select privileged instructions.Sanjay Lal
Currently, the following instructions are translated: - CACHE (indexed) - CACHE (va based): translated to a SYNCI, overkill on D-CACHE operations, but still much faster than a trap. - mfc0/mtc0: the virtual COP0 registers for the guest are implemented as 2-D array. [COP#][SEL] and this is mapped into the guest kernel address space @ VA 0x0. mfc0/mtc0 operations are transformed to load/stores. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08MIPS: Export symbols used by KVM/MIPS moduleSanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08MIPS: ASM offsets for VCPU arch specific fields.Sanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08MIPS: If KVM is enabled then use the KVM specific routine to flush the TLBs ↵Sanjay Lal
on a ASID wrap. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08MIPS: Export routines needed by the KVM module.Sanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: Routines to handle specific traps/exceptions while executing the ↵Sanjay Lal
guest. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: Guest interrupt delivery.Sanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: COP0 accesses profiling.Sanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: Release notes and KVM module MakefileSanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: MMU/TLB operations for the Guest.Sanjay Lal
- Note that this file is statically linked with the rest of the host kernel (KSEG0). This is because kernel modules are loaded into mapped space on MIPS and we want to make sure that we don't get any host kernel TLB faults while manipulating TLBs. - Virtual Guest TLBs are implemented as 64 entry array regardless of the number of host TLB entries. - Shadow TLBs map Guest virtual addresses to Host physical addresses. - TLB miss handling details: Guest KSEG0 TLBMISS (0x40000000 – 0x60000000): Transparent to the Guest. Guest KSEG2/3 (0x60000000 – 0x80000000) & Guest UM TLBMISS (0x00000000 – 0x40000000) Lookup in Guest/Virtual TLB If an entry doesn’t match deliver appropriate TLBMISS LD/ST exception to the guest If entry does exist in the Guest TLB and is NOT Valid Deliver TLB invalid exception to the guest If entry does exist in the Guest TLB and is VALID Inject the TLB entry into the Shadow TLB Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: Privileged instruction/target branch emulation.Sanjay Lal
- The Guest kernel is run in UM and privileged instructions cause a trap. - If the instruction causing the trap is in a branch delay slot, the branch needs to be emulated to figure out the PC @ which the guest will resume execution. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: KVM Guest kernel support.Sanjay Lal
Both Guest kernel and Guest Userspace execute in UM. The memory map is as follows: Guest User address space: 0x00000000 -> 0x40000000 Guest Kernel Unmapped: 0x40000000 -> 0x60000000 Guest Kernel Mapped: 0x60000000 -> 0x80000000 - Guest Usermode virtual memory is limited to 1GB. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: MIPS arch specific APIs for KVMSanjay Lal
- Implements the arch specific APIs for KVM, some are stubs for MIPS - kvm_mips_handle_exit(): Main 'C' distpatch routine for handling exceptions while in "Guest" mode. - Also implements in-kernel timer interrupt support for the guest. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: Entry point for trampolining to the guest and trap handlers.Sanjay Lal
- __kvm_mips_vcpu_run: main entry point to enter guest, we save kernel context, load up guest context from and ERET to guest context. - mips32_exception: L1 exception handler(s), save k0/k1 and jump to main handlers. - mips32_GuestException: Generic exception handlers for exceptions/interrupts while in guest context. Save guest context, restore some kernel context and jump to main 'C' handler: kvm_mips_handle_exit() Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: Arch specific KVM data structures.Sanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: Infrastructure/build files.Sanjay Lal
- Add the KVM option to MIPS build files. - Add default config files for KVM host/guest kernels. - Change the link address for the Malta KVM Guest kernel to UM (0x40100000). - Add KVM Kconfig file with KVM/MIPS specific options Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08MIPS: IP27: Remove pfn_t.Ralf Baechle
In the Linux kernel traditionally pfns are represented by an unsigned long. However a few bits of the SGI IP27 platform code that were ported from IRIX are using pfn_t for historic reasons. This is conflicting with KVM's use of pfn_t. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08Merge branch 'mips-next-3.10' of ↵Ralf Baechle
git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
2013-05-08MIPS: BCM63XX: add missing clocks for BCM6328 and BCM6362Jonas Gorski
Add some mosty unused, but missing clocks for BCM6328 and BCM6362. This also fixes PCIe init on BCM6362. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5200/ Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08MIPS: ath79: make use of the new memory detection codeJohn Crispin
There is now a generic function for detecting memory size. Use this instead of the one found in the ath79 support. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5149/
2013-05-08MIPS: ralink: make use of the new memory detection codeJohn Crispin
Call detect_memory_region() from plat_mem_setup() unless the size was already read from the system controller. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5184/
2013-05-08MIPS: ralink: add memory definition for MT7620John Crispin
Populate struct soc_info with the data that describes our RAM window. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5183/
2013-05-08MIPS: ralink: add memory definition for RT3883John Crispin
Populate struct soc_info with the data that describes our RAM window. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5182/
2013-05-08MIPS: ralink: add memory definition for RT2880John Crispin
Populate struct soc_info with the data that describes our RAM window. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5181/
2013-05-08MIPS: ralink: add memory definition for RT305xJohn Crispin
Populate struct soc_info with the data that describes our RAM window. As memory detection fails on RT5350 we read the amount of available memory from the system controller. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5180/
2013-05-08MIPS: ralink: add memory definition to struct ralink_soc_infoJohn Crispin
Depending on the actual SoC we have a different base address as well as minimum and maximum size for RAM. Add these fields to the per SoC structure. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5179/
2013-05-08MIPS: add detect_memory_region()John Crispin
Add a generic way of detecting the available RAM. This function is based on the implementation already used by ath79. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5178/
2013-05-08DT: MIPS: ralink: add MT7620A dts filesJohn Crispin
Add a dtsi file for MT7620A SoC and a sample dts file. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: http://patchwork.linux-mips.org/patch/5190/
2013-05-08DT: MIPS: ralink: add RT3883 dts filesJohn Crispin
Add a dtsi file for RT3883 SoC and a sample dts file. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: http://patchwork.linux-mips.org/patch/5189/
2013-05-08DT: MIPS: ralink: add RT2880 dts filesJohn Crispin
Add a dtsi file for RT2880 SoC and a sample dts file. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: http://patchwork.linux-mips.org/patch/5188/
2013-05-08DT: MIPS: ralink: clean up RT3050 dtsi and dts fileJohn Crispin
* remove nodes for cores whose drivers are not upstream yet * add compat string for an additional soc * fix a whitespace error Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: http://patchwork.linux-mips.org/patch/5186/
2013-05-08MIPS: ralink: add cpu-feature-overrides.hGabor Juhos
Add cpu-feature-overrides.h for RT288x, RT305x and RT3883. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5175/
2013-05-08MIPS: ralink: adds support for MT7620 SoC familyJohn Crispin
Add support code for mt7620 SOC. The code detects the SoC and registers the clk / pinmux settings. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5177/
2013-05-08MIPS: ralink: adds support for RT3883 SoC familyJohn Crispin
Add support code for rt3883 SOC. The code detects the SoC and registers the clk / pinmux settings. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5185/
2013-05-08MIPS: ralink: adds support for RT2880 SoC familyJohn Crispin
Add support code for rt2880 SOC. The code detects the SoC and registers the clk / pinmux settings. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5176/
2013-05-08MIPS: ralink: add uart mask to struct ralink_pinmuxJohn Crispin
Add a field for the uart muxing mask and set it inside the rt305x setup code. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5744/
2013-05-08MIPS: ralink: add pci group to struct ralink_pinmuxGabor Juhos
This will be used for RT3662/RT3883. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5173/
2013-05-08MIPS: ralink: make the RT305x pinmuxing structure staticJohn Crispin
These structures are exported via struct ralink_pinmux rt_gpio_pinmux and can hence be static. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5172/
2013-05-08MIPS: ralink: rename gpio_pinmux to rt_gpio_pinmuxJohn Crispin
Add proper namespacing to the variable. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5171/
2013-05-08MIPS: ralink: make early_printk work on RT2880John Crispin
RT2880 has a different location for the early serial port. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5170/
2013-05-08MIPS: ralink: add RT5350 sdram register definesJohn Crispin
Add a few missing defines that are needed to make memory detection work on the RT5350. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5169/
2013-05-08MIPS: ralink: add missing comment in irq driverJohn Crispin
Trivial patch that adds a comment that makes the code more readable. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5168/
2013-05-08MIPS: ralink: fix RT305x clock setupJohn Crispin
Add a few missing clocks. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5167/
2013-05-08MIPS: ralink: add RT3352 register definesJohn Crispin
Add a few missing defines that are needed to make USB and clock detection work on the RT3352. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5166/
2013-05-08MIPS: ralink: add PCI IRQ handlingGabor Juhos
The Ralink IRQ code was not handling the PCI IRQ yet. Add this functionaility to make PCI work on rt3883. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5165/
2013-05-08MIPS: move mips_{set,get}_machine_name() to a more generic placeJohn Crispin
Previously this functionality was only available to users of the mips_machine api. Moving the code to prom.c allows us to also add a OF wrapper. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5164/
2013-05-08MIPS: octeon: Fix GPIO number in IRQ chip private dataAlexander Sverdlin
Current GPIO chip implementation in octeon-irq is still broken, even after upstream commit 87161ccdc61862c8b49e75c21209d7f79dc758e9 (MIPS: Octeon: Fix broken interrupt controller code). It works for GPIO IRQs that have reset-default configuration, but not for edge-triggered ones. The problem is in octeon_irq_gpio_map_common(), which passes modified "hw" variable (which has range of possible values 16..31) as "gpio_line" parameter to octeon_irq_set_ciu_mapping(), which saves it in private data of the IRQ chip. Later, neither octeon_irq_gpio_setup() is able to re-configure GPIOs (cvmx_write_csr() is writing to non-existent CVMX_GPIO_BIT_CFGX), nor octeon_irq_ciu_gpio_ack() is able to acknowledge such IRQ, because "mask" is incorrect. Fix is trivial and has been tested on Cavium Octeon II -based board, including both level-triggered and edge-triggered GPIO IRQs. Signed-off-by: Alexander Sverdlin <alexander.sverdlin.ext@nsn.com> Cc: David Daney <david.daney@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4980/ Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08MIPS: pci: convert to devm_ioremap_resource()Silviu-Mihai Popescu
Convert all uses of devm_request_and_ioremap() to the newly introduced devm_ioremap_resource() which provides more consistent error handling. Signed-off-by: Silviu-Mihai Popescu <silviupopescu1990@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4986/ Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08MIPS: Remove unneeded volatile from arch/mips/lib/bitops.cDavid Daney
The operations on the bitmap pointers are protected by "memory" clobbering raw_local_irq_{save,restore}(), so there is no need for volatile here. By removing the volatile we get better code generation out of the compiler. Signed-off-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4966/ Acked-by: John Crispin <blogic@openwrt.org>