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2016-05-09MIPS: oprofile: Fix a preemption issueYanjiang Jin
Use boot_cpu_type() instead of current_cpu_type() in oprofile_arch_init() to avoid the below warning, cpu_type is normally consistent in a MIPS SMP system. There are a few exceptions such as SGI servers where it is possible to mix R10000, R12000, R14000 and R16000 within certain constraints. Let's not worry about those now. BUG: using smp_processor_id() in preemptible [00000000] code: insmod/952 caller is oprofile_arch_init+0x30/0x194 [oprofile] CPU: 5 PID: 952 Comm: insmod Not tainted 4.1.13-WR8.0.0.0_standard #1 Stack : ffffffff80c10000 0000000000000001 8000000025bf0790 ffffffff80e10000 ffffffff80e50000 ffffffff80254e2c ffffffff80b64428 ffffffff80e10790 0000000000000000 ffffffff801caeb8 0000000000000045 0000000000000005 ffffffff80c10000 ffffffff801cb798 0000000000000000 ffffffff80e30000 0000000000000000 ffffffff801ff1c0 ffffffff80e2d2f8 000000000000000b ffffffff801cbba0 ffffffff80e107b0 ffffffff80a77828 0000000000000005 00000000000003b8 ffffffff80e2d2f8 800000040ad39960 ffffffff801f9950 0000000000000124 80000004093b7990 80000004093b7ab8 ffffffff80925108 ffffffff80b69a07 ffffffff80a6f0d0 8000000407240e00 ffffffff801cc934 000000000000005d ffffffff80159080 0000000000000005 00000000000003b8 ... Call Trace: [<ffffffff80159080>] show_stack+0xe8/0x108 [<ffffffff80925108>] dump_stack+0x8c/0xd8 [<ffffffff80606570>] check_preemption_disabled+0x110/0x118 [<ffffffffc0086104>] oprofile_arch_init+0x30/0x194 [oprofile] [<ffffffffc008602c>] oprofile_init+0x2c/0xc0 [oprofile] [<ffffffff80100550>] do_one_initcall+0xa0/0x1c0 [<ffffffff80921e04>] do_init_module+0x80/0x1d8 [<ffffffff801fd0d4>] load_module+0x1b74/0x2278 [<ffffffff801fdab4>] SyS_finit_module+0xcc/0xf0 [<ffffffff80165884>] handle_sysn32+0x44/0x70 [ralf@linux-mips.org: Correct commit message.] Signed-off-by: Yanjiang Jin <yanjiang.jin@windriver.com> Cc: rric@kernel.org Cc: jinyanjiang@gmail.com Cc: linux-mips@linux-mips.org Cc: oprofile-list@lists.sf.net Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11769/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-08-26MIPS: Add cases for CPU_I6400Markos Chandras
Add a CPU_I6400 case to various switch statements, doing the same thing as for CPU_P5600. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10635/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-01MIPS: Add R16000 detectionJoshua Kinard
This allows the kernel to correctly detect an R16000 MIPS CPU on systems that have those. Otherwise, such systems will detect the CPU as an R14000, due to similarities in the CPU PRId value. Signed-off-by: Joshua Kinard <kumba@gentoo.org> Cc: Linux MIPS List <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/9092/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: oprofile: Enable backtrace on timer-based profilingAaro Koskinen
Allow unsupported CPU types to use backtrace with timer-based profiling. Some CPUs (notably OCTEON) lack architecture-specific oprofile driver. In such case oprofile can fallback to timer-based mode, and arch code can still provide the backtrace functionality. So just set up the backtrace hook always. Signed-off-by: Aaro Koskinen <aaro.koskinen@nsn.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8108/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: Loongson-3: Add oprofile supportHuacai Chen
Loongson-3 has two groups of performance counters, they are 4 sub- registers of CP0's REG25. This patch add oprofile support. REG25, sel 0: Perf Control of group 0; REG25, sel 1: Perf Counter of group 0; REG25, sel 2: Perf Control of group 1; REG25, sel 3: Perf Counter of group 1. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/8328/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26MIPS: Add support for the M5150 processorLeonid Yegoshin
The M5150 core is a 32-bit MIPS RISC which implements the MIPS Architecture Release-5 in a 5-stage pipeline. In addition, it includes the MIPS Architecture Virtualization Module that enables virtualization of operating systems, which provides a scalable, trusted, and secure execution environment. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6596/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26MIPS: OProfile: Add CPU_P5600 casesJames Hogan
Add a CPU_P5600 cpu type case in oprofile_arch_init() to use the MIPS model, and in mipsxx_init() to set the cpu_type string to "mips/P5600". Signed-off-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Robert Richter <rric@kernel.org> Cc: oprofile-list@lists.sf.net Patchwork: https://patchwork.linux-mips.org/patch/6410/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-06MIPS: Add 1074K CPU support explicitly.Steven J. Hill
The 1074K is a multiprocessing coherent processing system (CPS) based on modified 74K cores. This patch makes the 1074K an actual unique CPU type, instead of a 74K derivative, which it is not. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Reviewed-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6389/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-01-22MIPS: Add support for interAptiv coresLeonid Yegoshin
The interAptiv is a power-efficient multi-core microprocessor for use in system-on-chip (SoC) applications. The interAptiv combines a multi-threading pipeline with a coherence manager to deliver improved computational throughput and power efficiency. The interAptiv can contain one to four MIPS32R3 interAptiv cores, system level coherence manager with L2 cache, optional coherent I/O port, and optional floating point unit. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6163/
2014-01-22MIPS: Add support for the proAptiv coresLeonid Yegoshin
The proAptiv Multiprocessing System is a power efficient multi-core microprocessor for use in system-on-chip (SoC) applications. The proAptiv Multiprocessing System combines a deep pipeline with multi-issue out of order execution for improved computational throughput. The proAptiv Multiprocessing System can contain one to six MIPS32r3 proAptiv cores, system level coherence manager with L2 cache, optional coherent I/O port, and optional floating point unit. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6134/
2013-09-17MIPS: Optimize current_cpu_type() for better code.Ralf Baechle
o Move current_cpu_type() to a separate header file o #ifdefing on supported CPU types lets modern GCC know that certain code in callers may be discarded ideally turning current_cpu_type() into a function returning a constant. o Use current_cpu_type() rather than direct access to struct cpuinfo_mips. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5833/
2013-09-03oprofilefs_create_...() do not need superblock argumentAl Viro
same story as with oprofilefs_mkdir() Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-09-03oprofilefs_mkdir() doesn't need superblock argumentAl Viro
it's always equal to ->d_sb of the second argument (parent dentry), due to either being literally that, or ->d_sb of parent's parent. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-09-03oprofile: don't bother with passing superblock to ->create_files()Al Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-21Merge branch 'mips-next-3.9' of ↵Ralf Baechle
git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
2013-02-17MIPS: Add support for the M14KEc core.Steven J. Hill
Signed-off-by: Steven J. Hill <sjhill@mips.com> Patchwork: http://patchwork.linux-mips.org/patch/4682/ Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-12-13Merge branch 'mips-next' of http://dev.phrozen.org/githttp/mips-next into ↵Ralf Baechle
mips-for-linux-next
2012-12-13MIPS: PMC-Sierra Yosemite: Remove support.Ralf Baechle
Nobody seems to be interested anymore and upstream also never had an ethernet driver. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-11-09MIPS: oprofile: Support for XLR/XLS processorsMadhusudan Bhat
Add support for XLR and XLS processors in MIPS Oprofile code. These processors are multi-threaded and have two counters per core. Each counter can track either all the events in the core (global mode), or events in just one thread. We use the counters in the global mode, and use only the first thread in each core to handle the configuration etc. Signed-off-by: Madhusudan Bhat <mbhat@netlogicmicro.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4471 Signed-off-by: John Crispin <blogic@openwrt.org>
2012-07-23MIPS: Add CPU support for Loongson1BKelvin Cheung
Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology (ICT) and the Chinese Academy of Sciences (CAS), which implements the MIPS32 release 2 instruction set. [ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device which also is why it identifies itself with the Legacy Vendor ID in the PrID register. When applying the patch I shoveled some code around to keep things in alphabetical order and avoid forward declarations.] Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Cc: To: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: wuzhangjin@gmail.com Cc: zhzhl555@gmail.com Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3976/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-06MIPS: Add support for the M14Kc core.Steven J. Hill
[ralf@linux-mips.org: Fixed whitespace damage.] Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3773/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-06-15MIPS: oprofile: Add callgraph supportDaniel Kalmar
Stack unwinding is done by code examination. For kernelspace, the already existing unwind function is utilized that uses kallsyms to quickly find the beginning of functions. For userspace a new function was added that examines code at and before the pc. Signed-off-by: Daniel Kalmar <kalmard@homejinni.com> Signed-off-by: Gergely Kis <gergely@homejinni.com> Signed-off-by: Robert Richter <robert.richter@amd.com>
2010-02-27MIPS: Simplify the weak annotation with __weakWu Zhangjin
Found by $ find arch/mips/ -name "*.c" | xargs -i grep -H weak {} | grep -v __weak [Ralf: Made this bulletproof by including <linux/compiler.h>] Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/874/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Loongson: Add oprofile supportWu Zhangjin
This kernel support is needed by the user-space tool:oprofile to profile linux kernel or applications via loongson2 performance counters. you can enable this driver via CONFIG_OPROFILE = y or m. On Loongson2 there are two performance counters, each one can count 16 events respectively. when anyone of the performance counter overflows, an interrupt will be generated and is routed to the IRQ MIPS_CPU_IRQ_BASE + 6. Signed-off-by: Yanhua <yanh@lemote.com> Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-10-15oprofile: more whitespace fixesRobert Richter
Signed-off-by: Robert Richter <robert.richter@amd.com>
2008-06-26on_each_cpu(): kill unused 'retry' parameterJens Axboe
It's not even passed on to smp_call_function() anymore, since that was removed. So kill it. Acked-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Reviewed-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
2008-04-28[MIPS] Add support for MIPS CMP platform.Ralf Baechle
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Allow hardwiring of the CPU type to a single type for optimization.Ralf Baechle
This saves a few k on systems which only ever ship with a single CPU type. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30[MIPS] Oprofile: kernel support for the R10000.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-26[PATCH] oprofile: Fix unnecessary clevernessMarkus Armbruster
nmi_create_files() in arch/i386/oprofile/nmi_int.c depends on model->num_counters (number of performance counters) being less than 10. While this is currently the case, it's too clever by half. Other archs aren't quite as clever: they assume 100. I suggest to normalize them all to 1000. Cc: Philippe Elie <phil.el@wanadoo.fr> Cc: John Levon <levon@movementarian.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-06[MIPS] Fix modpost warning: Rename op_model_xxx to op_model_xxx_ops.Atsushi Nemoto
The modpost uses a whitelist for commonly used suffix on checking the section mismatch. Adding "_ops" suffix to op_modex_xxx get rid of this modpost warning. WARNING: arch/mips/oprofile/oprofile.o - Section mismatch: reference to .init.text: from .data after 'op_model_mipsxx' (at offset 0x528) Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-01[MIPS] Fix detection and handling of the 74K processor.Chris Dearman
Nothing exciting; Linux just didn't know it yet so this is most adding a value to a case statement. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-27[MIPS] Oprofile: fix sparse warning.Ralf Baechle
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-27[MIPS] Fix oprofile module unloadingRalf Baechle
When unloading oprofile module with timer-mode, oprofile_arch_exit dereferences a NULL pointer. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07[MIPS] Oprofile: Support for 34K UP kernels.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07[MIPS] SB1: Add oprofile support.Mark Mason
Signed-off-by: Mark Mason <mason@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10MIPS: Oprofile: Add 5K, 20K and 25K support.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29More oprofile bits for MIPS32-style performance counters. The code toRalf Baechle
bolt this into the actual hardware interrupt is yet missing from this commit. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> FEXPORT(ret_from_fork)
2005-04-16Linux-2.6.12-rc2Linus Torvalds
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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