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sc-mips.c
Age
Commit message (
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Author
2016-05-13
MIPS: Add P6600 cases to CPU switch statements
Paul Burton
2016-02-29
MIPS: scache: Fix scache init with invalid line size.
Govindraj Raja
2016-02-09
MIPS: Fix early CM probing
Paul Burton
2015-10-26
MIPS: Enable L2 prefetching for CM >= 2.5
Paul Burton
2015-10-26
MIPS: Remove invalid check
Andrzej Hajda
2015-08-26
MIPS: Add platform callback before initializing the L2 cache
Markos Chandras
2015-08-26
MIPS: CM3: Add support for CM3 L2 cache.
Paul Burton
2015-02-17
MIPS: mm: scache: Add secondary cache support for MIPS R6 cores
Markos Chandras
2015-02-16
MIPS: Add cases for CPU_QEMU_GENERIC
Leonid Yegoshin
2014-03-26
MIPS: Add cases for CPU_P5600
James Hogan
2014-03-06
MIPS: Add 1074K CPU support explicitly.
Steven J. Hill
2014-01-22
MIPS: Add support for interAptiv cores
Leonid Yegoshin
2014-01-22
MIPS: Add support for the proAptiv cores
Leonid Yegoshin
2013-09-17
MIPS: Optimize current_cpu_type() for better code.
Ralf Baechle
2013-07-14
MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
Paul Gortmaker
2013-04-05
MIPS: Fix ISA level which causes secondary cache init bypassing and more
Deng-Cheng Zhu
2012-03-28
Disintegrate asm/system.h for MIPS
David Howells
2010-12-17
MIPS: Fix build errors in sc-mips.c
Kevin Cernekee
2010-10-29
MIPS: Honor L2 bypass bit
Kevin Cernekee
2009-09-30
MIPS: MIPSxx SC: Avoid destructive invalidation on partial L2 cachelines.
Kevin Cernekee
2008-03-12
[MIPS] Fix loads of section missmatches
Ralf Baechle
2007-10-11
[MIPS] Fix "no space between function name and open parenthesis" warnings.
Ralf Baechle
2006-06-29
[MIPS] MIPS32/MIPS64 S-cache fix and cleanup
Atsushi Nemoto
2006-06-29
[MIPS] MIPS32/MIPS64 secondary cache management
Chris Dearman
