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This patch add missing whitespace after every "+=" in the loongson
related part of arch/mips/Makefile.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/827/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Seen on rm200_defconfig for example:
CC arch/mips/boot/compressed/decompress.o
/home/ralf/src/linux/upstream-linus/arch/mips/boot/compressed/decompress.c: In function ‘decompress_kernel’:
/home/ralf/src/linux/upstream-linus/arch/mips/boot/compressed/decompress.c:116: error: implicit declaration of function ‘decompress’
make[3]: *** [arch/mips/boot/compressed/decompress.o] Error 1
make[2]: *** [vmlinuz.ecoff] Error 2
make[1]: *** [sub-make] Error 2
make: *** [all] Error 2
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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The platform has never been fully merged
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Thomas Koeller <thomas.koeller@baslerweb.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Wim Van Sebroeck <wim@iguana.be>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mtd@lists.infradead.org
Acked-by: David Woodhouse <David.Woodhouse@intel.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
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That thread "MIPS: Add option to pass return address location to
_mcount" from "David Daney <ddaney@caviumnetworks.com>" have added a new
option -mmcount-ra-address to gcc(4.5) for MIPS to transfer the location
of the return address to _mcount.
Benefit from this new feature, function graph tracer on MIPS will be
easier and safer to hijack the return address of the kernel function,
which will save some overhead and make the whole thing more reliable.
In this patch, at first, try to enable the option -mmcount-ra-address in
arch/mips/Makefile with cc-option, if gcc support it, it will be
enabled, otherwise, no side effect.
and then, we need to support this new option of gcc 4.5 and also support
the old gcc versions.
with _mcount in the old gcc versions, it's not easy to get the location
of return address(tracing: add function graph tracer support for MIPS),
so, we do it in a C function: ftrace_get_parent_addr(ftrace.c), but
with -mmcount-ra-address, only several instructions need to get what
we want, so, I put into asm(mcount.S). and also, as the $12(t0) is
used by -mmcount-ra-address for transferring the localtion of return
address to _mcount, we need to save it into the stack and restore it
when enabled dynamic function tracer, 'Cause we have called
"ftrace_call" before "ftrace_graph_caller", which may destroy
$12(t0).
(Thanks to David for providing that -mcount-ra-address and giving the
idea of KBUILD_MCOUNT_RA_ADDRESS, both of them have made the whole
thing more beautiful!)
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/681/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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If -pg of gcc is enabled with CONFIG_FUNCTION_TRACER=y. a calling to
_mcount will be inserted into each kernel function. so, there is a
possibility to trace the kernel functions in _mcount.
This patch add the MIPS specific _mcount support for static function
tracing. by default, ftrace_trace_function is initialized as
ftrace_stub(an empty function), so, the default _mcount will introduce
very little overhead. after enabling ftrace in user-space, it will jump
to a real tracing function and do static function tracing for us.
and -ffunction-sections is incompatible with -pg, so, disable it when
ftracer is enabled.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Reviewed-by: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/672/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Add the Cisco Powertv cable settop box to the MIPS tree. This platform is
based on a MIPS 24Kc processor with various devices integrated on the same
ASIC. There are multiple models of this box, with differing configuration
but the same kernel runs across the product line.
Signed-off-by: David VomLehn <dvomlehn@cisco.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/132/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Add a new kernel option for Lemote Loongson 2F family machines.
Lemote loongson2f family machines utilize the 2f revision of loongson
processor and the AMD CS5536 south bridge.
Family members include Fuloong 2F mini PC, Yeeloong 2F notebook, LingLoong
all-in-one PC and others.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: zhangfx@lemote.com
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Nicholas Mc Guire <hofrat@hofr.at>
Cc: Arnaud Patard <apatard@mandriva.com>
Cc: loongson-dev@googlegroups.com
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Loongson 2F has built-in DDR2 and PCI-X controller. The PCI-X controller
has a programming interface similiar to the the FPGA northbridge used on
Loongson 2E.
The main differences between Loongson 2E and Loongson 2F include:
1. Loongson 2F has an extra address window configuration module, which
is used to map CPU address space to DDR or PCI address space, or map
the PCI-DMA address space to DDR or LIO address space.
2. Loongson 2F supports 8 levels of software configurable CPu frequency
which can be configured in the LOONGSON_CHIPCFG0 register. The coming
cpufreq and standby support are based on this feature.
Loongson.h abstracts the modules and corresponding methods are abstracted.
Add other Loongson-2F-specific source code including gcc 4.4 support, PCI
memory space, PCI IO space, DMA address.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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This patch helps to generate smaller kernel images for linux-MIPS,
Here is the effect when using lzma:
$ ls -sh vmlinux
7.1M vmlinux
$ ls -sh vmlinuz
1.5M vmlinuz
Have tested the 32bit kernel on Qemu/Malta and 64bit kernel on FuLoong
Mini PC. both of them work well. and also, tested by Alexander Clouter
on an AR7 based Linksys WAG54Gv2, and by Manuel Lauss on an Alchemy
board.
This -v2 version incorporate the feedback from Ralf, and add the
following changes:
1. add .ecoff, .bin, .erec format support
2. only enable it and the debug source code for the machines we tested
3. a dozen of fixups and cleanups
and if you want to enable it for your board, please try to select
SYS_SUPPORTS_ZBOOT for it, and if the board have an 16550 compatible
uart, you can select SYS_SUPPORTS_ZBOOT_UART16550 directly. and then
sending the relative patches to Ralf.
Tested-by: Manuel Lauss <manuel.lauss@googlemail.com>
Tested-by: Alexander Clouter <alex@digriz.org.uk>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Albin Tonnerre <albin.tonnerre@free-electrons.com> reported:
Bash 4 filters out variables which contain a dot in them.
This happends to be the case of CPPFLAGS_vmlinux.lds.
This is rather unfortunate, as it now causes
build failures when using SHELL=/bin/bash to compile,
or when bash happens to be used by make (eg when it's /bin/sh)
Remove the common definition of CPPFLAGS_vmlinux.lds by
pushing relevant stuff to either Makefile.build or the
arch specific kernel/Makefile where we build the linker script.
This is also nice cleanup as we move the information out where
it is used.
Notes for the different architectures touched:
arm - we use an already exported symbol
cris - we use a config symbol aleady available
[Not build tested]
mips - the jiffies complexity has moved to vmlinux.lds.S where we need it.
Added a few variables to CPPFLAGS - they are only used by
the linker script.
[Not build tested]
powerpc - removed assignment that is not needed
[not build tested]
sparc - simplified it using $(BITS)
um - introduced a few new exported variables to deal with this
xtensa - added options to CPP invocation
[not build tested]
Cc: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Mikael Starvik <starvik@axis.com>
Cc: Jesper Nilsson <jesper.nilsson@axis.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Chris Zankel <chris@zankel.net>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
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Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Because only gcc >=4.4 have loongson-specific support, we need to choose
the suitable -march argument for gcc <= 4.3 and gcc >= 4.4, and here, we
use -march=loongson2e for loongson2e.
Thanks goes to Arnaud Patard <apatard@mandriva.com> for suggestion of
using cc-options(Documentation/kbuild/makefiles.txt). and thanks Zhang
Le for introducing the new CPU_LOONGSON2E kernel option.
NOTE: -mtune option is not need if -march and -mtune use the same value.
Signed-off-by: Zhang Le <r0bertz@gentoo.org>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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To share common loongson source code between all of the loongson-based
machines. there is a need to split it out of the fuloong-2e/ directory.
at the same time, other according tuning is needed. the machine-specific
parts are defined as macros in relative header file, pci.h, mem.h,
machine.h.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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To make source code of loongson sharable to the machines(such as gdium)
made by the other companies, we rename arch/mips/lemote to
arch/mips/loongson, asm/mach-lemote to asm/mach-loongson, and rename lm2e
to the name of the machine: fuloong-2e. accordingly, FULONG are renamed to
FULOONG2E to make it distinguishable to the future FULOONG2F. and also,
some other relative tuning is needed.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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This patch adds support for the Texas Instruments AR7 System-on-a-Chip.
It supports the TNETD7100, 7200 and 7300 versions of the SoC.
Signed-off-by: Matteo Croce <matteo@openwrt.org>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Eugene Konev <ejka@openwrt.org>
Signed-off-by: Nicolas Thill <nico@openwrt.org>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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[Ralf: SMP support requires CPU hotplugging which MIPS currently doesn't
support. As implemented in this patch cache and tlb flushing will also be
invoked with interrupts disabled so smp_call_function() will blow up in
charming ways. So limit to !SMP.]
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Yan Hua <yanh@lemote.com>
Reviewed-by: Arnaud Patard <apatard@mandriva.com>
Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Hu Hongbing <huhb@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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The current in-kernel Alchemy GPIO support is far too inflexible for
all my use cases. To address this, the following changes are made:
* create generic functions which deal with manipulating the on-chip
GPIO1/2 blocks. Such functions are universally useful.
* Macros for GPIO2 shared interrupt management and block control.
* support for both built-in CONFIG_GPIOLIB and fast, inlined GPIO macros.
If CONFIG_GPIOLIB is not enabled, provide linux gpio framework
compatibility by directly inlining the GPIO1/2 functions. GPIO access
is limited to on-chip ones and they can be accessed as documented in
the datasheets (GPIO0-31 and 200-215).
If CONFIG_GPIOLIB is selected, two (2) gpio_chip-s, one for GPIO1 and
one for GPIO2, are registered. GPIOs can still be accessed by using
the numberspace established in the databooks.
However this is not yet flexible enough for my uses: My Alchemy
systems have a documented "external" gpio interface (fixed, different
numberspace) and can support a variety of baseboards, some of which
are equipped with I2C gpio expanders. I want to be able to provide
the default 16 GPIOs of the CPU board numbered as 0..15 and also
support gpio expanders, if present, starting as gpio16.
To achieve this, a new Kconfig symbol for Alchemy is introduced,
CONFIG_ALCHEMY_GPIO_INDIRECT, which boards can enable to signal
that they don't want the Alchemy numberspace exposed to the outside
world, but instead want to provide their own. Boards are now respon-
sible for providing the linux gpio interface glue code (either in a
custom gpio.h header (in board include directory) or with gpio_chips).
To make the board-specific inlined gpio functions work, the MIPS
Makefile must be changed so that the mach-au1x00/gpio.h header is
included _after_ the board headers, by moving the inclusion of
the mach-au1x00/ to the end of the header list.
See arch/mips/include/asm/mach-au1x00/gpio.h for more info.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Acked-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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CFE is the only supported and used bootloader on the SiByte boards,
the standalone kernel support has been never used outside Broadcom.
Remove it and make the kernel use CFE by default.
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Richard Sandiford's new code for inserting the cache-barriers, for GCC
4.3 and above and already incorporated in the current GCC-release, uses
a slightly different option-syntax.
Signed-off-by: peter fuerst <post@pfrst.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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I don't think that in 15 years of Linux/MIPS the zero division checking
code generated by gcc by default has ever caught anything.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Otherwise indigestable options might be passed to the host compiler.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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This should ease sharing of common devboard code.
Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Take all the OCTEON specific files that were added, and hook them into
the build system for the arch/mips. For versions of GCC that lack
OCTEON support, override gas target architecture.
Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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git mv arch/mips/{emma2rh,emma} and fixups Makefiles. We'll put all NEC
EMMA series based machines there in the future.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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- Move EMMA related stuff into arch/mips/emma/Kconfig
- Create CONFIG_SOC_EMMA* to handle more EMMA SoCs effectively
- Rename CONFIG_MARKEINS into CONFIG_NEC_MARKEINS
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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We already have sufficient infrastructure to support VR5500 and VR5500A
series processors. Here's a Makefile support to make it selectable by
ports, and enable it for NEC EMMA2RH Markeins board.
This patch also fixes a confused target help, and adds 1Gb PageMask bits
supported by VR5500 and its variants.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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The following patch add support for the NXP PNX833x SOC. More
specifically it adds support for the STB222/5 variant. It fixes
the vectored interrupt issue.
Signed-off-by: daniel.j.laird <daniel.j.laird@nxp.com>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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It's more than the au1000 these days.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
create mode 100644 arch/mips/txx9/rbtx4939/Makefile
create mode 100644 arch/mips/txx9/rbtx4939/irq.c
create mode 100644 arch/mips/txx9/rbtx4939/prom.c
create mode 100644 arch/mips/txx9/rbtx4939/setup.c
create mode 100644 include/asm-mips/txx9/rbtx4939.h
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Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Rename mach-jmr3927 directory to more proper name to make adding other
platforms easier.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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It cannot be built for a long time and nobody maintains it.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Make single kernel can be used on RBTX4927/37/38. Also make
some SoC-specific code independent from board-specific code.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Move arch/mips/{jmr3927,tx4927,tx4938} into arch/mips/txx9/ tree.
This will help more code sharing and maintainance.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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-ffunction-sections serves as a workaround for the problems caused by the
limited branch range in some inline assembler fragments for very large
compilation units.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Build the SWARM platform library is as an object rather than an archive
so that files which only contain symbols used by initcalls and do not
provide any symbols that would pull them from an archive still work.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Use better load address for big endian kernels to avoid clashes with
PROM / SASH.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: daniel.j.laird <daniel.j.laird@nxp.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Check whether gcc supports -mr10-cache-barrier=1 and issue a cleaner
error message if not. This option is needed to build working SGI IP28
kernels.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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With KBUILD_DEFCONFIG we don't have to ship a second copy of ip22_defconfig.
Signed-off-by: Adrian Bunk <adrian.bunk@movial.fi>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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The Qemu platform was originally implemented to have an easily supportable
platform until Qemu reaches a state where it emulates a real world system.
Since the latest release Qemu is capable of emulating the MIPSsim and
Malta platforms, so this goal has been reached. The Qemu plaform is also
rather underfeatured so less useful than a Malta emulation.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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A raw binary boots about twice as fast as SREC.
The possibility to generate SREC binaries remains by simply using the
vmlinux.srec target but seems only useful for the probably hypothetical
case where one of these systems is booted over a serial interface.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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- EISA support for non PCI RMs (RM200 and RM400-xxx). The major part
is the splitting of the EISA and onboard ISA of the RM200, which
makes the EISA bus on the RM200 look like on other RMs.
- 64bit kernel support
- system type detection is now common for big and little endian
- moved sniprom code to arch/mips/fw
- added call_o32 function to arch/mips/fw/lib, which uses a private
stack for calling prom functions
- fix problem with ISA interrupts, which makes using PIT clockevent
possible
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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