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2021-04-18Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds
Pull ARM fixes from Russell King: - Halve maximum number of CPUs if DEBUG_KMAP_LOCAL is enabled - Fix conversion for_each_membock() to for_each_mem_range() - Fix footbridge PCI mapping - Avoid uprobes hooking on thumb instructions * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 9071/1: uprobes: Don't hook on thumb instructions ARM: footbridge: fix PCI interrupt mapping ARM: 9069/1: NOMMU: Fix conversion for_each_membock() to for_each_mem_range() ARM: 9063/1: mm: reduce maximum number of CPUs if DEBUG_KMAP_LOCAL is enabled
2021-04-18ARM: 9075/1: kernel: Fix interrupted SMC callsManivannan Sadhasivam
On Qualcomm ARM32 platforms, the SMC call can return before it has completed. If this occurs, the call can be restarted, but it requires using the returned session ID value from the interrupted SMC call. The ARM32 SMCC code already has the provision to add platform specific quirks for things like this. So let's make use of it and add the Qualcomm specific quirk (ARM_SMCCC_QUIRK_QCOM_A6) used by the QCOM_SCM driver. This change is similar to the below one added for ARM64 a while ago: commit 82bcd087029f ("firmware: qcom: scm: Fix interrupted SCM calls") Without this change, the Qualcomm ARM32 platforms like SDX55 will return -EINVAL for SMC calls used for modem firmware loading and validation. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-04-18ARM: 9074/1: ptdump: convert to DEFINE_SHOW_ATTRIBUTEJisheng Zhang (syna)
Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Reviewed-by: Steven Price <steven.price@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-04-18ARM: 9073/1: ptdump: add __init section marker to three functionsJisheng Zhang (syna)
They are not needed after booting, so mark them as __init to move them to the .init section. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Reviewed-by: Steven Price <steven.price@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-04-18ARM: 9072/1: mm: remove set_kernel_text_r[ow]()Jisheng Zhang (syna)
After commit 5a735583b764 ("arm/ftrace: Use __patch_text()"), the last and only user of these functions has gone, remove them. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-04-18ARM: 9071/1: uprobes: Don't hook on thumb instructionsFredrik Strupe
Since uprobes is not supported for thumb, check that the thumb bit is not set when matching the uprobes instruction hooks. The Arm UDF instructions used for uprobes triggering (UPROBE_SWBP_ARM_INSN and UPROBE_SS_ARM_INSN) coincidentally share the same encoding as a pair of unallocated 32-bit thumb instructions (not UDF) when the condition code is 0b1111 (0xf). This in effect makes it possible to trigger the uprobes functionality from thumb, and at that using two unallocated instructions which are not permanently undefined. Signed-off-by: Fredrik Strupe <fredrik@strupe.net> Cc: stable@vger.kernel.org Fixes: c7edc9e326d5 ("ARM: add uprobes support") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-04-16crypto: arm/curve25519 - Move '.fpu' after '.arch'Nathan Chancellor
Debian's clang carries a patch that makes the default FPU mode 'vfp3-d16' instead of 'neon' for 'armv7-a' to avoid generating NEON instructions on hardware that does not support them: https://salsa.debian.org/pkg-llvm-team/llvm-toolchain/-/raw/5a61ca6f21b4ad8c6ac4970e5ea5a7b5b4486d22/debian/patches/clang-arm-default-vfp3-on-armv7a.patch https://bugs.debian.org/841474 https://bugs.debian.org/842142 https://bugs.debian.org/914268 This results in the following build error when clang's integrated assembler is used because the '.arch' directive overrides the '.fpu' directive: arch/arm/crypto/curve25519-core.S:25:2: error: instruction requires: NEON vmov.i32 q0, #1 ^ arch/arm/crypto/curve25519-core.S:26:2: error: instruction requires: NEON vshr.u64 q1, q0, #7 ^ arch/arm/crypto/curve25519-core.S:27:2: error: instruction requires: NEON vshr.u64 q0, q0, #8 ^ arch/arm/crypto/curve25519-core.S:28:2: error: instruction requires: NEON vmov.i32 d4, #19 ^ Shuffle the order of the '.arch' and '.fpu' directives so that the code builds regardless of the default FPU mode. This has been tested against both clang with and without Debian's patch and GCC. Cc: stable@vger.kernel.org Fixes: d8f1308a025f ("crypto: arm/curve25519 - wire up NEON implementation") Link: https://github.com/ClangBuiltLinux/continuous-integration2/issues/118 Reported-by: Arnd Bergmann <arnd@arndb.de> Suggested-by: Arnd Bergmann <arnd@arndb.de> Suggested-by: Jessica Clarke <jrtc27@jrtc27.com> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Acked-by: Jason A. Donenfeld <Jason@zx2c4.com> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Tested-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2021-04-16ARM: dts: aspeed: tiogapass: add hotplug controllerPaul Fertser
The ADM1278 IC is accessible on I2C bus and on both Wiwynn and Quanta Tioga Pass implementations a pair of parallel 0.5 mOhm resistors is used for current measurement. Signed-off-by: Paul Fertser <fercerpav@gmail.com> Link: https://lore.kernel.org/r/20210415140521.11352-1-fercerpav@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-16ARM: dts: aspeed: amd-ethanolx: Enable all used I2C bussesKonstantin Aladyshev
Enable all I2C busses that are used in AMD EthanolX CRB: i2c0 - APML P0 i2c1 - APML P1 i2c2 - FPGA i2c3 - 24LC128 EEPROM i2c4 - P0 Power regulators i2c5 - P1 Power regulators i2c6 - P0/P1 Thermal diode i2c7 - Thermal Sensors i2c8 - BMC I2C Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com> Link: https://lore.kernel.org/r/20210415155300.1135-1-aladyshev22@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-16ARM: dts: aspeed: Rainier: Update to pass 2 hardwareEddie James
Add the muxes present in pass 2 and remove the eeproms that were removed. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-16ARM: dts: aspeed: Rainier 1S4U: Fix fan nodesEddie James
The 1S4U system populates fans 0, 1, 2, and 4. Update the dts to reflect this. Fixes: 7f03894a6555 ("ARM: dts: aspeed: Add Rainier 1S4U machine") Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-16ARM: dts: aspeed: Rainier: Fix humidity sensor bus addressEddie James
The si7021 was incorrectly placed at 0x20 on i2c bus 7. It is at 0x40. Fixes: 9c44db7096e0 ("ARM: dts: aspeed: rainier: Add i2c devices") Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-16ARM: dts: aspeed: Rainier: Fix PCA9552 on bus 8Eddie James
The second presence detection PCA9552 was incorrectly added to bus 9. Fixes: 8be44de6f209 ("ARM: dts: aspeed: Rainier: Add presence GPIOs") Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-13ARM: dts: qcom: sdx55: add IPA informationAlex Elder
Add IPA-related nodes and definitions to "sdx55.dtsi". The SMP2P nodes (ipa_smp2p_out and ipa_smp2p_in) are already present. Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20210409155251.955632-1-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: configs: qcom_defconfig: Reduce CMA size to 64MBManivannan Sadhasivam
Not all platforms are able to allocate CMA size of 256MB. One such platform is SDX55. Hence, use the standard 64MB size for CMA. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170930.91834-8-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: configs: qcom_defconfig: Enable GLINK SMEM driverManivannan Sadhasivam
Enable the Qualcomm GLINK SMEM driver to support GLINK protocol over shared memory. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170930.91834-7-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: configs: qcom_defconfig: Enable SDX55 interconnect driverManivannan Sadhasivam
Enable interconnect driver for SDX55 platform to manage the interconnect providers. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170930.91834-6-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: configs: qcom_defconfig: Enable Q6V5_PAS remoteproc driverManivannan Sadhasivam
Enable the Qualcomm Q6V5_PAS (Peripheral Authentication Service) remoteproc driver to manage the modem co-processor in SDX55 platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170930.91834-5-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: configs: qcom_defconfig: Enable CPUFreq supportManivannan Sadhasivam
Enable CPUFreq and CPUFreq DT drivers to carry out CPU Frequency scaling duties on platforms like SDX55. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170930.91834-4-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: configs: qcom_defconfig: Enable SDX55 A7 PLL and APCS clock driverManivannan Sadhasivam
Enable A7 PLL driver and APCS clock driver on SDX55 platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170930.91834-3-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: configs: qcom_defconfig: Enable APCS IPC mailbox driverManivannan Sadhasivam
Enable Qualcomm APCS IPC mailbox driver for IPC communication between application processor and other masters in platforms like SDX55. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170930.91834-2-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add basic devicetree support for Thundercomm T55Manivannan Sadhasivam
Thundercomm T55 is the development platform based on the Qualcomm SDX55 chipset. This basic support includes support for debug serial, NAND flash, BAM DMA, USB and regulators support. https://www.thundercomm.com/app_en/product/1593506006365532 Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-14-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add basic devicetree support for Telit FN980 TLBManivannan Sadhasivam
Telit FN980 TLB is the development platform based on the Qualcomm SDX55 chipset. This basic support includes support for debug serial, NAND flash, BAM DMA, USB and regulators support. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-12-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add Modem remoteproc nodeManivannan Sadhasivam
Add modem support to SDX55 using the PAS remoteproc driver. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-16-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: Fix node name for NAND controller nodeManivannan Sadhasivam
Use the common "nand-controller" node name for NAND controller node to fix the `make dtbs_check` validation for Qcom platforms. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-10-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add interconnect nodesManivannan Sadhasivam
Add interconnect nodes for the providers in SDX55 platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-9-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add SCM nodeManivannan Sadhasivam
Add SCM node to enable SCM functionality on SDX55 platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-8-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add IMEM and PIL info regionManivannan Sadhasivam
Add a simple-mfd representing IMEM on SDX55 and define the PIL relocation info region, so that post mortem tools will be able to locate the loaded remoteproc. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-6-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add modem SMP2P nodeManivannan Sadhasivam
Add SMP2P nodes for the SDX55 platform to communicate with the modem. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-5-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add CPUFreq supportManivannan Sadhasivam
Add CPUFreq support to SDX55 platform using the cpufreq-dt driver. There is no dedicated hardware block available on this platform to carry on the CPUFreq duties. Hence, it is accomplished using the CPU clock and regulators tied together by the operating points table. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-4-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add support for APCS blockManivannan Sadhasivam
The APCS block on SDX55 acts as a mailbox controller and also provides clock output for the Cortex A7 CPU. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-3-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add support for A7 PLL clockManivannan Sadhasivam
On SDX55 there is a separate A7 PLL which is used to provide high frequency clock to the Cortex A7 CPU via a MUX. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-2-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13of: net: pass the dst buffer to of_get_mac_address()Michael Walle
of_get_mac_address() returns a "const void*" pointer to a MAC address. Lately, support to fetch the MAC address by an NVMEM provider was added. But this will only work with platform devices. It will not work with PCI devices (e.g. of an integrated root complex) and esp. not with DSA ports. There is an of_* variant of the nvmem binding which works without devices. The returned data of a nvmem_cell_read() has to be freed after use. On the other hand the return of_get_mac_address() points to some static data without a lifetime. The trick for now, was to allocate a device resource managed buffer which is then returned. This will only work if we have an actual device. Change it, so that the caller of of_get_mac_address() has to supply a buffer where the MAC address is written to. Unfortunately, this will touch all drivers which use the of_get_mac_address(). Usually the code looks like: const char *addr; addr = of_get_mac_address(np); if (!IS_ERR(addr)) ether_addr_copy(ndev->dev_addr, addr); This can then be simply rewritten as: of_get_mac_address(np, ndev->dev_addr); Sometimes is_valid_ether_addr() is used to test the MAC address. of_get_mac_address() already makes sure, it just returns a valid MAC address. Thus we can just test its return code. But we have to be careful if there are still other sources for the MAC address before the of_get_mac_address(). In this case we have to keep the is_valid_ether_addr() call. The following coccinelle patch was used to convert common cases to the new style. Afterwards, I've manually gone over the drivers and fixed the return code variable: either used a new one or if one was already available use that. Mansour Moufid, thanks for that coccinelle patch! <spml> @a@ identifier x; expression y, z; @@ - x = of_get_mac_address(y); + x = of_get_mac_address(y, z); <... - ether_addr_copy(z, x); ...> @@ identifier a.x; @@ - if (<+... x ...+>) {} @@ identifier a.x; @@ if (<+... x ...+>) { ... } - else {} @@ identifier a.x; expression e; @@ - if (<+... x ...+>@e) - {} - else + if (!(e)) {...} @@ expression x, y, z; @@ - x = of_get_mac_address(y, z); + of_get_mac_address(y, z); ... when != x </spml> All drivers, except drivers/net/ethernet/aeroflex/greth.c, were compile-time tested. Suggested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-13Merge tag 'v5.13-rockchip-dts32' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt MMC aliases fixups and some property/compatible cleanups. * tag 'v5.13-rockchip-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: move rv1108 mmcx aliases to board dts files ARM: dts: rockchip: move rk322x mmcx aliases to board dts files ARM: dts: rockchip: remove clock-names property from watchdog node in rv1108.dtsi ARM: dts: rockchip: add new watchdog compatible to rk322x.dtsi ARM: dts: rockchip: add new watchdog compatible to rv1108.dtsi Link: https://lore.kernel.org/r/4638723.31r3eYUQgx@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-12ARM: dts: at91: sama5d2/trivial: fix letter case for etm hex addressNicolas Ferre
Fix the etm node hex address to lower case for matching regexp specification and removing the additional warning that looks like: arch/arm/boot/dts/at91-sama5d2_ptc_ek.dt.yaml: /: 'etm@73C000' does not match any of the regexes: '@(0|[1-9a-f][0-9a-f]*)$', '^[^@]+$', 'pinctrl-[0-9]+' Reported-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-12Merge 5.12-rc7 into usb-nextGreg Kroah-Hartman
We need the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-04-11ARM: dts: rockchip: move rv1108 mmcx aliases to board dts filesHeiko Stuebner
As suggested by Arnd Bergmann, mmc-aliases are supposed to be board-specific, so move the newly added general aliases to the board-level on rv1108-based boards. Suggested-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210324122235.1059292-2-heiko@sntech.de
2021-04-11ARM: dts: rockchip: move rk322x mmcx aliases to board dts filesHeiko Stuebner
As suggested by Arnd Bergmann, mmc-aliases are supposed to be board-specific, so move the newly added general aliases to the board-level on rk322x-based boards. Suggested-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210324122235.1059292-1-heiko@sntech.de
2021-04-10ARM: s3c: mini2440: Constify the software nodeHeikki Krogerus
Additional device properties are always just a part of a software fwnode. If the device properties are constant, the software node can also be constant. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2021-04-10ARM: pxa: stargate2: Constify the software nodeHeikki Krogerus
Additional device properties are always just a part of a software fwnode. If the device properties are constant, the software node can also be constant. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2021-04-09Merge tag 'qcom-dts-for-5.13' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm dts updates for v5.13 This adds Bluetooth support on the Samsung Galaxy S5, corrects the mount matrix for the IMU on Nexus 5 and corrects the fuel gauge irq trigger for the two devices. * tag 'qcom-dts-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: msm8974-klte: Add bluetooth support ARM: dts: qcom: msm8974: add blsp2_uart8 ARM: dts: qcom: msm8974-samsung-klte: correct fuel gauge interrupt trigger level ARM: dts: qcom: msm8974-lge-nexus5: correct fuel gauge interrupt trigger level ARM: dts: qcom: msm8974-hammerhead: add mount matrix for IMU Link: https://lore.kernel.org/r/20210409162359.776076-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-09ARM: dts: clps711x: fix missing interrupt parentArnd Bergmann
The kernelci.org bot reports a build time regression: arch/arm/boot/dts/ep7209.dtsi:187.17-192.4: Warning (interrupts_property): /keypad: Missing interrupt-parent There is only one interrupt controller in this SoC, so I assume this is the parent. Fixes: 2bd86203acf3 ("ARM: dts: clps711x: Add keypad node") Reported-by: kernelci.org bot <bot@kernelci.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-09ARM: dts: mvebu: fix SPI device nodeArnd Bergmann
dtc warns about a mismatched address: arch/arm/boot/dts/armada-385-atl-x530.dts:171.14-199.4: Warning (spi_bus_reg): /soc/spi@10680/spi-flash@0: SPI bus unit address format error, expected "1" I assume the "reg" property is correct here, so adjust the unit address accordingly. Fixes: c6dfc019c239 ("ARM: dts: mvebu: Add device tree for ATL-x530 Board") Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reported-by: kernelci.org bot <bot@kernelci.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-09Merge tag 'aspeed-5.13-lpc' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/drivers ASPEED LPC updates for 5.13 These patches fix the ASPEED LPC bindings and LPC-related device drivers so in the future the KCS driver can properly use the hardware. * tag 'aspeed-5.13-lpc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: soc: aspeed: Adapt to new LPC device tree layout pinctrl: aspeed-g5: Adapt to new LPC device tree layout ipmi: kcs: aspeed: Adapt to new LPC DTS layout ARM: dts: Remove LPC BMC and Host partitions dt-bindings: aspeed-lpc: Remove LPC partitioning Link: https://lore.kernel.org/r/CACPK8Xcb12LsVr7CUaXXjQskKbVjb7x+jgueG1Hik-kBPWtDSg@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-09Merge tag 'bmc-5.13-devicetree' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/dt BMC device tree updates for 5.13 The ASPEED and Nuvoton pull request now comes as a combined BMC pull request. - New machines * ASRock E3C246D4I, an AST2500 BMC for an Xeon E-2100/E-2200 mini-ITX system * Quanta GBS, an NPCM730 BMC for an x86 server - Power10 BMC updates for Everest and Rainier - GPIO line names for Mihawk * tag 'bmc-5.13-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: (21 commits) ARM: dts: nuvoton: Add Quanta GBS BMC Device Tree ARM: dts: aspeed: mihawk: Add GPIO line names ARM: dts: aspeed: Add Rainier 1S4U machine ARM: dts: aspeed: everest: Add size/address cells ARM: dts: aspeed: everest: Enable fan watchdog ARM: dts: aspeed: everest: Add RTC ARM: dts: aspeed: everest: GPIOs support ARM: dts: aspeed: everest: Add UCD90320 power sequencer ARM: dts: aspeed: everest: Add power supply i2c devices ARM: dts: aspeed: everest: Add pca9552 fan presence ARM: dts: aspeed: everest: Add FSI CFAMs and re-number engines ARM: dts: aspeed: everest: Add max31785 fan controller device ARM: dts: aspeed: everest: Add I2C components ARM: dts: aspeed: rainier 4U: Fix fan configuration ARM: dts: aspeed: rainier: Add missing fan nodes ARM: dts: aspeed: rainier: Enable fan watchdog ARM: dts: aspeed: rainier: Add presence GPIOs ARM: dts: aspeed: rainier: Add additional processor CFAMs ARM: dts: aspeed: rainier: Add gpio-keys-polled for fans ARM: dts: aspeed: rainier: Add directly controlled LEDs ... Link: https://lore.kernel.org/r/CACPK8Xe-KV5BeQwOH6NKC1++FCVqwwNCGBh7hEbBORfrmxfTtQ@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-09ARM: config: Add WPCM to multi v5Joel Stanley
This is a newly added ARM926 platform that is not covered by any other defconfigs. Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210409054511.1534181-1-joel@jms.id.au
2021-04-09ARM: dts: Add devicetree for Supermicro X9SCi-LN4F based on WPCM450Jonathan Neuschäfer
The Supermicro X9SCi-LN4F is a server mainboard featuring the WPCM450 BMC. This patch adds a minimal devicetree for Linux running on the BMC. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210406120921.2484986-10-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-09ARM: dts: Add devicetree for Nuvoton WPCM450 BMC chipJonathan Neuschäfer
The WPCM450 is an older BMC SoC in the Nuvoton NPCM family, originally marketed as Winbond WPCM450. This patch adds a devicetree with basic functionality. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210406120921.2484986-9-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-09ARM: npcm: Introduce Nuvoton WPCM450 SoCJonathan Neuschäfer
The WPCM450 is an older BMC SoC in the Nuvoton NPCM family, originally marketed as Winbond WPCM450. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210406120921.2484986-6-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-09ARM: dts: Remove LPC BMC and Host partitionsChia-Wei, Wang
The LPC controller has no concept of the BMC and the Host partitions. A concrete instance is that the HICRB[5:4] are for the I/O port address configurtaion of KCS channel 1/2. However, the KCS driver cannot access HICRB for channel 1/2 initialization via syscon regmap interface due to the parition boundary. (i.e. offset 80h) In addition, for the HW design backward compatibility, a newly added HW control bit could be located at any reserved one over the LPC addressing space. Thereby, this patch removes the lpc-bmc and lpc-host child node and thus the LPC partitioning. Note that this change requires the synchronization between device tree change and the driver change. To prevent the misuse of old devicetrees with new drivers, or vice versa, the v2 compatible strings are adopted for the LPC device as listed: "aspeed,ast2400-lpc-v2" "aspeed,ast2500-lpc-v2" "aspeed,ast2600-lpc-v2" Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20210319062752.145730-2-andrew@aj.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
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