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2012-01-26ARM: amba: u300: use common amba device initializersRussell King
Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-26ARM: amba: lpc32xx: use common amba device initializersRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-26ARM: amba: netx: use common amba device initializersRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-26ARM: amba: bcmring: use common amba device initializersRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-26ARM: amba: ep93xx: use common amba device initializersRussell King
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-26ARM: amba: omap2: use common amba device initializersRussell King
Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-26ARM: amba: integrator: use common amba device initializersRussell King
Tested-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-26ARM: amba: realview: get rid of private platform amba_device initializerRussell King
Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-26arch/arm/mach-imx/mach-mx53_ard.c: add missing iounmapJulia Lawall
Add missing iounmap in error handling code, in a case where the function already preforms iounmap on some other execution path. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e; statement S,S1; int ret; @@ e = \(ioremap\|ioremap_nocache\)(...) ... when != iounmap(e) if (<+...e...+>) S ... when any when != iounmap(e) *if (...) { ... when != iounmap(e) return ...; } ... when any iounmap(e); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-01-26ARM: imx: iomux-v1.h: Fix build error due to __init annotationFabio Estevam
Fix the following build error found when building imx_v4_v5_defconfig: CC arch/arm/mach-imx/mach-imx27ipcam.o In file included from arch/arm/plat-mxc/include/mach/iomux-mx27.h:23, from arch/arm/mach-imx/mach-imx27ipcam.c:22: arch/arm/plat-mxc/include/mach/iomux-v1.h:99: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'imx_iomuxv1_init' Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-01-25ARM: 7301/1: Rename the T() macro to TUSER() to avoid namespace conflictsCatalin Marinas
This macro is used to generate unprivileged accesses (LDRT/STRT) to user space. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: amba: versatile: get rid of private platform amba_device initializerRussell King
Tested-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: amba: vexpress: get rid of private platform amba_device initializerRussell King
Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: amba: u300: get rid of NO_IRQ initializersRussell King
Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: amba: spear: get rid of NO_IRQ initializersRussell King
Acked-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: amba: netx: get rid of NO_IRQ initializersRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: amba: nomadik: get rid of NO_IRQ initializersRussell King
Acked-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: amba: mxs: get rid of NO_IRQ initializersRussell King
Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: amba: lpc32xx: get rid of NO_IRQ initializersRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: amba: integrator/realview/versatile/vexpress: get rid of NO_IRQ ↵Russell King
initializers Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: amba: samsung: get rid of NO_IRQ initializersRussell King
Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: amba: get rid of NO_IRQ initializersRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: amba: ux500: get rid of NO_IRQRussell King
irq 0 now means no irq, so get rid of this unnecessary initializer. Acked-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: amba: mxs: convert to use amba_device_allocRussell King
Convert MXS to use the new amba_device_alloc APIs. Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: amba: integrator: convert to use amba_device_allocRussell King
Convert Integrator IM/PD-1 to use the new amba_device_alloc APIs. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: amba: ux500: convert to use amba_device_allocRussell King
Convert ux500 to use the new amba_device_alloc APIs. Acked-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: 7300/1: realview: fix definition of GPIO0 interrupt on PB1176 to match TRMWill Deacon
Currently, -1 is used as the GPIO0 interrupt on realview PB1176 and an AMBA device is registered with this parameter. With the pending NO_IRQ cleanup, this will lead to a warning at boot time, since -1 is obviously broken. This patch updates the interrupt used for GPIO0 to match that specified by the TRM. Unfortunately, it's not clear how to trigger this interrupt so we trust that the documentation is correct. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: 7299/1: ftrace: clear zero bit in reported IPs for Thumb-2Rabin Vincent
The dynamic ftrace ops startup test currently fails on Thumb-2 kernels: Testing tracer function: PASSED Testing dynamic ftrace: PASSED Testing dynamic ftrace ops #1: (0 0 0 0 0) FAILED! This is because while the addresses in the mcount records do not have the zero bit set, the IP reported by the mcount call does have it set (because it is copied from the LR). This mismatch causes the ops filtering in ftrace_ops_list_func() to not call the relevant tracers. Fix this by clearing the zero bit before adjusting the LR for the mcount instruction size. Also, combine the mov+sub into a single sub instruction. Acked-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25ARM: 7298/1: realview: fix mapping of MPCore private memory regionMarc Zyngier
Since commit 0536bdf33faf (ARM: move iotable mappings within the vmalloc region), the RealView PB11MP cannot boot anymore. This is caused by the way the mappings are described on this platform (define replaced by hex values for clarity): { /* GIC CPU interface mapping */ .virtual = IO_ADDRESS(0x1F000100), .pfn = __phys_to_pfn(0x1F000100), .length = SZ_4K, .type = MT_DEVICE, }, { /* GIC distributor mapping */ .virtual = IO_ADDRESS(0x1F001000), .pfn = __phys_to_pfn(0x1F001000), .length = SZ_4K, .type = MT_DEVICE, } The first mapping ends up reserving two pages, and clashes with the second one, which triggers a BUG_ON in vm_area_add_early(). In order to solve this problem, treat the MPCore private memory region (containing the SCU, the GIC and the TWD) as a single region, as described in the TRM: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/CACGDJJC.html The EB11MP is converted the same way, even if it manages to avoid the problem. Tested on both PB11MP and EB11MP. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23Merge tag 'arm-soc-imx-move' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Consolidate i.MX 5 platforms to be under the new shared i.MX 3/5/6 tree. * tag 'arm-soc-imx-move' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM i.MX: Update defconfig ARM i.MX: Merge i.MX5 support into mach-imx ARM i.MX5: remove unnecessary includes from board files Fix up fairly trivial conflicts due to various changes nearby in arch/arm/{mach,plat}-imx/{Kconfig,Makefile} Pull request had been sent to the wrong email address, but happened before the merge window closed. I'm merging the MX 5 consolidation, since it apparently will help the next development window and will avoid conflicts later as per Arnd.
2012-01-23Merge branches 'debug' and 'idle' into for-armsocRussell King
2012-01-23ARM: 7288/1: mach-sa1100: add missing module_init() callLinus Walleij
The Jornada SSP driver is supposed to be initialized by a module_init() call, but it was missed at some merge point. Since the driver mostly pass calls through it magically works anyway, but needs to be rectified. Cc: Kristoffer Ericson <kristoffer.ericson@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23ARM: 7297/1: smp_twd: make sure timer is stopped before registering itMarc Zyngier
On secondary CPUs, the Timer Control Register is not reset to a sane value before the timer is registered, and the TRM doesn't seem to indicate any reset value either. In some cases, the kernel will take an interrupt too early, depending on what junk was present in the registers at reset time. The fix is to set the Timer Control Register to 0 before registering the clock_event_device and enabling the interrupt. Problem seen on VE (Cortex A5) and Tegra. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23ARM: 7296/1: proc-v7.S: remove HARVARD_CACHE preprocessor guardsWill Deacon
On v7, we use the same cache maintenance instructions for data lines as for unified lines. This was not the case for v6, where HARVARD_CACHE was defined to indicate the L1 cache topology. This patch removes the erroneous compile-time check for HARVARD_CACHE in proc-v7.S, ensuring that we perform I-side invalidation at boot. Reported-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Cc: stable <stable@vger.kernel.org> Acked-by: Catalin Marinas <Catalin.Marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23ARM: 7295/1: cortex-a7: move proc_info out of !CONFIG_ARM_LPAE blockWill Deacon
The merging of commits 1b6ba46b ("ARM: LPAE: MMU setup for the 3-level page table format") and b4244738 ("ARM: 7202/1: Add Cortex-A7 proc info") during the merge window ended up putting the Cortex-A7 proc_info into a code block guarded by !CONFIG_ARM_LPAE. This makes Cortex-A7 platforms unbootable when LPAE is enabled. This patch moves the proc_info structure for Cortex-A7 outside of the guarded block. Cc: Pawel Moll <pawel.moll@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23ARM: 7293/1: logical_cpu_map: decouple CPU mapping from SMPWill Deacon
It turns out that the logical CPU mapping is useful even when !CONFIG_SMP for manipulation of devices like interrupt and power controllers when running a UP kernel on a CPU other than 0. This can happen when kexecing a UP image from an SMP kernel. In the future, multi-cluster systems running AMP configurations will require something similar for mapping cluster IDs, so it makes sense to decouple this logic in preparation for this support. Acked-by: Yang Bai <hamo.by@gmail.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Reported-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23ARM: 7291/1: cache: assume 64-byte L1 cachelines for ARMv7 CPUsWill Deacon
To ensure correct alignment of cacheline-aligned data, the maximum cacheline size needs to be known at compile time. Since Cortex-A8 and Cortex-A15 have 64-byte cachelines (and it is likely that there will be future ARMv7 implementations with the same line size) then it makes sense to assume that CPU_V7 implies a 64-byte L1 cacheline size. For CPUs with smaller caches, this will result in some harmless padding but will help with single zImage work and avoid hitting subtle bugs with misaligned data structures. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23ARM: 7290/1: vmlinux.lds.S: align the exception fixup table to a 4-byte boundaryWill Deacon
The exception fixup table is currently aligned to a 32-byte boundary. Whilst this won't cause any problems, the exception_table_entry structures contain only a pair of unsigned longs, so 4-byte alignment is all that is required. If the table was walked from start to end, cacheline alignment may bring some performance benefits, but since a binary search is used, the access pattern is random and will not benefit from a stricter alignment. Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23ARM: 7289/1: vmlinux.lds.S: do not hardcode cacheline size as 32 bytesWill Deacon
The linker script assumes a cacheline size of 32 bytes when aligning the .data..cacheline_aligned and .data..percpu sections. This patch updates the script to use L1_CACHE_BYTES, which should be set to 64 on platforms that require it. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-20ARM: big removal of now unused arch_idle()Nicolas Pitre
When this is the only content remaining in mach/system.h then the whole file is removed. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-and-tested-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: David Brown <davidb@codeaurora.org> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-20ARM: substitute arch_idle()Nicolas Pitre
Now that all implementations of arch_idle() are equivalent to cpu_do_idle() we can just use the later directly and stop including mach/system.h. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-and-tested-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Stephen Warren <swarren@nvidia.com>
2012-01-20ARM: mach-tegra: properly disable CPU idle callNicolas Pitre
Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Stephen Warren <swarren@nvidia.com>
2012-01-20ARM: mach-s3c64xx: use standard arch_idle() implementationNicolas Pitre
Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-01-20ARM: mach-w90x900: properly disable CPU idle callNicolas Pitre
Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20ARM: mach-shark: properly disable CPU idle callNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20ARM: mach-ixp4xx: properly disable CPU idle callNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20ARM: mach-ixp23xx: properly disable CPU idle callNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20ARM: mach-msm: hook special idle handlers to arm_pm_idleNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: David Brown <davidb@codeaurora.org>
2012-01-20ARM: plat-mxc: hook special idle handlers to arm_pm_idleNicolas Pitre
... and remove redundant include of <mach/system.h>. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20ARM: s3c24xx: move special idle code to out of lineNicolas Pitre
... and hook it to arm_pm_idle. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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