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2017-08-22arm64: mm: abort uaccess retries upon fatal signalMark Rutland
When there's a fatal signal pending, arm64's do_page_fault() implementation returns 0. The intent is that we'll return to the faulting userspace instruction, delivering the signal on the way. However, if we take a fatal signal during fixing up a uaccess, this results in a return to the faulting kernel instruction, which will be instantly retried, resulting in the same fault being taken forever. As the task never reaches userspace, the signal is not delivered, and the task is left unkillable. While the task is stuck in this state, it can inhibit the forward progress of the system. To avoid this, we must ensure that when a fatal signal is pending, we apply any necessary fixup for a faulting kernel instruction. Thus we will return to an error path, and it is up to that code to make forward progress towards delivering the fatal signal. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Laura Abbott <labbott@redhat.com> Cc: stable@vger.kernel.org Reviewed-by: Steve Capper <steve.capper@arm.com> Tested-by: Steve Capper <steve.capper@arm.com> Reviewed-by: James Morse <james.morse@arm.com> Tested-by: James Morse <james.morse@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-08-22arm64: fpsimd: Prevent registers leaking across execDave Martin
There are some tricky dependencies between the different stages of flushing the FPSIMD register state during exec, and these can race with context switch in ways that can cause the old task's regs to leak across. In particular, a context switch during the memset() can cause some of the task's old FPSIMD registers to reappear. Disabling preemption for this small window would be no big deal for performance: preemption is already disabled for similar scenarios like updating the FPSIMD registers in sigreturn. So, instead of rearranging things in ways that might swap existing subtle bugs for new ones, this patch just disables preemption around the FPSIMD state flushing so that races of this type can't occur here. This brings fpsimd_flush_thread() into line with other code paths. Cc: stable@vger.kernel.org Fixes: 674c242c9323 ("arm64: flush FP/SIMD state correctly after execve()") Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Dave Martin <Dave.Martin@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-08-22arm64: introduce separated bits for mm_context_t flagsYury Norov
Currently mm->context.flags field uses thread_info flags which is not the best idea for many reasons. For example, mm_context_t doesn't need most of thread_info flags. And it would be difficult to add new mm-related flag if needed because it may easily interfere with TIF ones. To deal with it, the new MMCF_AARCH32 flag is introduced for mm_context_t->flags, where MMCF prefix stands for mm_context_t flags. Also, mm_context_t flag doesn't require atomicity and ordering of the access, so using set/clear_bit() is replaced with simple masks. Signed-off-by: Yury Norov <ynorov@caviumnetworks.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-22arm64: hugetlb: Cleanup setup_hugepageszSteve Capper
Replace a lot of if statements with switch and case labels to make it much clearer which huge page sizes are supported. Also, we prevent PUD_SIZE from being used on systems not running with 4KB PAGE_SIZE. Before if one supplied PUD_SIZE in these circumstances, then unusuable huge page sizes would be in use. Fixes: 084bd29810a5 ("ARM64: mm: HugeTLB support.") Cc: David Woods <dwoods@mellanox.com> Signed-off-by: Steve Capper <steve.capper@arm.com> Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-22arm64: Re-enable support for contiguous hugepagesPunit Agrawal
also known as - Revert "Revert "Revert "commit 66b3923a1a0f ("arm64: hugetlb: add support for PTE contiguous bit")""" Now that our hugetlb implementation is compliant with the break-before-make requirements of the architecture and we have addressed some of the issues in core code required for properly dealing with hardware poisoning of contiguous hugepages let's re-enable support for contiguous hugepages. This reverts commit 6ae979ab39a368c18ceb0424bf824d172d6ab56f. Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-22arm64: hugetlb: Override set_huge_swap_pte_at() to support contiguous hugepagesPunit Agrawal
The default implementation of set_huge_swap_pte_at() does not support hugepages consisting of contiguous ptes. Override it to add support for contiguous hugepages. Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Cc: David Woods <dwoods@mellanox.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-22arm64: hugetlb: Override huge_pte_clear() to support contiguous hugepagesPunit Agrawal
The default huge_pte_clear() implementation does not clear contiguous page table entries when it encounters contiguous hugepages that are supported on arm64. Fix this by overriding the default implementation to clear all the entries associated with contiguous hugepages. Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Cc: David Woods <dwoods@mellanox.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-22Merge tag 'zynqmp-dt-for-4.14' of https://github.com/Xilinx/linux-xlnx into ↵Arnd Bergmann
next/dt64 Pull "arm64: Xilinx ZynqMP DT fixes for v4.14" from Michal Simek: - Fix DTC warnings - Add idle states, OP, cci-400, RTC, pcie prefetchable memory fpd/lpd dmas, clocks for ep108 - Enable can1 - Fix smmu IRQ, aliases, uart compatible string - Use generic compatible string for i2c eeprom * tag 'zynqmp-dt-for-4.14' of https://github.com/Xilinx/linux-xlnx: arm64: zynqmp: Add generic compatible string for I2C EEPROM arm64: zynqmp: Add missing mmc aliases in ep108 arm64: zynqmp: Enable can1 for ep108 arm64: zynqmp: Added clocks to DT for ep108 arm64: zynqmp: Use C pre-processor for includes arm64: zynqmp: Add fpd/lpd dmas arm64: zynqmp: Set status disabled in dtsi arm64: zynqmp: Add new uartps compatible string arm64: zynqmp: Correct IRQ nr for the SMMU arm64: zynqmp: Add support for RTC arm64: zynqmp: Adding prefetchable memory space to pcie node arm64: zynqmp: Add CCI-400 node arm64: zynqmp: Add dcc console for zynqmp arm64: zynqmp: Add operating points arm64: zynqmp: Add idle state for ZynqMP arm64: zynqmp: Add references to cpu nodes arm64: zynqmp: Move nodes which have no reg property out of bus arm64: zynqmp: Remove leading 0s from mtd table for spi flashes arm64: dts: xilinx: fix PCI bus dtc warnings
2017-08-22arm64: hugetlb: Handle swap entries in huge_pte_offset() for contiguous ↵Punit Agrawal
hugepages huge_pte_offset() was updated to correctly handle swap entries for hugepages. With the addition of the size parameter, it is now possible to disambiguate whether the request is for a regular hugepage or a contiguous hugepage. Fix huge_pte_offset() for contiguous hugepages by using the size to find the correct page table entry. Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Cc: David Woods <dwoods@mellanox.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-22arm64: hugetlb: Add break-before-make logic for contiguous entriesSteve Capper
It has become apparent that one has to take special care when modifying attributes of memory mappings that employ the contiguous bit. Both the requirement and the architecturally correct "Break-Before-Make" technique of updating contiguous entries can be found described in: ARM DDI 0487A.k_iss10775, "Misprogramming of the Contiguous bit", page D4-1762. The huge pte accessors currently replace the attributes of contiguous pte entries in place thus can, on certain platforms, lead to TLB conflict aborts or even erroneous results returned from TLB lookups. This patch adds two helper functions - * get_clear_flush(.) - clears a contiguous entry and returns the head pte (whilst taking care to retain dirty bit information that could have been modified by DBM). * clear_flush(.) that clears a contiguous entry A tlb invalidate is performed to then ensure that there is no possibility of multiple tlb entries being present for the same region. Cc: David Woods <dwoods@mellanox.com> Signed-off-by: Steve Capper <steve.capper@arm.com> (Added helper clear_flush(), updated commit log, and some cleanup) Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> [catalin.marinas@arm.com: remove CONFIG_ARM64_HW_AFDBM check] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-22arm64: hugetlb: Spring clean huge pte accessorsSteve Capper
This patch aims to re-structure the huge pte accessors without affecting their functionality. Control flow is changed to reduce indentation and expanded use is made of post for loop variable modification. It is then much easier to add break-before-make semantics in a subsequent patch. Cc: David Woods <dwoods@mellanox.com> Signed-off-by: Steve Capper <steve.capper@arm.com> Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-22arm64: hugetlb: Introduce pte_pgprot helperSteve Capper
Rather than xor pte bits in various places, use this helper function. Cc: David Woods <dwoods@mellanox.com> Signed-off-by: Steve Capper <steve.capper@arm.com> Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-22arm64: hugetlb: set_huge_pte_at Add WARN_ON on !pte_presentSteve Capper
This patch adds a WARN_ON to set_huge_pte_at as the accessor assumes that entries to be written down are all present. (There are separate accessors to clear huge ptes). We will need to handle the !pte_present case where memory offlining is used on hugetlb pages. swap and migration entries will be supplied to set_huge_pte_at in this case. Cc: David Woods <dwoods@mellanox.com> Signed-off-by: Steve Capper <steve.capper@arm.com> Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-21Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller
2017-08-21arm64: dts: rockchip: add more rk3399 iommu nodesSimon Xue
Add VPU/VDEC/IEP/ISP0/ISP1 iommu nodes Signed-off-by: Simon Xue <xxm@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-21arm64: dts: rockchip: add rk3368 iommu nodesSimon Xue
Add IEP/ISP/VOP/HEVC/VPU iommu nodes Signed-off-by: Simon Xue <xxm@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-21arm64: dts: rockchip: add rk3328 iommu nodesSimon Xue
Add H265e/VEPU/VPU/VDEC/VOP iommu nodes Signed-off-by: Simon Xue <xxm@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-21arm64: kexec: have own crash_smp_send_stop() for crash dump for nonpanic coresHoeun Ryu
Commit 0ee5941 : (x86/panic: replace smp_send_stop() with kdump friendly version in panic path) introduced crash_smp_send_stop() which is a weak function and can be overridden by architecture codes to fix the side effect caused by commit f06e515 : (kernel/panic.c: add "crash_kexec_post_ notifiers" option). ARM64 architecture uses the weak version function and the problem is that the weak function simply calls smp_send_stop() which makes other CPUs offline and takes away the chance to save crash information for nonpanic CPUs in machine_crash_shutdown() when crash_kexec_post_notifiers kernel option is enabled. Calling smp_send_crash_stop() in machine_crash_shutdown() is useless because all nonpanic CPUs are already offline by smp_send_stop() in this case and smp_send_crash_stop() only works against online CPUs. The result is that secondary CPUs registers are not saved by crash_save_cpu() and the vmcore file misreports these CPUs as being offline. crash_smp_send_stop() is implemented to fix this problem by replacing the existing smp_send_crash_stop() and adding a check for multiple calling to the function. The function (strong symbol version) saves crash information for nonpanic CPUs and machine_crash_shutdown() tries to save crash information for nonpanic CPUs only when crash_kexec_post_notifiers kernel option is disabled. * crash_kexec_post_notifiers : false panic() __crash_kexec() machine_crash_shutdown() crash_smp_send_stop() <= save crash dump for nonpanic cores * crash_kexec_post_notifiers : true panic() crash_smp_send_stop() <= save crash dump for nonpanic cores __crash_kexec() machine_crash_shutdown() crash_smp_send_stop() <= just return. Signed-off-by: Hoeun Ryu <hoeun.ryu@gmail.com> Reviewed-by: James Morse <james.morse@arm.com> Tested-by: James Morse <james.morse@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-21arm64: dma-mapping: Mark atomic_pool as __ro_after_initVladimir Murzin
atomic_pool is setup once while init stage and never changed after that, so it is good candidate for __ro_after_init Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-21arm64: dma-mapping: Do not pass data to gen_pool_set_algo()Vladimir Murzin
gen_pool_first_fit_order_align() does not make use of additional data, so pass plain NULL there. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-21arm64: zynqmp: Add generic compatible string for I2C EEPROMJavier Martinez Canillas
The at24 driver allows to register I2C EEPROM chips using different vendor and devices, but the I2C subsystem does not take the vendor into account when matching using the I2C table since it only has device entries. But when matching using an OF table, both the vendor and device has to be taken into account so the driver defines only a set of compatible strings using the "atmel" vendor as a generic fallback for compatible I2C devices. So add this generic fallback to the device node compatible string to make the device to match the driver using the OF device ID table. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21arm64: zynqmp: Add missing mmc aliases in ep108Michal Simek
Add missing mmc aliases. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21arm64: zynqmp: Enable can1 for ep108Naga Sureshkumar Relli
This patch enables can1 for ep108. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Reviewed-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21arm64: zynqmp: Added clocks to DT for ep108VNSL Durga
Added clks for ep108 platform. Signed-off-by: VNSL Durga <vnsldurg@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21arm64: zynqmp: Use C pre-processor for includesAlistair Francis
Change the dtsi include code to use the C pre-processor #include instead of the device tree /include/. This enables option to use dt binding headers. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21arm64: zynqmp: Add fpd/lpd dmasMichal Simek
Wire fpd and lpd dma channels to zynqmp.dtsi. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21arm64: zynqmp: Set status disabled in dtsiNaga Sureshkumar Relli
Do not enable smmu via dtsi. Enable it in board file when needed. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21arm64: zynqmp: Add new uartps compatible stringMichal Simek
Mainline kernel has r1p12 compatible string now. Use this new compatible string and also append generic compatible string. Keep in your mind that using this generic compatible string not all uart features will be available. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Moritz Fischer <mdf@kernel.org>
2017-08-21arm64: zynqmp: Correct IRQ nr for the SMMUEdgar E. Iglesias
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21arm64: zynqmp: Add support for RTCMichal Simek
Add support for RTC. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21arm64: zynqmp: Adding prefetchable memory space to pcie nodeBharat Kumar Gogada
Adding prefetchable memory space to pcie device tree node. Shifting configuration space to 64-bit address space. Removing pcie device tree node from amba as it requires size-cells=<2> in order to access 64-bit address space. Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21arm64: zynqmp: Add CCI-400 nodeMichal Simek
Add CCI-400 node to DTSI. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21arm64: zynqmp: Add dcc console for zynqmpMichal Simek
Add debug console to dtsi to be able to enable it in board dts file. Keep in your mind that every core has separate dcc port in case you want to run SMP kernel. DCC is very helpful communication channel for debugging. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21arm64: zynqmp: Add operating pointsShubhrajyoti Datta
Adding operating-points-v2 for zynqmp. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21arm64: zynqmp: Add idle state for ZynqMPStefan Krsmanovic
Added the idle-states node to describe zynqmp idle states. Only cpu-sleep-0 idle state is added in this patch. References to the idle-states node are added in all CPU nodes. Time values: entry/exit latencies and min-residency, needs to be tuned. arm,psci-suspend-param is selected to comply with PSCIv1.0 and Extended StateID format. Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com> Acked-by: Will Wong <willw@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21arm64: zynqmp: Add references to cpu nodesMichal Simek
Add missing references to all cpu nodes. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Moritz Fischer <mdf@kernel.org>
2017-08-21arm64: zynqmp: Move nodes which have no reg property out of busMichal Simek
Nodes without reg properties shouldn't be placed in amba node. Move them out. Warnings: arch/arm64/boot/dts/xilinx/zynqmp-ep108.dtb: Warning (simple_bus_reg): Node /amba/misc_clk missing or empty reg/ranges property arch/arm64/boot/dts/xilinx/zynqmp-ep108.dtb: Warning (simple_bus_reg): Node /amba/i2c_clk missing or empty reg/ranges property arch/arm64/boot/dts/xilinx/zynqmp-ep108.dtb: Warning (simple_bus_reg): Node /amba/sata_clk missing or empty reg/ranges property arch/arm64/boot/dts/xilinx/zynqmp-ep108.dtb: Warning (simple_bus_reg): Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21arm64: Remove the !CONFIG_ARM64_HW_AFDBM alternative code pathsCatalin Marinas
Since the pte handling for hardware AF/DBM works even when the hardware feature is not present, make the pte accessors implementation permanent and remove the corresponding #ifdefs. The Kconfig option is kept as it can still be used to disable the feature at the hardware level. Reviewed-by: Will Deacon <will.deacon@arm.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-21arm64: Ignore hardware dirty bit updates in ptep_set_wrprotect()Catalin Marinas
ptep_set_wrprotect() is only called on CoW mappings which are private (!VM_SHARED) with the pte either read-only (!PTE_WRITE && PTE_RDONLY) or writable and software-dirty (PTE_WRITE && !PTE_RDONLY && PTE_DIRTY). There is no race with the hardware update of the dirty state: clearing of PTE_RDONLY when PTE_WRITE (a.k.a. PTE_DBM) is set. This patch removes the code setting the software PTE_DIRTY bit in ptep_set_wrprotect() as superfluous. A VM_WARN_ONCE is introduced in case the above logic is wrong or the core mm code changes its use of ptep_set_wrprotect(). Reviewed-by: Will Deacon <will.deacon@arm.com> Acked-by: Steve Capper <steve.capper@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-21arm64: Move PTE_RDONLY bit handling out of set_pte_at()Catalin Marinas
Currently PTE_RDONLY is treated as a hardware only bit and not handled by the pte_mkwrite(), pte_wrprotect() or the user PAGE_* definitions. The set_pte_at() function is responsible for setting this bit based on the write permission or dirty state. This patch moves the PTE_RDONLY handling out of set_pte_at into the pte_mkwrite()/pte_wrprotect() functions. The PAGE_* definitions to need to be updated to explicitly include PTE_RDONLY when !PTE_WRITE. The patch also removes the redundant PAGE_COPY(_EXEC) definitions as they are identical to the corresponding PAGE_READONLY(_EXEC). Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-21kvm: arm64: Convert kvm_set_s2pte_readonly() from inline asm to cmpxchg()Catalin Marinas
To take advantage of the LSE atomic instructions and also make the code cleaner, convert the kvm_set_s2pte_readonly() function to use the more generic cmpxchg(). Cc: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-21arm64: Convert pte handling from inline asm to using (cmp)xchgCatalin Marinas
With the support for hardware updates of the access and dirty states, the following pte handling functions had to be implemented using exclusives: __ptep_test_and_clear_young(), ptep_get_and_clear(), ptep_set_wrprotect() and ptep_set_access_flags(). To take advantage of the LSE atomic instructions and also make the code cleaner, convert these pte functions to use the more generic cmpxchg()/xchg(). Reviewed-by: Will Deacon <will.deacon@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Steve Capper <steve.capper@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-21arm64: dts: rockchip: Add basic cpu frequencies for RK3368Romain Perier
This adds and enable the operating points that have been tested and are currently supported by the SoC. This also adds clocks for ARMCLKL and ARMCLKB. Signed-off-by: Romain Perier <romain.perier@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-21arm64: dts: rockchip: add rk805 node for rk3328-evbJoseph Chen
RK805 consists of 4 DCDCs, 3 LDOs. It's different from RK808 and RK818 that there are 2 output only GPIOs, we should add properties "gpio-controller" and "gpio-cells = <2>". Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-21Merge branch 'for-mingo' of ↵Ingo Molnar
git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu into core/rcu Pull RCU updates from Paul E. McKenney: - Removal of spin_unlock_wait() - SRCU updates - Torture-test updates - Documentation updates - Miscellaneous fixes - CPU-hotplug fixes - Miscellaneous non-RCU fixes Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-08-21efi/libstub/arm64: Use hidden attribute for struct screen_info referenceArd Biesheuvel
To prevent the compiler from emitting absolute references to screen_info when building position independent code, redeclare the symbol with hidden visibility. Tested-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Matt Fleming <matt@codeblueprint.co.uk> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-efi@vger.kernel.org Link: http://lkml.kernel.org/r/20170818194947.19347-3-ard.biesheuvel@linaro.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-08-21Merge tag 'sunxi-dt64-for-4.14-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt64 Pull "Allwinner arm64 device tree changes for 4.14, round 2" from Chen-Yu Tsai: The usual improvement patches: - PMIC, USB and WiFi enabled for Bananapi M64 - New board added: NanoPi A64 - New board added: Olimex A64-OLinuXino * tag 'sunxi-dt64-for-4.14-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: allwinner: a64: Add A64-OLinuXino initial support arm64: allwinner: a64: Add initial NanoPi A64 support arm64: allwinner: a64: add proper support for the Wi-Fi on BPi M64 arm64: allwinner: a64: enable AXP803 for Banana Pi M64 arm64: allwinner: a64: enable USB host controller for BPi M64
2017-08-21Merge tag 'sunxi-config64-for-4.14' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/arm64 Pull "Allwinner arm64 defconfig changes for 4.14" from Chen-Yu Tsai: Enable X-Powers AXP series PMIC mfd and regulator support by default. * tag 'sunxi-config64-for-4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: defconfig: Enable REGULATOR_AXP20X arm64: defconfig: Enable MFD_AXP20X_RSB
2017-08-20Merge branch 'timers-urgent-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer fixes from Thomas Gleixner: "A few small fixes for timer drivers: - Prevent infinite recursion in the arm architected timer driver with ftrace - Propagate error codes to the caller in case of failure in EM STI driver - Adjust a bogus loop iteration in the arm architected timer driver - Add a missing Kconfig dependency to the pistachio clocksource to prevent build failures - Correctly check for IS_ERR() instead of NULL in the shared timer-of code" * 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource/drivers/arm_arch_timer: Avoid infinite recursion when ftrace is enabled clocksource/drivers/Kconfig: Fix CLKSRC_PISTACHIO dependencies clocksource/drivers/timer-of: Checking for IS_ERR() instead of NULL clocksource/drivers/em_sti: Fix error return codes in em_sti_probe() clocksource/drivers/arm_arch_timer: Fix mem frame loop initialization
2017-08-19arm64: dts: rockchip: Assign mic irq to correct device for GruJeffy Chen
Currently we are assigning mic irq to rt5514 i2c driver, which is wrong. Assign it to rt5514 spi driver instead. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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