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path: root/arch/arm64/mm/cache.S
AgeCommit message (Expand)Author
2018-03-09arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDCShanker Donthineni
2018-01-17arm64: mm: Add additional parameter to uaccess_ttbr0_disableChristoffer Dall
2018-01-09arm64: mm: Add additional parameter to uaccess_ttbr0_enableChristoffer Dall
2018-01-08arm64: KVM: Add invalidate_icache_range helperMarc Zyngier
2017-08-09arm64: Implement pmem API supportRobin Murphy
2017-08-09arm64: Convert __inval_cache_range() to area-basedRobin Murphy
2016-12-26arm64: don't pull uaccess.h into *.SAl Viro
2016-12-24Replace <asm/uaccess.h> with <linux/uaccess.h> globallyLinus Torvalds
2016-11-21arm64: Disable TTBR0_EL1 during normal kernel executionCatalin Marinas
2016-08-22arm64: mm: convert __dma_* routines to use start, sizeKwangwoo Lee
2016-07-01arm64: fix "dc cvau" cache operation on errata-affected coreAndre Przywara
2016-04-28arm64: Fold proc-macros.S into assembler.hGeoff Levand
2015-12-17arm64: Use PoU cache instr for I/D coherencyAshok Kumar
2015-10-12arm64: use ENDPIPROC() to annotate position independent assembler routinesArd Biesheuvel
2015-07-27arm64: mm: Adopt new alternative assembler macrosDaniel Thompson
2015-06-05arm64: alternative: Merge alternative-asm.h into alternative.hMarc Zyngier
2015-05-19arm64: kill flush_cache_all()Mark Rutland
2014-12-01arm64: compat: align cacheflush syscall with arch/armVladimir Murzin
2014-11-25arm64: add Cortex-A53 cache errata workaroundAndre Przywara
2014-05-09arm64: mm: use inner-shareable barriers for inner-shareable maintenanceWill Deacon
2014-04-08arm64: Fix DMA range invalidation for cache line unaligned buffersCatalin Marinas
2014-04-05arm64: Relax the kernel cache requirements for bootCatalin Marinas
2014-03-04arm64: remove unnecessary cache flush at bootMark Rutland
2014-02-27arm64: Implement coherent DMA API based on swiotlbCatalin Marinas
2014-01-22arm64: mm: fix the function name in comment of __flush_dcache_areaJingoo Han
2013-05-14arm64: mm: Fix operands of clz in __flush_dcache_allSukanto Ghosh
2012-09-17arm64: Cache maintenance routinesCatalin Marinas