summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/qcom/msm8998.dtsi
AgeCommit message (Collapse)Author
2020-03-05arm64: dts: qcom: msm8998: Fix cpu compatibleAmit Kucheria
"arm,armv8" compatible should only be used for software models. Replace it with the real cpu type. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Link: https://lore.kernel.org/r/0535d640e9cd01887b5532f893ce4d61feca6d6d.1583445235.git.amit.kucheria@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-28arm64: dts: msm8998: thermal: Add critical interrupt supportAmit Kucheria
Register critical interrupts for each of the two tsens controllers Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Link: https://lore.kernel.org/r/3ef309a98ca6445c1982ec3ff1a70db39b18f415.1575349416.git.amit.kucheria@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-20arm64: dts: qcom: msm8998: Add ADSP, MPSS and SLPI nodesSibi Sankar
This patch adds ADSP, MPSS and SLPI nodes for MSM8998 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20191218132217.28141-6-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-20arm64: dts: qcom: msm8998: Update reserved memory mapSibi Sankar
Update existing and add missing regions to the reserved memory map, as described in version 7.1 Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20191218132217.28141-5-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: dts: qcom: msm8998: Add gpucc nodeJeffrey Hugo
Add MSM8998 GPU Clock Controller DT node. Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Link: https://lore.kernel.org/r/20191031185806.15602-1-jeffrey.l.hugo@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: dts: qcom: msm8998: Fix tcsr syscon sizeJeffrey Hugo
The tcsr syscon region is really 0x40000 in size. We need access to the full region so that we can access the axi resets when managing the modem subsystem. Fixes: c7833949564e ("arm64: dts: qcom: msm8998: Add smem related nodes") Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Link: https://lore.kernel.org/r/20191107045948.4341-1-jeffrey.l.hugo@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: dts: qcom: msm8998: Add wifi nodeJeffrey Hugo
Add the wifi node and required reserved memory to enable the wlan hardware. Enable the wifi node in both the mtp and clamshell platforms after adding the relevant regulators for each platform. Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Link: https://lore.kernel.org/r/20191107043313.4055-3-jeffrey.l.hugo@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: dts: qcom: msm8998: Add anoc2 smmu nodeJeffrey Hugo
While there are several peripherals on the anoc2, most are not behind the smmu. However, the SoC integrated wlan block is behind the smmu, so we'll need to control the smmu inorder to enable wifi. Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Link: https://lore.kernel.org/r/20191107043313.4055-2-jeffrey.l.hugo@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-10-31arm64: dts: qcom: msm8998: Disable coresight by defaultSai Prakash Ranjan
Boot failure has been reported on MSM8998 based laptop when coresight is enabled. This is most likely due to lack of firmware support for coresight on production device when compared to debug device like MTP where this issue is not observed. So disable coresight by default for MSM8998 and enable it only for MSM8998 MTP. Reported-and-tested-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Fixes: 783abfa2249a ("arm64: dts: qcom: msm8998: Add Coresight support") Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-10-27arm64: dts: msm8998: thermal: Add interrupt supportAmit Kucheria
Register upper-lower interrupts for each of the two tsens controllers. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-10-18arm64: dts: qcom: msm8998: Add blsp1_uart3Jeffrey Hugo
The blsp1_uart3 peripheral appears to be commonly used for interfacing with other SoCs on a platform, such as a wcn3990 to provide bluetooth. Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-10-18arm64: dts: qcom: msm8998: Add blsp1 BAMJeffrey Hugo
The BAM in the blsp1 block can be used as a DMA engine to offload work when managing any of the peripherals in the blsp. Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-08-05arm64: dts: qcom: msm8998: Add Coresight supportSai Prakash Ranjan
Enable coresight support by adding device nodes for the available source, sinks and channel blocks on MSM8998. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-08-05arm64: dts: qcom: msm8998: Node ordering, address cleanupsJeffrey Hugo
DT nodes should be ordered by address, then node name, and finally label. The msm8998 dtsi does not follow this, so clean it up by reordering the nodes. While we are at it, extend the addresses to be fully 32-bits wide so that ordering is easy to determine when adding new nodes. Also, two or so nodes had the wrong address value in their node name (did not match the reg property), so fix those up as well. Hopefully going forward, things can be maintained so that a cleanup like this is not needed. Reviewed-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-06-17arm64: dts: qcom: msm8998: Add PCIe PHY and RC nodesMarc Gonzalez
Add MSM8998 PCIe QMP PHY and PCIe root complex DT nodes. Based on the following DTS downstream: https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/msm8998.dtsi?h=LE.UM.1.3.r3.25#n2537 Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-06-17arm64: dts: qcom: msm8998: Add ANOC1 SMMU nodeMarc Gonzalez
The MSM8998 ANOC1(*) SMMU services BLSP2, PCIe, UFS, and USB. (*) Aggregate Network-on-Chip #1 Based on the following DTS downstream: https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/msm-arm-smmu-8998.dtsi?h=LE.UM.1.3.r3.25#n18 Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-06-11arm64: dts: qcom: msm8998: Add PSCI cpuidle low power statesAmit Kucheria
Add device bindings for cpuidle states for cpu devices. [marc: rebase, fix arm,psci-suspend-param, fix entry-latency-us] Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-05-29arm64: dts: qcom: msm8998: Add rpmpd nodeSibi Sankar
Add the rpmpd node on the msm8998 and define the available levels. Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> [bjorn: dropped use of level defines, to allow merging in parallel] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-25arm64: dts: msm8998: thermal: Restrict thermal zone name length to under 20Amit Kucheria
The thermal core restricts names of thermal zones to under 20 characters. Fix the names for a couple of msm8998 thermal zones. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Tested-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-25arm64: dts: msm8998: thermal: Fix number of supported sensorsAmit Kucheria
msm8998 has 22 sensors connected in total, 14 on the 1st controller, 8 on the 2nd controller. Increase the number to allow sensors with ID 12 and 13 to be registered. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Tested-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-18arm64: dts: qcom: msm8998: Fix blsp2_i2c5 addressMarc Gonzalez
blsp1_i2c1 is at 0x0c175000 blsp2_i2c5 is at 0x0c1ba000 (the label is correct) Fixes: 1e71d0c273d0a ("arm64: dts: qcom: msm8998: Enumerate i2c controllers") Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09arm64: dts: msm8998: Add UFS phy resetMarc Gonzalez
Fixup MSM8998 UFS DT nodes now that Evan's reset series has landed. https://lore.kernel.org/lkml/20190321171800.104681-1-evgreen@chromium.org/ Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09Merge branch 'arm64-thermal-for-5.2' into arm64-for-5.2Andy Gross
2019-04-09arm64: dts: msm8998: thermal: Make trip names consistentAmit Kucheria
Maintain naming consistency with what was landed for sdm845. Simplifies parsing for test tools. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09arm64: dts: msm8998: thermal: Add temperature sensors near major peripheralsAmit Kucheria
msm8998 has a total of 22 temperature sensors. Populate DT with information about them. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09arm64: dts: msm8998: thermal: GPU has two sensors, add the secondAmit Kucheria
The first sensor is on top and the second sensor below the GPU Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09arm64: dts: msm8998: thermal: Fix the gpu sensor numberAmit Kucheria
The GPU sensor is sensor ID 13 on controller 0 Fixes: 4449b6f248d9a1 ("arm64: dts: qcom: msm8998: Add tsens and thermal-zones") Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09arm64: dts: msm8998: thermal: Fix the cpu sensor numbersAmit Kucheria
The silver cluster (typically cpu0-3) are monitored by sensor IDs 1-3 on tsens controller 0. The gold cluster (typically cpu4-7) are monitored by sensor IDs 7-10 on tsens controller 0. Fixes: 4449b6f248d9a1 ("arm64: dts: qcom: msm8998: Add tsens and thermal-zones") Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09arm64: dts: msm8998: efficiency is not valid propertyAmit Kucheria
efficiency comes from downstream. The valid upstream property is capacity-dmips-mhz but until we can come up with those numbers, remove this property. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09arm64: dts: msm8998: thermal: split address space into twoAmit Kucheria
We've earlier added support to split the register address space into TM and SROT regions. Split up the regmap address space into two for msm8998 that has a similar register layout. The order is important (TM before SROT) because we make an assumption that SROT is always the second address space in order to support legacy DTs. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-03-27arm64: dts: qcom: msm8998: Add UFS nodesMarc Gonzalez
Add host controller and PHY DT nodes. Tested-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-03-06Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM SoC device tree updates from Arnd Bergmann: "This is a smaller update than the past few times, but with just over 500 non-merge changesets still dwarfes the rest of the SoC tree. Three new SoC platforms get added, each one a follow-up to an existing product, and added here in combination with a reference platform: - Renesas RZ/A2M (R7S9210) 32-bit Cortex-A9 Real-time imaging processor: https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rza/rza2m.html - Renesas RZ/G2E (r8a774c0) 64-bit Cortex-A53 SoC "for Rich Graphics Applications": https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rzg/rzg2e.html - NXP i.MX8QuadXPlus 64-bit Cortex-A35 SoC: https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-8-processors/i.mx-8x-family-arm-cortex-a35-3d-graphics-4k-video-dsp-error-correcting-code-on-ddr:i.MX8X These are actual commercial products we now support with an in-kernel device tree source file: - Bosch Guardian is a product made by Bosch Power Tools GmbH, based on the Texas Instruments AM335x chip - Winterland IceBoard is a Texas Instruments AM3874 based machine used in telescopes at the south pole and elsewhere, see commit d031773169df2 for some pointers: - Inspur on5263m5 is an x86 server platform with an Aspeed ast2500 baseboard management controller. This is for running on the BMC. - Zodiac Digital Tapping Unit, apparently a kind of ethernet switch used in airplanes. - Phicomm K3 is a WiFi router based on Broadcom bcm47094 - Methode Electronics uDPU FTTdp distribution point unit - X96 Max, a generic TV box based on Amlogic G12a (S905X2) - NVIDIA Shield TV (Darcy) based on Tegra210 And then there are several new SBC, evaluation, development or modular systems that we add: - Three new Rockchips rk3399 based boards: - FriendlyElec NanoPC-T4 and NanoPi M4 - Radxa ROCK Pi 4 - Five new i.MX6 family SoM modules and boards for industrial products: - Logic PD i.MX6QD SoM and evaluation baseboad - Y Soft IOTA Draco/Hydra/Ursa family boards based on i.MX6DL - Phytec phyCORE i.MX6 UltraLite SoM and evaluation module - MYIR Tech MYD-LPC4357 development based on the NXP lpc4357 microcontroller - Chameleon96, an Intel/Altera Cyclone5 based FPGA development system in 96boards form factor - Arm Fixed Virtual Platforms(FVP) Base RevC, a purely virtual platform for corresponding to the latest "fast model" - Another Raspberry Pi variant: Model 3 A+, supported both in 32-bit and 64-bit mode. - Oxalis Evalkit V100 based on NXP Layerscape LS1012a, in 96Boards enterprise form factor - Elgin RV1108 R1 development board based on 32-bit Rockchips RV1108 For already supported boards and SoCs, we often add support for new devices after merging the drivers. This time, the largest changes include updates for - STMicroelectronics stm32mp1, which was now formally launched last week - Qualcomm Snapdragon 845, a high-end phone and low-end laptop chip - Action Semi S700 - TI AM654x, their recently merged 64-bit SoC from the OMAP family - Various Amlogic Meson SoCs - Mediatek MT2712 - NVIDIA Tegra186 and Tegra210 - The ancient NXP lpc32xx family - Samsung s5pv210, used in some older mobile phones Many other chips see smaller updates and bugfixes beyond that" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (506 commits) ARM: dts: exynos: Fix max voltage for buck8 regulator on Odroid XU3/XU4 dt-bindings: net: ti: deprecate cpsw-phy-sel bindings ARM: dts: am335x: switch to use phy-gmii-sel ARM: dts: am4372: switch to use phy-gmii-sel ARM: dts: dm814x: switch to use phy-gmii-sel ARM: dts: dra7: switch to use phy-gmii-sel arch: arm: dts: kirkwood-rd88f6281: Remove disabled marvell,dsa reference ARM: dts: exynos: Add support for secondary DAI to Odroid XU4 ARM: dts: exynos: Add support for secondary DAI to Odroid XU3 ARM: dts: exynos: Disable ARM PMU on Odroid XU3-lite ARM: dts: exynos: Add stdout path property to Arndale board ARM: dts: exynos: Add minimal clkout parameters to Exynos3250 PMU ARM: dts: exynos: Enable ADC on Odroid HC1 arm64: dts: sprd: Remove wildcard compatible string arm64: dts: sprd: Add SC27XX fuel gauge device arm64: dts: sprd: Add SC2731 charger device arm64: dts: sprd: Add ADC calibration support arm64: dts: sprd: Remove PMIC INTC irq trigger type arm64: dts: rockchip: Enable tsadc device on rock960 ARM: dts: rockchip: add chosen node on veyron devices ...
2019-02-26arm64: dts: qcom: msm8998: Extend TZ reserved memory areaMarc Gonzalez
My console locks up as soon as Linux writes to [88800000,88f00000[ AFAIU, that memory area is reserved for trustzone. Extend TZ reserved memory range, to prevent Linux from stepping on trustzone's toes. Cc: stable@vger.kernel.org # 4.20+ Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Fixes: c7833949564ec ("arm64: dts: qcom: msm8998: Add smem related nodes") Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-02-01arm64: dts: qcom: msm8998: Add rpmcc nodeMarc Gonzalez
Add MSM8998 Resource Power Manager Clock Controller DT node. Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-02-01arm64: dts: qcom: msm8998: Add USB-related nodesJeffrey Hugo
Add nodes for USB and related PHYs. Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-01-24arm64: dts: qcom: msm8998: Enumerate i2c controllersJeffrey Hugo
msm8998 has a dozen i2c controllers which can be used to connect to board specific peripherals. Enumerate the controllers so that boards can wire up as needed. Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> [bjorn: Renumbered labels on BLSP2 nodes] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-12-07arm64: dts: qcom: msm8998: Fixup clock to use xo_boardAndy Gross
This patch sets the msm8998 xo clock name back to xo_board. Recent clock tree changes fixed the clock tree and the change to the xo name is causing issues where msm8998 boards do not boot properly. Let's change it back and leave the xo label on it. Fixes: 634da3307b08 (arm64: dts: qcom: msm8998: correct xo clock name) Signed-off-by: Andy Gross <andy.gross@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org>
2018-11-30arm64: dts: qcom: msm8998: Fix compatible of scm nodeBjorn Andersson
The scm binding and driver was updated to rely on the fallback to the default qcom,scm for any modern SoC and as such both are required. Add the default compatible to make the scm instance probe. Fixes: d850156a226a ("arm64: dts: qcom: msm8998: Add firmware node") Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-29arm64: dts: qcom: msm8998: Add SDC2 control pinsJeffrey Hugo
The SDC2 control pins are typically used to manage sleep. Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-29arm64: dts: qcom: msm8998-mtp: Add external SDJeffrey Hugo
The externally accessible SD card slot on the MTP is driven by SDCC2. Wire it up for use. Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-29arm64: dts: qcom: msm8998: Add SDCC2Jeffrey Hugo
SDCC2 is typically used as the controller for an external SD card slot. Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-29arm64: dts: qcom: msm8998: correct xo clock nameJeffrey Hugo
The root parent clock of most msm8998 clock is the "xo" clock. The DT node is incorrectly named "xo_board", which prevents Linux from correctly parsing the clock tree, resulting in most clocks being unparented and unable to be manipulated. The end result is that we can't turn on clocks for peripherals like SD, so init usually fails. Fixes: 4807c71cc688 (arm64: dts: Add msm8998 SoC and MTP board support) Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13arm64: dts: qcom: msm8998: Add smp2p nodesBjorn Andersson
Add the adsp, modem and slpi smp2p nodes to msm8998. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13arm64: dts: qcom: msm8998: Add the qfprom nodeBjorn Andersson
Add the QFPROM nvmem node to msm8998 Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13arm64: dts: qcom: msm8998: Add firmware nodeBjorn Andersson
Add the firmware and scm nodes for msm8998 Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13arm64: dts: qcom: msm8998: Add smem related nodesBjorn Andersson
Add reserve-memory nodes, tcsr-mutex nodes and the smem node. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13arm64: dts: qcom: msm8998: Add tsens and thermal-zonesBjorn Andersson
Add the two tsens instances and the thermal zones for CPUs, GPUs, battery and skin sensors. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13arm64: dts: qcom: msm8998: Add RPM and regulators for MTPBjorn Andersson
Add nodes for RPM communication for MSM8998 and the regulator nodes for the MTP. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13arm64: dts: Add msm8998 SoC and MTP board supportJoonwoo Park
Add initial device tree support for the Qualcomm MSM8998 SoC and MTP8998 evaluation board. Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org> Signed-off-by: Imran Khan <kimran@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> [bjorn: Restructured, removed its node and moved to SPDX headers] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-23 13:28:12 +0000