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2012-05-26Merge tag 'cleanup2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull arm-soc cleanups (part 2) from Olof Johansson: "More cleanups, continuing an earlier set with omap and samsung specific cleanups. These could not go into the first set because they have dependencies on various other series that in turn depend on the first cleanups." Fixed up conflicts in arch/arm/plat-omap/counter_32k.c due to commit bd0493eaaf5c: "move read_{boot,persistent}_clock to the architecture level" that changed how the persistent clocks were handled. And trivial conflicts in arch/arm/mach-omap1/common.h due to just independent changes close to each other. * tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (35 commits) ARM: SAMSUNG: merge plat-s5p into plat-samsung ARM: SAMSUNG: move options for common s5p into plat-samsung/Kconfig ARM: SAMSUNG: move setup code for s5p mfc and mipiphy into plat-samsung ARM: SAMSUNG: move platform device for s5p uart into plat-samsung ARM: SAMSUNG: move hr timer for common s5p into plat-samsung ARM: SAMSUNG: move pm part for common s5p into plat-samsung ARM: SAMSUNG: move interrupt part for common s5p into plat-samsung ARM: SAMSUNG: move clock part for common s5p into plat-samsung ARM: S3C24XX: Use common macro to define resources on dev-uart.c ARM: S3C24XX: move common clock init into common.c ARM: S3C24XX: move common power-management code to mach-s3c24xx ARM: S3C24XX: move plat-s3c24xx/dev-uart.c into common.c ARM: S3C24XX: move plat-s3c24xx/cpu.c ARM: OMAP2+: Kconfig: convert SOC_OMAPAM33XX to SOC_AM33XX ARM: OMAP2+: Kconfig: convert SOC_OMAPTI81XX to SOC_TI81XX GPMC: add ECC control definitions ARM: OMAP2+: dmtimer: remove redundant sysconfig context restore ARM: OMAP: AM35xx: convert 3517 detection/flags to AM35xx ARM: OMAP: AM35xx: remove redunant cpu_is checks for AM3505 ARM: OMAP1: Pass dma request lines in platform data to MMC driver ...
2012-05-08ARM: OMAP4: Remove un-used WakeupGen register defines.Santosh Shilimkar
Current OMAP code doesn't use any of the OMAP_WKG_ENB_SECURE_* registers. So remove those defines. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-05-04ARM: OMAP: Revert "ARM: OMAP: ctrl: Fix CONTROL_DSIPHY register fields"Archit Taneja
This reverts commit 46f8c3c7e95c0d30d95911e7975ddc4f93b3e237. The commit above swapped the DSI1_PPID and DSI2_PPID register fields in CONTROL_DSIPHY to be in sync with the newer public OMAP TRMs(after version V). With this commit, contention errors were reported on DSI lanes some OMAP4 SDPs. After probing the DSI lanes on OMAP4 SDP, it was seen that setting bits in the DSI2_PPID field was pulling up voltage on DSI1 lanes, and DSI1_PPID field was pulling up voltage on DSI2 lanes. This proves that the current version of OMAP4 TRM is incorrect, swap the position of register fields according to the older TRM versions as they were correct. Cc: stable@vger.kernel.org # v3.2+ Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-03-31ARM: fix more fallout from 9f97da78bf (Disintegrate asm/system.h for ARM)Russell King
arch/arm/kernel/io.c: In function '_memcpy_toio': arch/arm/kernel/io.c:29: error: implicit declaration of function 'outer_sync' arch/arm/mach-omap2/omap_l3_noc.c: In function 'l3_interrupt_handler': arch/arm/mach-omap2/omap_l3_noc.c:100: error: implicit declaration of function 'outer_sync' kernel/irq/generic-chip.c: In function 'irq_gc_mask_disable_reg': kernel/irq/generic-chip.c:45: error: implicit declaration of function 'outer_sync' kernel/sched/rt.c: In function 'rt_set_overload': kernel/sched/rt.c:248: error: implicit declaration of function 'outer_sync' ... Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-03-06ARM: remove bunch of now unused mach/io.h filesRob Herring
Now that many platforms don't need mach/io.h, remove the unused ones. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org>
2012-02-28Merge branch 'iomap' into cleanupTony Lindgren
2012-02-24ARM: OMAP: Remove plat/io.h by splitting it into mach/io.h and mach/hardware.hTony Lindgren
This is needed to minimize io.h so the SoC specific io.h for ARMs can removed. Note that minimal driver changes for DSS and RNG are needed to include cpu.h for SoC detection macros. Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Matt Mackall <mpm@selenic.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-02-22Merge branch 'entry-macro-cleanup' of git://sources.calxeda.com/kernel/linux ↵Russell King
into for-armsoc
2012-02-21ARM: remove disable_fiq and arch_ret_to_user macrosRob Herring
Now that most platforms don't need disable_fiq and arch_ret_to_user macros, we can remove the empty macros or empty entry-macro.S files. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Ryan Mallon <rmallon@gmail.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-01-20ARM: big removal of now unused arch_idle()Nicolas Pitre
When this is the only content remaining in mach/system.h then the whole file is removed. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-and-tested-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: David Brown <davidb@codeaurora.org> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2011-12-16Merge branch 'for_3.3/uart/runtime-pm' of ↵Tony Lindgren
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into uart Conflicts: arch/arm/mach-omap2/pm34xx.c
2011-12-13ARM: OMAP: TI81XX: Prepare for addition of TI814X supportHemant Pedanekar
This patch updates existing macros, functions used for TI816X, to enable addition of other SoCs belonging to TI81XX family (e.g., TI814X). The approach taken is to use TI81XX/ti81xx for code/data going to be common across all TI81XX devices. cpu_is_ti81xx() is introduced to handle code common across TI81XX devices. In addition, ti8168_evm_map_io() is now replaced with ti81xx_map_io() and moved in mach-omap2/common.c as same will be used for TI814X and is not board specific. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-08ARM: OMAP4: Fix errata i688 with MPU interconnect barriers.Santosh Shilimkar
On OMAP4 SOC, intecronnects has many write buffers in the async bridges and they need to be drained before CPU enters into standby state. Patch 'OMAP4: PM: Add CPUX OFF mode support' added CPU PM support but OMAP errata i688 (Async Bridge Corruption) needs to be taken care to avoid issues like system freeze, CPU deadlocks, random crashes with register accesses, synchronisation loss on initiators operating on both interconnect port simultaneously. As per the errata, if a data is stalled inside asynchronous bridge because of back pressure, it may be accepted multiple times, creating pointer misalignment that will corrupt next transfers on that data path until next reset of the system (No recovery procedure once the issue is hit, the path remains consistently broken). Async bridge can be found on path between MPU to EMIF and MPU to L3 interconnect. This situation can happen only when the idle is initiated by a Master Request Disconnection (which is trigged by software when executing WFI on CPU). The work-around for this errata needs all the initiators connected through async bridge must ensure that data path is properly drained before issuing WFI. This condition will be met if one Strongly ordered access is performed to the target right before executing the WFI. In MPU case, L3 T2ASYNC FIFO and DDR T2ASYNC FIFO needs to be drained. IO barrier ensure that there is no synchronisation loss on initiators operating on both interconnect port simultaneously. Thanks to Russell for a tip to conver assembly function to C fuction there by reducing 40 odd lines of code from the patch. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Richard Woodruff <r-woodruff2@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-12-08ARM: OMAP4: PM: Add L2X0 cache lowpower supportSantosh Shilimkar
When MPUSS hits off-mode, L2 cache is lost. This patch adds L2X0 necessary maintenance operations and context restoration in the low power code. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-12-08ARM: OMAP4: PM: Add CPUX OFF mode supportSantosh Shilimkar
This patch adds the CPU0 and CPU1 off mode support. CPUX close switch retention (CSWR) is not supported by hardware design. The CPUx OFF mode isn't supported on OMAP4430 ES1.0 CPUx sleep code is common for hotplug, suspend and CPUilde. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-12-08ARM: OMAP4: PM: Add WakeupGen module as OMAP gic_arch_extnSantosh Shilimkar
OMAP WakeupGen is the interrupt controller extension used along with ARM GIC to wake the CPU out from low power states on external interrupts. The WakeupGen unit is responsible for generating the wakeup event from the incoming interrupts and enable bits. It is implemented in the MPU always ON power domain. During normal operation, WakeupGen delivers the external interrupts directly to the GIC. WakeupGen specification has one restriction as per Veyron version 1.6. It is SW responsibility to program interrupt enabling/disabling coherently in the GIC and in the WakeupGen enable registers. That is, a given interrupt for a given CPU is either enable at both GIC and WakeupGen, or disable at both, but no mix. That's the reason the WakeupGen is implemented as an extension of GIC. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-12-08ARM: OMAP: PM: Add support to allocate the memory for secure RAMSantosh Shilimkar
Allocate the memory to save secure ram context which needs to be done when MPU is hitting OFF mode. The ROM code expects a physical address to this memory and hence use memblock APIs to reserve this memory as part of .reserve() callback. Maximum size as per secure RAM requirements is allocated. To keep omap1 build working, omap-secure.h file is created under plat-omap directory. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-12-08ARM: OMAP: Add Secure HAL and monitor mode API infrastructure.Santosh Shilimkar
On OMAP secure/emulation devices, certain APIs are exported by secure code. Add an infrastructure so that relevant operations on secure devices can be implemented using it. While at this, rename omap44xx-smc.S to omap-smc.S since the common APIs can be used on other OMAP's too. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-12-05Merge branch 'vmalloc' of git://git.linaro.org/people/nico/linux into ↵Russell King
devel-stable
2011-11-26ARM: big removal of now unused vmalloc.h filesNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-11-21Merge branch 'irqchip-consolidation' of ↵Russell King
git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into devel-stable Conflicts: arch/arm/mach-omap2/board-4430sdp.c arch/arm/mach-omap2/board-omap4panda.c arch/arm/mach-omap2/include/mach/omap4-common.h arch/arm/plat-omap/include/plat/irqs.h The changes to omap4-common.h were moved to arch/arm/mach-omap2/common.h and the other trivial conflicts resolved. The now empty ifdef in irqs.h was also eliminated.
2011-11-17ARM: 7159/1: OMAP: Introduce local common.h filesTony Lindgren
As suggested by Russell King - ARM Linux <linux@arm.linux.org.uk>, there's no need to keep local prototypes in non-local headers. Add mach-omap1/common.h and mach-omap2/common.h and move the local prototypes there from plat/common.h and mach/omap4-common.h. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-11-15ARM: omap2plus: remove irq-related global base addressesMarc Zyngier
After the MULTI_IRQ_HANDLER conversion, a couple of global variables can be removed. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2011-11-15ARM: omap2plus: convert to CONFIG_MULTI_IRQ_HANDLERMarc Zyngier
Convert the omap2plus platforms to be using CONFIG_MULTI_IRQ_HANDLER. Each machine is modified to provide either omap2_intc_handle_irq(), omap3_intc_handle_irq() or gic_handle_irq(). This allows for a major cleanup, removing the MULTI_OMAP setup from the interrupt path. Tested on both Panda and IGEPv2 (single kernel image) Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2011-11-04Merge branch 'prcm_scm_misc_fixes_3.2' of git://git.pwsan.com/linux-2.6 into ↵Tony Lindgren
fixes
2011-10-23Merge branch 'ppi-irq-core-for-rmk' of ↵Russell King
git://github.com/mzyngier/arm-platforms into devel-stable
2011-10-23ARM: gic: consolidate PPI handlingMarc Zyngier
PPI handling is a bit of an odd beast. It uses its own low level handling code and is hardwired to the local timers (hence lacking a registration interface). Instead, switch the low handling to the normal SPI handling code. PPIs are handled by the handle_percpu_devid_irq flow. This also allows the removal of some duplicated code. Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: David Brown <davidb@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2011-10-07ARM: OMAP: ctrl: Fix CONTROL_DSIPHY register fieldsArchit Taneja
Fix the shift and mask macros for DSIx_PPID fields in CONTROL_DSIPHY. The OMAP4430 Public TRM vV has these fields mentioned correctly. Signed-off-by: Archit Taneja <archit@ti.com> Acked-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-09-26ARM: mach-omap2: remove mach/memory.hNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com>
2011-09-26ARM: mach-omap2: clean up debug-macro.SNicolas Pitre
This achieves two goals: 1) Get rid of omap_uart_v2p() and omap_uart_p2v() which were the last users of PLAT_PHYS_OFFSET. 2) Remove the probing of the M bit in the CP15 control reg and make the access to the .data variables completely position independent. There is a catch though: the busyuart macro needs to know where the LSR register is which might be at a different offset depending on the hardware. Given that this macro is given only two registers and that one of them must be preserved, the trick is to always pass the LSR register address around, and deduce the base address for the THR register by masking out the LSR offset in senduart instead. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-09-26ARM: plat-omap: make OMAP_UART_INFO into a relative offsetNicolas Pitre
This is the first step to remove PLAT_PHYS_OFFSET usage from the debug UART code. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-09-26ARM: add an extra temp register to the low level debugging addruart macroNicolas Pitre
Some platforms (like OMAP not to name it) are doing rather complicated hacks just to determine the base UART address to use. Let's give their addruart macro some slack by providing an extra work register which will allow for much needed cleanups. This is basically a no-op as this commit is only adding the extra argument to the macro but no one is using it yet. Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-07-26Merge branch 'next/cross-platform' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'next/cross-platform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: ARM: Consolidate the clkdev header files ARM: set vga memory base at run-time ARM: convert PCI defines to variables ARM: pci: make pcibios_assign_all_busses use pci_has_flag ARM: remove unnecessary mach/hardware.h includes pci: move microblaze and powerpc pci flag functions into asm-generic powerpc: rename ppc_pci_*_flags to pci_*_flags Fix up conflicts in arch/microblaze/include/asm/pci-bridge.h
2011-07-19ARM: Consolidate the clkdev header filesKyungmin Park
Now most of ARM machines has the alsmot same __clk_get/put() macro So place it at the arch/arm/include/asm/clkdev.h and remove the reduntant header files But some machines don't have the same form as above. It can use the machince specific clkdev file by HAVE_MACH_CLKDEV config Now there are only 3 caese. 1) define the clk structure with clkdev macro => Need to move clk structure to proper header file arch/arm/mach-versatile/include/mach/clkdev.h arch/arm/mach-realview/include/mach/clkdev.h arch/arm/mach-vexpress/include/mach/clkdev.h arch/arm/mach-integrator/include/mach/clkdev.h 2) export the __clk_get/put function at clock.c arch/arm/mach-shmobile/include/mach/clkdev.h 3) demuxing the clk source arch/arm/mach-u300/include/mach/clkdev.h Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-06-28ARM: entry: remove unused irq_prio_table macroRussell King
Platforms provide an empty irq_prio_table macro, and as nothing uses this macro, it can simply be removed. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-24Merge branch 'for-paul' of git://gitorious.org/linux-omap-dss2/linuxPaul Mundt
Conflicts: drivers/video/omap2/dss/dsi.c drivers/video/omap2/dss/dss_features.c drivers/video/omap2/dss/dss_features.h Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-11OMAP: DSS2: Move display.h to include/video/Tomi Valkeinen
arch/arm/plat-omap/include/plat/display.h is an include for the OMAP DSS driver. A more logical place for it is in include/video. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-04-04ARM: 6860/1: OMAP4: Move the privately used SMP boot functions to OMAP ↵Santosh Shilimkar
specific header. Header files in arch/arm/*/include/mach included from arch/arm/include/asm/*.h are there to provide necessary definitions for either the rest of the kernel or the ARM specific parts. They shouldn't be polluted with *any* platform private stuff which is not absolutely necessary to satisfy the rest of the kernel. Hence move the OMAP specific SMP boot functions to different header instead of keeping them in 'plat/smp.h' which gets included indirectly by linux/smp.h The patch is outcome of the discussion in below thread: http://www.spinics.net/lists/arm-kernel/msg120363.html Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-17Merge branch 'omap-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 * 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (258 commits) omap: zoom: host should not pull up wl1271's irq line arm: plat-omap: iommu: fix request_mem_region() error path OMAP2+: Common CPU DIE ID reading code reads wrong registers for OMAP4430 omap4: mux: Remove duplicate mux modes omap: iovmm: don't check 'da' to set IOVMF_DA_FIXED flag omap: iovmm: disallow mapping NULL address when IOVMF_DA_ANON is set omap2+: mux: Fix compile when CONFIG_OMAP_MUX is not selected omap4: board-omap4panda: Initialise the serial pads omap3: board-3430sdp: Initialise the serial pads omap4: board-4430sdp: Initialise the serial pads omap2+: mux: Add macro for configuring static with omap_hwmod_mux_init omap2+: mux: Remove the use of IDLE flag omap2+: Add separate list for dynamic pads to mux perf: add OMAP support for the new power events OMAP4: Add IVA OPP enteries. OMAP4: Update Voltage Rail Values for MPU, IVA and CORE OMAP4: Enable 800 MHz and 1 GHz MPU-OPP OMAP3+: OPP: Replace voltage values with Macros OMAP3: wdtimer: Fix CORE idle transition Watchdog: omap_wdt: add fine grain runtime-pm ... Fix up various conflicts in - arch/arm/mach-omap2/board-omap3evm.c - arch/arm/mach-omap2/clock3xxx_data.c - arch/arm/mach-omap2/usb-musb.c - arch/arm/plat-omap/include/plat/usb.h - drivers/usb/musb/musb_core.h
2011-03-10Merge branch 'for_2.6.39/pm-misc' of ↵Tony Lindgren
ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
2011-03-09ARM: omap4: Provide do_wfi() for Thumb-2Dave Martin
For CONFIG_THUMB2_KERNEL, the existing definition of do_wfi() will insert invalid code into the instruction stream. Any assembler which can assemble Thumb-2 is guaranteed to accept the "wfi" mnemonic, so for the Thumb-2 case, just use the mnemonic. The ARM case is left as-is. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-02-17ARM: 6651/1: omap: Fix DEBUG_LL code for p2v changesTony Lindgren
These are needed for CONFIG_ARM_PATCH_PHYS_VIRT to work. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-16TI816X: Add low level debug supportHemant Pedanekar
This patch adds support for low level debugging on TI816X boards. Currently the support for UART3 console on TI816X EVM is added. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-02-16TI816X: Update common OMAP machine specific sourcesHemant Pedanekar
This patch updates the common machine specific source files with support for TI816X. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-01-27omap2+: Fix unused variable warning for omap_irq_baseRussell King
Commit 5d190c40100793a6dfc37bf325677c10f3c80edf (omap2+: Initialize omap_irq_base for entry-macro.S from platform code) simplified the handling of omap_irq_base for multi-omap builds. However, this patch also introduced a build warning for !MULTI_OMAP2 builds: arch/arm/mach-omap2/io.c: In function 'omap_irq_base_init': arch/arm/mach-omap2/io.c:322: warning: unused variable 'omap_irq_base' Fix this by removing the ifdef. Also simplify things further by moving omap_irq_base out of entry-macro.S. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> [tony@atomide.com: updated comments] Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-01-10OMAP3: ZOOM2/3/3630SDP: Add display board file for OMAP3Kishore Y
Board-zoom-display.c added as a common file for display functionality on boards zoom2, zoom3 and 3630sdp. Signed-off-by: Mukund Mittal <mmittal@ti.com> Signed-off-by: Kishore Y <kishore.y@ti.com> Signed-off-by: Rajkumar N <rajkumar.nagarajan@ti.com> Signed-off-by: Samreen <samreen@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2011-01-06Merge branch 'omap-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 * 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (243 commits) omap2: Make OMAP2PLUS select OMAP_DM_TIMER OMAP4: hwmod data: Fix alignment and end of line in structurefields OMAP4: hwmod data: Move the DMA structures OMAP4: hwmod data: Move the smartreflex structures OMAP4: hwmod data: Fix missing SIDLE_SMART_WKUP in smartreflexsysc arm: omap: tusb6010: add name for MUSB IRQ arm: omap: craneboard: Add USB EHCI support omap2+: Initialize serial port for dynamic remuxing for n8x0 omap2+: Add struct omap_board_data and use it for platform level serial init omap2+: Allow hwmod state changes to mux pads based on the state changes omap2+: Add support for hwmod specific muxing of devices omap2+: Add omap_mux_get_by_name OMAP2: PM: fix compile error when !CONFIG_SUSPEND MAINTAINERS: OMAP: hwmod: update hwmod code, data maintainership OMAP4: Smartreflex framework extensions OMAP4: hwmod: Add inital data for smartreflex modules. OMAP4: PM: Program correct init voltages for scalable VDDs OMAP4: Adding voltage driver support OMAP4: Register voltage PMIC parameters with the voltage layer OMAP3: PM: Program correct init voltages for VDD1 and VDD2 ... Fix up trivial conflict in arch/arm/plat-omap/Kconfig
2010-12-14ARM: GIC: private a standard get_irqnr_preamble assembler macroRussell King
Provide a standard get_irqnr_preamble assembler macro for platforms to use, which retrieves the base address of the GIC CPU interface from gic_cpu_base_addr. Allow platforms to override this by defining HAVE_GET_IRQNR_PREAMBLE. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14ARM: GIC: consolidate gic_cpu_base_addr to common GIC codeRussell King
Every architecture using the GIC has a gic_cpu_base_addr pointer for GIC 0 for their entry assembly code to use to decode the cause of the current interrupt. Move this into the common GIC code. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-10omap2+: Initialize omap_irq_base for entry-macro.S from platform codeTony Lindgren
This way we can use the generic omap SoC detection code instead. Signed-off-by: Tony Lindgren <tony@atomide.com>