Age | Commit message (Collapse) | Author |
|
Add clkctrl nodes for CAM domain.
Note that because of the current dts node name dependency for mapping to
clock domain, we must still use "cam-clkctrl@" naming instead of generic
"clock@" naming for the node. And because of this, it's probably best to
apply the dts node addition together along with the other clock changes.
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
omap-for-v5.6/ti-sysc-drop-pdata
|
|
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
This is similar to dra7 and omap4 with different clock naming
and module address.
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Add RNG interconnect data for omap4 similar to what dra7 has. The
clock is OMAP4_CM_L4SEC_RNG_CLKCTRL_OFFSET at offset address 0x01c0,
which matches what dra7 also has with DRA7_L4SEC_CLKCTRL_INDEX(0x1c0).
Note that we need to also add the related l4_secure clock entries.
I've only added RNG, the others can be added as they get tested.
They are probably very similar to what we already have for dra7
in dra7_l4sec_clkctrl_regs[].
With the clock tagged CLKF_SOC_NONSEC, clock is set disabled for secure
devices and clk_get() will fail. Additionally we disable the RNG target
module on droid4 to avoid introducing new boot time warnings.
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
The secure clocks on omap5 are similar to what we already have for dra7
with dra7_l4sec_clkctrl_regs and documented in the omap5432 TRM in
"Table 3-1044. CORE_CM_CORE Registers Mapping Summary".
The secure clocks are part of the l4per clock manager. As the l4per
clock manager has now two clock domains as children, let's also update
the l4per clockdomain node name to follow the "clock" node naming with
a domain specific compatible property.
Compared to omap4, omap5 has more clocks working in hardare autogating
mode.
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
The secure clocks on omap4 are similar to what we already have for dra7
in dra7_l4sec_clkctrl_regs and documented in the omap4460 TRM "Table
3-1346 L4PER_CM2 Registers Mapping Summary".
The secure clocks are part of the l4_per clock manager. As the l4_per
clock manager has now two clock domains as children, let's also update
the l4_per clockdomain node name to follow the "clock" node naming with
a domain specific compatible property.
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Set d0 and d1 pin directions for spi0 and spi1 as per their pinmux.
Signed-off-by: Raag Jadav <raagjadav@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
arm/dt
ARM: dts: zynq: DT changes for v5.6 v2
- Enable coresight topology for Zynq
* tag 'zynq-dt-for-v5.6-v2' of https://github.com/Xilinx/linux-xlnx:
ARM: dts: zynq: enablement of coresight topology
Link: https://lore.kernel.org/r/5db334df-89b5-1d07-3884-93f77b0f4e60@monstr.eu
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
We need the USB fixes in here as well.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
This is similar to what we have for omap5 except the gpu_cm address is
different, the mux clocks have one more source option, and there's no
divider clock.
Note that because of the current dts node name dependency for mapping to
clock domain, we must still use "gpu-clkctrl@" naming instead of generic
"clock@" naming for the node. And because of this, it's probably best to
apply the dts node addition together along with the other clock changes.
For accessing the GPU, we also need to configure the interconnect target
module for GPU similar to what we have for omap5, I'll send that change
separately.
Cc: Benoit Parrot <bparrot@ti.com>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Robert Nelson <robertcnelson@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
|
|
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.
Suggested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt
ASPEED device tree updates for 5.6
- Cleanups for dtc warnings
- Ethernet hardware checksum cleanups. A bug in the driver was fixed so
machines don't need to specify this anymore.
- Misc improvements
* tag 'aspeed-5.6-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed: rainier: Add UCD90320 power sequencer
ARM: dts: aspeed: rainier: Switch PSUs to unknown version
ARM: dts: aspeed: Add SD card for Vesnin
ARM: dts: aspeed: yamp: Delete no-hw-checksum
ARM: dts: aspeed: netbmc: Delete no-hw-checksum
ARM: dts: aspeed: AST2400 disables hw checksum
ARM: dts: ibm-power9-dual: Add a unit address for OCC nodes
ARM: dts: aspeed-g6: Cleanup watchdog unit address
ARM: dts: aspeed-g5: Sort LPC child nodes by unit address
ARM: dts: aspeed: Add reg hints to syscon children
ARM: dts: aspeed: Cleanup lpc-ctrl and snoop regs
ARM: dts: witherspoon: Cleanup gpio-keys-polled properties
ARM: dts: swift: Cleanup gpio-keys-polled properties
ARM: dts: fp5280g2: Cleanup gpio-keys-polled properties
ARM: dts: vesnin: Add unit address for memory node
ARM: dts: aspeed-g5: Use recommended generic node name for SDMC
ARM: dts: aspeed-g5: Move EDAC node to APB
dt-bindings: misc: Document reg for aspeed, p2a-ctrl nodes
dt-bindings: pinctrl: aspeed: Add reg property as a hint
Link: https://lore.kernel.org/r/CACPK8XepSy6D4CNWjSWDDK0p7Dx_rneWne4t4uyy=di5nx3zmA@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 DT for 5.6 #2
- Add sam9x60 dtsi
- New board sam9x60 Evaluation Kit
* tag 'at91-5.6-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sam9x60: add device tree for soc and board
dt-bindings: arm: add sam9x60-ek board
dt-bindings: atmel-gpbr: add microchip,sam9x60-gpbr
dt-bindings: atmel-smc: add microchip,sam9x60-smc
dt-bindings: atmel-sysreg: add microchip,sam9x60-ddramc
dt-bindings: atmel-nand: add microchip,sam9x60-pmecc
dt-bindings: atmel-matrix: add microchip,sam9x60-matrix
dt-bindings: at91-sama5d2_adc: add microchip,sam9x60-adc
dt-bindings: atmel-isi: add microchip,sam9x60-isi
dt-bindings: atmel-can: add microchip,sam9x60-can
dt-bindings: at_xdmac: add microchip,sam9x60-dma
dt-bindings: at_xdmac: remove wildcard
Link: https://lore.kernel.org/r/20200119234707.GA90094@piout.net
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Removal of the simple-panel compatible and some minor
additional cleanups.
* tag 'v5.6-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Kill off "simple-panel" compatibles
ARM: dts: rockchip: rename dwmmc node names to mmc
ARM: dts: rockchip: add reg property to brcmf sub node for rk3188-bqedison2qc
Link: https://lore.kernel.org/r/3473489.DgqFdXXe5V@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
Change Rainier device tree to use UCD90320 chip and only bind driver to
port which excepts PMBus commands.
Signed-off-by: Jim Wright <wrightj@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
|
Rainier can use either version of the IBM CFFPS, so don't set the
version in the devicetree so the driver can detect it automatically.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
|
"simple-panel" is a Linux driver and has never been an accepted upstream
compatible string, so remove it.
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200117230851.25434-1-robh@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
Current dts files with 'dwmmc' nodes are manually verified.
In order to automate this process rockchip-dw-mshc.txt
has to be converted to yaml. In the new setup
rockchip-dw-mshc.yaml will inherit properties from
mmc-controller.yaml and synopsys-dw-mshc-common.yaml.
'dwmmc' will no longer be a valid name for a node,
so change them all to 'mmc'
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200115185244.18149-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoC changes for 5.6,
please pull the following:
- Nicolas unifies the CMA reserved region declaration between all
BCM283x/BCM2711 chips in order for firmwares to easily adjust those
based on the use case needs
- Nicolas adds the Broadcom STB PCIe Root Complex Device Tree node for
the Raspberry Pi 4. The driver will go through the PCIe maintainers
pull request for 5.6.
* tag 'arm-soc/for-5.6/devicetree-part2' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm2711: Enable PCIe controller
ARM: dts: bcm283x: Unify CMA configuration
Link: https://lore.kernel.org/r/20200117222705.25391-2-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
The Denali NAND controller IP has separate reset control for the
controller core and registers.
Add the reset-names, and one more phandle accordingly. This is the
approved DT-binding.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
More dts changes for omaps for v5.6 merge window
Add basic support for first generation Amazon omap3-echo. This got
applied rather late as we discussed how to deal with SoC variants
with some accelerators unaccessible, and eventually ended up setting
up few more SoC specific dtsi files. Eventually we'll need to also
detect the disabled accelerators on driver init, but more patching
is needed for that.
* tag 'omap-for-v5.6/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Add omap3-echo
ARM: dts: Add dtsi files for AM3703, AM3715 and DM3725
Link: https://lore.kernel.org/r/pull-1579200367-372444@atomide.com-4
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
ARM: dts: Amlogic updates for v5.6
- add DDR clock controller
- GPU OPP updates
* tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: use the actual frequency for the GPU's 364MHz OPP
ARM: dts: meson8: use the actual frequency for the GPU's 182.1MHz OPP
ARM: dts: meson8b: fix the clock controller compatible string
ARM: dts: meson8b: add the DDR clock controller
ARM: dts: meson8: add the DDR clock controller
ARM: dts: meson: provide the XTAL clock using a fixed-clock
dt-bindings: clock: meson8b: add the clock inputs
dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding
Link: https://lore.kernel.org/r/7hwo9udi7m.fsf@baylibre.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM dts updates for v5.6
* Add SAW L2 nodes to boot secondary cpus on IPQ40xx
* Fix remaining IRQ_TYPE_NONE on APQ8084
* Update tsens node to new style
* Add modem remoteproc node to MSM8974
* Move ADSP SMD edge into ADSP remoteproc node for MSM8974
* Add and enable wireless communication subsystem on MSM8974 and Fairphone 2
* Add MSM8974 interconnect provider nodes
* Add MSM8974 OCMEM node
* tag 'qcom-dts-for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: Add nodes for SMP boot in IPQ40xx
ARM: dts: qcom: apq8084: Remove all instances of IRQ_TYPE_NONE
ARM: dts: qcom: apq8084: Change tsens definition to new style
ARM: dts: msm8974: Move ADSP smd edge to ADSP PIL
ARM: dts: msm8974: Add modem remoteproc node
ARM: dts: msm8974-FP2: Introduce the wcnss remoteproc node
ARM: dts: msm8974: Introduce the wcnss remoteproc node
ARM: dts: qcom: msm8974: add interconnect nodes
ARM: dts: qcom: msm8974: add ocmem node
Link: https://lore.kernel.org/r/20200113204448.GE3325@yoga
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 DT for 5.6
- Fix sama5d3 peripheral clock rate range
- New boards: Overkiz Smartikz and Kizbox Mini, Microchip SAMA5D27
wlsom1-ek
- sama5d2 sdmcc fixes
* tag 'at91-5.6-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sama5d3: define clock rate range for tcb1
ARM: dts: at91: sama5d3: fix maximum peripheral clock rates
ARM: dts: at91: nattis 2: remove unnecessary include
ARM: dts: at91: add smartkiz support and a common kizboxmini dtsi file
dt-bindings: arm: at91: Document Kizboxmini and Smartkiz boards binding
ARM: dts: at91: rearrange kizbox dts using aliases nodes
ARM: dts: at91: sama5d27_som1_ek: add the microchip,sdcal-inverted on sdmmc0
ARM: dts: at91: Reenable UART TX pull-ups
ARM: dts: at91: sama5d2: set the sdmmc gclk frequency
ARM: dts: at91: sama5d27_som1_ek: add i2c filters properties
ARM: dts: at91: sama5d27_wlsom1: add SAMA5D27 wlsom1 and wlsom1-ek
dt-bindings: ARM: at91: Document SAMA5D27 WLSOM1 and Evaluation Kit
ARM: dts: at91: sama5d2: mark secumod as a GPIO controller
ARM: dts: at91: sama5d2: disable pwm0 by default
Link: https://lore.kernel.org/r/20200113155423.GA1357189@piout.net
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
This is our usual set of DT patches for the Allwinner SoCs.
It's fairly big this time, but the highlights are:
- Enable cpufreq and CPU thermal throttling on the A64
- CLK_CPUX macro usage removed (changed from first pull request)
- CSI0 support on the R40
- CSI1 support on the A10 and A20
- SPI support on the R40
- PMU support on the H3, H5, H6 and R40
- MIPI-DSI support on the A64
- PWM support on the H6
- Thermal sensor on the A64, A83t, H3, H5, H6 and R40
- More DT schemas fixes and conversions
- New boards: LibreComputer ALL-H5-CC H5, LibreComputer ALL-H3-IT H5,
Pine64 H64 Model B, Neutis N5H3
* tag 'sunxi-dt-for-5.6-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (52 commits)
arm64: dts: allwinner: a64: enable DVFS
arm64: dts: allwinner: a64: add dtsi with CPU operating points
arm64: dts: allwinner: a64: add cooling maps and thermal tripping points
arm64: dts: allwinner: a64: add CPU clock to CPU0-3 nodes
arm64: dts: allwinner: sun50i-a64: Use macros for newly exported clocks
ARM: dts: sunxi: Use macros for references to CCU clocks
arm64: dts: allwinner: h5: Add Libre Computer ALL-H5-CC H5 board
ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxes
arm64: dts: allwinner: a64: pinebook: Fix lid wakeup
ARM: dts: sun8i: r40: Add device node for CSI0
ARM: dts: sun7i: Add CSI1 controller and pinmux options
ARM: dts: sun4i: Add CSI1 controller and pinmux options
ARM: dts: sunxi: Add missing LVDS resets and clocks
ARM: dts: sun8i: r40: Use tcon top clock index macros
ARM: dts: sun8i: R40: Add PMU node
ARM: dts: sun8i: R40: Upgrade GICC reg size to 8K
arm64: dts: allwinner: h6: Add thermal sensor and thermal zones
ARM: dts: sunxi: Add Libre Computer ALL-H3-IT H5 board
arm64: dts: allwinner: a64: Add MIPI DSI pipeline
arm64: dts: allwinner: a64: Add thermal sensors and thermal zones
...
Link: https://lore.kernel.org/r/20200113095555.GA29848@wens.csie.org
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree update for 5.6:
- New board support: i.MX6SL based Tolino Shine 3 eBook reader,
i.MX7ULP Embedded Artists COM Board, i.MX6Q/DL based Gateworks
Ventana Boards.
- A couple of series from Andrey Smirnov to enhance i.MX6 RDU2 and
VF610 ZII boards.
- Add revision in board compatible string for imx6sx-sdb-reva and
imx7d-sdb-reva board.
- A fixup on imx6sl-tolino-shine3 board to remove incorrect power
supply assignment.
- Set initial buck regulator modes explicitly for phycore-imx6 board,
so that a wrong initial mode set by bootloader does not interfere.
- Add Add LCD support for imx7d-pico board.
- A couple of patches from Michael Grzeschik to enhance USB Host
support on i.MX25.
- A couple of patches from Michael Trimarchi to remove duplicate
Ethernet PHY reset properties on imx6qdl-icore and switch to
phy-handle.
- A couple of changes to add extirq node support on LS1021A SoC and
make use of it on the LS1021A-TSN board.
- A few random device additions and improvements on various boards.
* tag 'imx-dt-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (33 commits)
ARM: dts: imx: Add GW5912 board support
ARM: dts: imx: Add GW5913 board support
ARM: dts: imx: Add GW5910 board support
ARM: dts: imx: Add GW5907 board support
ARM: dts: imx6ul-14x14-evk: Pass the "broken-cd" property
ARM: dts: imx6sl-tolino-shine3: Remove incorrect power supply assignment
ARM: dts: imx7d-pico: Add LCD support
ARM: dts: imx6qdl-icore: Add fec phy-handle
ARM: dts: imx6qdl-icore-1.5: Remove duplicate phy reset methods
ARM: dts: imx7: Unify temp-grade and speed-grade nodes
ARM: dts: imx6: phycore-som: add pmic onkey device
ARM: dts: imx51-babbage: Fix the DVI output description
ARM: dts: imx6qdl-apalis: mux HDMI CEC pin
ARM: dts: imx6sll: add PXP module
ARM: dts: colibri-imx6ull: correct wrong pinmuxing and add comments
ARM: dts: vf610-zii-scu4-aib: Add node for switch watchdog
ARM: dts: vf610-zii-scu4-aib: Use generic names for DT nodes
ARM: dts: vf610-zii-dev-rev-b: Drop redundant I2C properties
ARM: dts: phycore-imx6: set buck regulator modes explicitly
ARM: dts: imx6: rdu2: Limit USBH1 to Full Speed
...
Link: https://lore.kernel.org/r/20200113034006.17430-4-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
mvebu dt for 5.6 (part 1)
- Add support for SolidRun Clearfog GTR (Armada 385 based board)
- Move i2c0 to the SoliRrun Microsom dtsi (Armada 38x based)
- Add EEPROM node on SoliRrun Microsom (rev 2.1)
- Add EEPROM node on SoliRrun ClearFog Pro
* tag 'mvebu-dt-5.6-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada-388-clearfog: add eeprom
ARM: dts: armada-38x-solidrun-microsom: add eeprom
ARM: armada-38x-solidrun-microsom: move i2c0 to SOM DT
ARM: dts: mvebu: add support for SolidRun Clearfog GTR
Link: https://lore.kernel.org/r/874kx13nvh.fsf@FE-laptop
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.6-rc1
This adds memory timings for the PAZ100 and does some minor cleanup for
the external memory controller device tree node on Tegra124.
* tag 'tegra-for-5.6-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: dts: tegra20: paz00: Add memory timings
ARM: tegra: Rename EMC on Tegra124
ARM: tegra: Let the EMC hardware use the EMC clock
Link: https://lore.kernel.org/r/20200111003553.2411874-6-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
Add device tree files for SAM9X60 SoC and SAM9X60-EK board.
Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/1579085987-13976-6-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
|
|
This enables bcm2711's PCIe bus, which is hardwired to a VIA
Technologies XHCI USB 3.0 controller.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
|
|
With the introduction of the Raspberry Pi 4 we were forced to explicitly
configure CMA's location, since arm64 defaults it into the ZONE_DMA32
memory area, which is not good enough to perform DMA operations on that
device. To bypass this limitation a dedicated CMA DT node was created,
explicitly indicating the acceptable memory range and size.
That said, compatibility between boards is a must on the Raspberry Pi
ecosystem so this creates a common CMA DT node so as for DT overlays to
be able to update CMA's properties regardless of the board being used.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Phil Elwell <phil@raspberrypi.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
|
|
This is the first generation Amazon Echo from 2016.
Audio support is not yet implemented.
Signed-off-by: André Hentschel <nerv@dawncrow.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
DM3730 is considered as omap36xx.dtsi, while the rest has:
DM3730 | DM3725 | AM3715 | AM3703
IVA X | X | |
SGX X | | X |
Where X is "supported"
Signed-off-by: André Hentschel <nerv@dawncrow.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
BeagleBone Black series is equipped with 512MB RAM
whereas only 256MB is included from am335x-bone-common.dtsi
This leads to an issue with unusual setups when devicetree
is loaded by GRUB2 directly.
Signed-off-by: Matwey V. Kornilov <matwey@sai.msu.ru>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
An experimental test with the command below gives this error:
rk3188-bqedison2qc.dt.yaml: dwmmc@10218000: wifi@1:
'reg' is a required property
So fix this by adding a reg property to the brcmf sub node.
Also add #address-cells and #size-cells to prevent more warnings.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200110134420.11280-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
The Gateworks GW5912 is an IMX6 SoC based single board computer with:
- IMX6Q or IMX6DL
- 32bit DDR3 DRAM
- GbE RJ45 front-panel
- 4x miniPCIe socket with PCI Gen2, USB2
- 1x miniPCIe socket with PCI Gen2, USB2, mSATA
- 1x miniPCIe socket with PCI Gen2, USB2, mezzanine
- 10V to 60V DC input barrel jack
- 3axis accelerometer (lis2de12)
- GPS (ublox ZOE-M8Q)
- bi-color front-panel LED
- 256MB NAND boot device
- nanoSIM/microSD socket (with UHS-I support)
- user pushbutton
- Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
- CAN Bus transceiver (mcp2562)
- RS232 transceiver (1x UART with flow-control or 2x UART (build option)
- off-board SPI connector (1x chip-select)
Signed-off-by: Robert Jones <rjones@gateworks.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
The Gateworks GW5913 is an IMX6 SoC based single board computer with:
- IMX6Q or IMX6DL
- 32bit DDR3 DRAM
- FEC GbE RJ45 front-panel
- 1x miniPCIe socket with PCI Gen2, USB2
- 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM
- 6V to 60V DC input connector
- GPS (ublox ZOE-M8Q)
- bi-color front-panel LED
- 256MB NAND boot device
- nanoSIM socket
- user pushbutton
- Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
Signed-off-by: Robert Jones <rjones@gateworks.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
The Gateworks GW5910 is an IMX6 SoC based single board computer with:
- IMX6Q or IMX6DL
- 32bit DDR3 DRAM
- FEC GbE RJ45 front-panel
- 1x miniPCIe socket with PCI Gen2, USB2
- 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM
- 5V to 60V DC input barrel jack
- 3axis accelerometer (lis2de12)
- GPS (ublox ZOE-M8Q)
- bi-color front-panel LED
- 256MB NAND boot device
- microSD socket (with UHS-I support)
- user pushbutton
- Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
- Dual-Band Wireless MCU (CC1352, UART/I2S interrconnect to IMX6)
- WiFi/Bluetooth/BLE module (Sterling-LSW, SDIO/UART interconnect to IMX6)
- RS232 transceiver (1x UART with flow-control or 2x UART (build option)
- off-board SPI connector (1x chip-select)
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Robert Jones <rjones@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
The Gateworks GW5907 is an IMX6 SoC based single board computer with:
- IMX6Q or IMX6DL
- 32bit DDR3 DRAM
- FEC GbE Phy
- bi-color front-panel LED
- 256MB NAND boot device
- Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
- Digital IO expander (pca9555)
- Joystick 12bit adc (ads1015)
Signed-off-by: Robert Jones <rjones@gateworks.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.6
1. Couple ARM and wcore bus regulators on Exynos542x so higher
frequencies could be used with dynamic voltage and frequency scaling.
Enable this higher frequencies.
2. Correct the polarity of USB3503 hub GPIOs.
3. Adjust the bus frequencies (scaled with devfreq framework) on
Exynos5422 Odroid boards to match values possible to obtain from root
PLLs.
4. Add display to Tiny4412 board.
5. Cleanups and minor improvements.
* tag 'samsung-dt-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Enable FIMD node and add proper panel node to Tiny4412
ARM: dts: samsung: Rename Samsung and Exynos to lowercase
ARM: dts: exynos: Adjust bus related OPPs to the values correct for Exynos5422 Odroids
ARM: dts: exynos: Move Exynos5420 bus related OPPs to the Odroid boards DTS
ARM: dts: exynos: Correct USB3503 GPIOs polarity
ARM: dts: exynos: Add missing CPU frequencies for Exynos5422/5800
ARM: dts: exynos: Add initial data for coupled regulators for Exynos5422/5800
ARM: dts: exynos: Remove syscon compatible from chipid node on Exynos5
Link: https://lore.kernel.org/r/20200110172334.4767-3-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
New boards are the Radxa Rock Pi N10 using the VMARC SOM and Dalang
carrier board, separate versions for the two rockpro64 hardware revisions
which switched a pin between revisions. The rockpro64 also got
bluetooth support now.
The px30 got a lot of attention with dsi, gpu and thermal support.
Similarly the rk3399-roc-pc board also got attention with mtd flash,
sdr104 mode, hdmi sound, gpu and a lot of other smaller improvements.
Other than that there is a new gpu-cooling device for rk3399 a cpu
idle-state for rk3328 and more small improvements across a number
of boards.
* tag 'v5.6-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (37 commits)
arm64: dts: rockchip: Enable mp8859 regulator on rk3399-roc-pc
arm64: dts: rockchip: rk3399-hugsun-x99: remove supports-sd and supports-emmc options
arm64: dts: rockchip: rk3399-firefly: remove num-slots from &sdio0 node
arm64: dts: rockchip: Add PX30 LVDS
arm64: dts: rockchip: add dsi controller for px30
arm64: dts: rockchip: Add PX30 DSI DPHY
arm64: dts: rockchip: Add RK3328 idle state
arm64: dts: rockchip: remove identical &uart0 node from rk3368-lion-haikou
arm64: dts: rockchip: Add Radxa Rock Pi N10 initial support
ARM: dts: rockchip: Add Radxa Dalang Carrier board
arm64: dts: rockchip: Add VMARC RK3399Pro SOM initial support
dt-bindings: arm: rockchip: Add Rock Pi N10 binding
arm64: dts: rockchip: hook up bluetooth at uart0 on rockpro64
arm64: dts: rockchip: enable wifi module at sdio0 on rockpro64
arm64: dts: rockchip: split rk3399-rockpro64 for v2 and v2.1 boards
arm64: dts: rockchip: enable the gpu on px30-evb
arm64: dts: rockchip: add the gpu for px30
dt-bindings: gpu: mali-bifrost: Add Rockchip PX30
arm64: dts: rockchip: Add GPU cooling device for RK3399
arm64: dts: rockchip: Add regulators for PCIe for Radxa Rock Pi 4 board
...
Link: https://lore.kernel.org/r/5115625.yBEeHQkg2z@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Pin-name corrections for Veyron-Fievel, bluetooth for a number of veyron boards and
additional operating points for rk3288-tinker.
* tag 'v5.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Use ABI name for recovery mode pin on veyron fievel/tiger
ARM: dts: rockchip: Use ABI name for write protect pin on veyron fievel/tiger
ARM: dts: rockchip: Add missing cpu operating points for rk3288-tinker
ARM: dts: rockchip: Add brcm bluetooth for rk3288-veyron
Link: https://lore.kernel.org/r/8215452.dU6eVM2tAM@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.6, round 1
Highlights:
----------
MPU part:
-Add PWM support on DK2 board.
-Add counter support to STM32 timers.
-Add support of SDMMC 2&3 instances based on "arm,pl18x". SDMMC2 is
connected to eMMC on ED1 board. SDMMC3 is connected to the GPIO
extension connector on EV1 & DKx boards.
-Add ADC support on ED1 board.
-Update devicetree files split to better fit to STM32MP15 SOC & boards
diversity.
-Fix issues seen during YAML validation.
-Enable Ethernet (MAC) TX clock gating during low-power mode.
-Enable USB OTG HS support on DKx boards.
-Enable USB Host EHCI on DKx boards.
MCU part:
-Fix issues seen during YAML validation.
* tag 'stm32-dt-for-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (37 commits)
ARM: dts: stm32: Add power-supply for RGB panel on stm32429i-eval
ARM: dts: stm32: Add power-supply for DSI panel on stm32f469-disco
ARM: dts: stm32: change nvmem node name on stm32mp1
ARM: dts: stm32: change nvmem node name on stm32f429
ARM: dts: stm32: update mlahb node according to the bindings on stm32mp15
ARM: dts: stm32: fix dma controller node name on stm32mp157c
ARM: dts: stm32: fix dma controller node name on stm32f743
ARM: dts: stm32: fix dma controller node name on stm32f746
ARM: dts: stm32: add phy-names to usbotg_hs on stm32mp157c-ev1
ARM: dts: stm32: enable USB OTG HS on stm32mp15 DKx boards
ARM: dts: stm32: enable USB Host (USBH) EHCI controller on stm32mp15 DKx
ARM: dts: stm32: enable USBPHYC on stm32mp15 DKx boards
ARM: dts: stm32: remove useless clock-names from RTC node on stm32f746
ARM: dts: stm32: remove useless clock-names from RTC node on stm32f429
ARM: dts: stm32: Enable MAC TX clock gating during TX low-power mode on stm32mp15
ARM: dts: stm32: adjust slew rate for Ethernet on stm32mp15
ARM: dts: stm32: remove syscfg clock on stm32mp15 ethernet
ARM: dts: stm32: remove "@" and "_" from stm32f7 pinmux groups
ARM: dts: stm32: remove "@" and "_" from stm32f4 pinmux groups
ARM: dts: stm32: Adapt STM32MP157C ED1 board to STM32 DT diversity
...
Link: https://lore.kernel.org/r/39df1dee-3c9f-cd35-bc55-a71223e07100@st.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.6, please pull the following:
- Stephan adds support for the HWRNG on 2711 (Raspberry Pi 4) which is
different than the previous Pi chips
- Florian switches the BCM956265HR board to use the hardware I2C
controllers for interfacing with the SFPs
* tag 'arm-soc/for-5.6/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm2711: Enable HWRNG support
ARM: dts: bcm2835: Move rng definition to common location
ARM: dts: NSP: Use hardware I2C for BCM958625HR
Link: https://lore.kernel.org/r/20200108191114.15987-1-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|