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2015-05-13ARM: STi: STiH407: Add DT nodes for for PWMLee Jones
Supply top level nodes for the STiH407 based development boards. The Pinctrl configuration has already been applied, so the only missing piece of the DT puzzle is for a board's DTB to enable the nodes. Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-01-16ARM: DT: STiH407: Add DRM dt nodesGabriel FERNANDEZ
This patch adds the DRM/KMS dt nodes. This node can't be in stih407-family.dtsi file because in the future we will integrate a new stih418-b2199 board. It's a stih407 family board with different drm/kms dt nodes. That is why i created the stih407.dtsi file. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Acked-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-11-18ARM: STi: DT: STih407: Abstract common dt nodes into shared files.Peter Griffin
The stih410 soc which will be added in the following commit is very similar to the stih407, to enable maximum re-use of the dt files this commit abstracts the common parts into a shared dt file stihxxx-b2120 for the board, and also a shared file stih407-family.dtsi for the SoC. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: STi: DT: STiH407: 407 DT Entry for clockgen C0Gabriel FERNANDEZ
Patch adds DT entries for clockgen C0 Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Olivier Bideau <olivier.bideau@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: sti: Add STiH407 reset controller support.Peter Griffin
This patch adds the reset controller DT nodes for the powerdown, softreset and picophy controllers. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-05-21ARM: dts: Add STiH407 SoC supportMaxime Coquelin
The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU. Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>