| Age | Commit message (Collapse) | Author |
|---|
|
For some new boards with hip07 chipset we are required to set PHY config
registers differently. The hw property which determines how to set these
registers is in the PHY signal attenuation readings.
This patch add an devicetree property, "hisilicon,signal-attenuation", which
is used to describe the signal attenuation of an board.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
|
|
Add directly attached disk LED feature for v2 hw.
Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
|
|
Pretty much any node can have a status property, so it doesn't need to
be in examples.
Converted with the following command and removed examples with SoC and
board specific splits:
git grep -l -E 'status.*=.*' Documentation/devicetree/ | xargs sed -i -E '/\sstatus.*=.*"(disabled|ok|okay)/d'
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
|
|
Add support for hip07 chipset to hisi_sas controller.
Chipset hip07 has v2 hw.
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
|
|
Add the dt bindings for HiSi SAS controller v2 HW.
The main difference in the controller from dt perspective is
interrupts. The v2 controller does not have dedicated fatal and
broadcast interrupts - they are multiplexed on the channel interrupt.
Each SAS v2 controller can issue upto 64 commands (or connection
requests) on the system bus without waiting for a response - this is
know as am-max-transmissions. In hip06, sas controller #1 has a
limitation that it has to limit am-max-transmissions to 32 - this
limitation is due to chip system bus design. It is not anticipated that
any future chip incorporating v2 controller will have such a limitation.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
|
|
Add devicetree bindings for HiSilicon SAS driver.
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
|
