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2017-09-26drm/amdgpu: Correct bytes limit for SDMA 3.0 copy and fillYong Zhao
Signed-off-by: Yong Zhao <yong.zhao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu: use 2MB fragment size for GFX6,7 and 8Christian König
Use 2MB fragment size by default for older hardware generations as well. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: John Bridgman <john.bridgman@amd.com> Reviewed-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu: Fix driver reloading failureXiangliang.Yu
SRIOV doesn't implement PMC capability of PCIe, so it can't update power state by reading PMC register. Currently, amdgpu driver doesn't disable pci device when removing driver, the enable_cnt of pci device will not be decrease to 0. When reloading driver, pci_enable_device will do nothing as enable_cnt is not zero. And power state will not be updated as PMC is not support. So current_state of pci device is not D0 state and pci_enable_msi return fail. Add pci_disable_device when remmoving driver to fix the issue. Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd/powerplay: refine phm_register_thermal_interrupt interfaceRex Zhu
currently, not all asics implement this callback function so not return error to avoid powerplay initialize failed in those asices Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd/amdgpu: add vega10/raven mmhub/athub golden settingsEvan Quan
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd/powerplay: change alert temperature rangeEric Huang
Change to more meaningful range that triggers thermal interrupts. Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd/powerplay: implement register thermal interrupt for Vega10Eric Huang
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd/powerplay: add register thermal interrupt in hwmgr_hw_initEric Huang
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu: add cgs query info of pci bus devfnEric Huang
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd/amdgpu: Partial revert of iova debugfsTom St Denis
We discovered that on some devices even with iommu enabled you can access all of system memory through the iommu translation. Therefore, we revert the read method to the translation only service and drop the write method completely. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christan König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd/amgpu: update vega10 sdma golden settingEvan Quan
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd/amgpu: update raven sdma golden settingEvan Quan
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu/sriov:fix memory leak after gpu resetMonk Liu
GPU reset will require all hw doing hw_init thus ucode_init_bo will be invoked again, which lead to memory leak skip the fw_buf allocation during sriov gpu reset to avoid memory leak. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu:make ctx_add_fence interruptible(v2)Monk Liu
otherwise a gpu hang will make application couldn't be killed under timedout=0 mode v2: Fix memoryleak job/job->s_fence issue unlock mn remove the ERROR msg after waiting being interrupted Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu/sriov:init csb for gfxv9Monk Liu
RLC need CSB registers initiated under SRIOV during world switch otherwise the clear state buffer behav will not be recovered to current VF scheme after switch back Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu/sriov:increate mailbox polling timeoutHorace Chen
increase timeout to 12 seconds,because there may have multiple FLR waiting for done, the waiting time of events may be long, increase to 12s to reduce timeout failure. Signed-off-by: Horace Chen <horace.chen@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu/sriov:fix page fault issue of driver unloadMonk Liu
bo_free on csa is too late to put in amdgpu_fini because that time ttm is already finished, Move it earlier to avoid the page fault. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Horace Chen <horace.chen@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu:use formal register to trigger hdp invalidateMonk Liu
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu:hdp flush should be put it initializedMonk Liu
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu:insert TMZ_BEGINMonk Liu
FRAME_CONTROL(begin) is needed for vega10 due to ucode logic change, it can fix some CTS random fail under gfx preemption enabled mode. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu/sriov:don't load psp fw during gpu resetMonk Liu
At least for SRIOV we found reload PSP fw during gpu reset cause PSP hang. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu/sriov:move in_reset to adev and renameMonk Liu
currently in_reset is only used in sriov gpu reset, and it will be used for other non-gfx hw component later, like PSP, so move it from gfx to adev and rename to in_sriov_reset make more sense. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu:no kiq in IHMonk Liu
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu/sriov:fix missing error handlingMonk Liu
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu: Add GPU reset functionality for Vega10Ken Wang
V2 Signed-off-by: Ken Wang <Ken.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/ttm: Remove TTM dma tracepoint since it's not required anymoreTom St Denis
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd/amdgpu: remove usage of ttm traceTom St Denis
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd/amdgpu: add support for iova_to_phys to replace TTM trace (v5)Tom St Denis
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (v2): Add domain to iova debugfs (v3): Add true read/write methods to access system memory of pages mapped to the device (v4): Move get_domain call out of loop and return on error (v5): Just use kmap/kunmap
2017-09-26drm/amd/amdgpu: Fold TTM debugfs entries into array (v2)Tom St Denis
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (v2): add domains and avoid strcmp
2017-09-26drm/amdgpu: fix checkpatch.pl warning to amdgpu_drv.cRex Zhu
fix checkpatch.pl WARNING: Prefer 'unsigned int' to bare use of 'unsigned' Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu: remove the clearance of vce 4.0 interrupt maskLeo Liu
Requested by SRIOV, the clearance of the bit moved into firmware Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu/sdma3: set wptr shadow atomicallyXiangliang.Yu
Port it from sdma4 for wptr polling usage. Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu/sdma3: Enable sdma wptr polling for SRIOVXiangliang.Yu
When hypervisor triggering FLR for one of VFs, need to enable sdma wptr polling to avoid missing wptr update if enabling doorbell. Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/ttm: cleanup ttm_page_alloc_dma.cChristian König
Remove unused defines and variables. Also stop computing the gfp_flags when they aren't used. No intended functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu: Track pending retry faults in IH and VM (v2)Felix Kuehling
IH tracks pending retry faults in a hash table for fast lookup in interrupt context. Each VM has a short FIFO of pending VM faults for processing in a bottom half. The IH prescreening stage adds retry faults and filters out repeated retry interrupts to minimize the impact of interrupt storms. It's the VM's responsibility remove pending faults once they are handled. For now this is only done when the VM is destroyed. v2: - Made the hash table smaller and the FIFO longer. I never want the FIFO to fill up, because that would make prescreen take longer. 128 pending page faults should be enough to keep migrations busy. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Christian König <christian.koenig@amd.com> (v1) Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd: Closed hash table with low overhead (v2)Felix Kuehling
This adds a statically sized closed hash table implementation with low memory and CPU overhead. The API is inspired by kfifo. Storing, retrieving and deleting data does not involve any dynamic memory management, which makes it ideal for use in interrupt context. Static memory usage per entry comprises a 32 or 64 bit hash key, two bits for occupancy tracking and the value size stored in the table. No list heads or pointers are needed. Therefore this data structure should be quite cache-friendly, too. It uses linear probing and lazy deletion. During lookups free space is reclaimed and entries relocated to speed up future lookups. v2: squash in do_div and _BITOPS_LONG_SHIFT fixes Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu: Add prescreening stage in IH processing (v2)Felix Kuehling
To filter out high-frequency interrupts that can be safely ignored. v2: squash in trivial typo fix for si (Alex) Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdkfd: Use PASID manager from KGDFelix Kuehling
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdkfd: Separate doorbell allocation from PASIDFelix Kuehling
PASID management is moving into KGD. Limiting the PASID range to the number of doorbell pages is no longer practical. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/radeon: Add PASID manager for KFDFelix Kuehling
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu: Add PASID managementFelix Kuehling
Allows assigning a PASID to a VM for identifying VMs involved in page faults. The global PASID manager is also exported in the KFD interface so that AMDGPU and KFD can share the PASID space. PASIDs of different sizes can be requested. On APUs, the PASID size is deterined by the capabilities of the IOMMU. So KFD must be able to allocate PASIDs in a smaller range. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu: Fix error handling in amdgpu_vm_initFelix Kuehling
Make sure vm->root.bo is not left reserved if amdgpu_bo_kmap fails. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd/powerplay: Simplify smu7_voting_clients()Rex Zhu
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amdgpu: add powerplay support for CI asicsRex Zhu
currently, for CI asics, use dpm by default, amdgpu.dpm=-1. when set amdgpu.dpm=1, enable powplay. when set amdgpu.dpm=0, disable both dpm and powerplay. when powerplay is stable on CI asics, ci_dpm will be removed. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd/powerplay: Add support for CI asics to hwmgrRex Zhu
Add support for CI asics (Bonaire, Hawaii) to the powerplay hwmgr Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd/powerplay: Add support functions for CI to ppatomctrl.cRex Zhu
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd/powerplay: refine dmesg info under powerplayRex Zhu
Use pr_debug to prevent spamming unimportant dmesg. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd/powerplay: fix set target TDP error on tonga/icelandRex Zhu
ConfigurableTDP do not exist from Fiji. so only use in previous ASIC. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/amd/powerplay: add CI asics support to smumgr (v3)Rex Zhu
This ports support for CI asics (Bonaire, Hawaii) to the powerplay smumgr v2: warning fix (Alex) v3: squash in fix for thermal (Tom) Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26drm/i915: Compact device info access by a small re-orderingTvrtko Ursulin
More effort to align members on 4-byte boundary helps with code size a tiny bit: text data bss dec hex filename -1460454 60014 3656 1524124 17419c drivers/gpu/drm/i915/i915.ko +1460254 60014 3656 1523924 1740d4 drivers/gpu/drm/i915/i915.ko Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170920092701.17963-3-tvrtko.ursulin@linux.intel.com
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-24 05:32:48 +0000