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2014-01-22drm/i915: Fix disabled semaphoresBen Widawsky
The ring will emit too many if semaphores are disabled since we do not add the correct number to num_dwords anymore. This was introduced: commit 52ed23253b68e1cf154b03d91bed619504cf955b Author: Ben Widawsky <benjamin.widawsky@intel.com> Date: Mon Dec 16 20:50:38 2013 -0800 drm/i915: Don't emit mbox updates without semaphores FWIW, the bug was fixed later in the series. /me hangs head in shame. Daniel: Also note that we should have merged the read-only semaphore modparam before this patch. Reported-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-22drm/i915: Clarify relocation errnosBen Widawsky
While trying to find a random -EINVAL from a failing test, I noticed we had a few hard to follow return values. The first two hunks in this patch replace completely useless initialization of ret. The last several hunks help to distinguish between altering 'return ret' and 'return <ERROR>' Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-22drm/i915: Spelling s/auxilliary/auxiliary/Geert Uytterhoeven
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-22Merge branch 'drm-vbl-timestamp' of git://gitorious.org/vsyrjala/linux into ↵Dave Airlie
drm-next Here's the vblank timestamp pull request you wanted. I addressed the few bugs that Mario pointed out and added the r-bs. As it has been a while since I made the changes, I gave it a quick spin on a few different i915 machines. Fortunately everything still seems to be fine. * 'drm-vbl-timestamp' of git://gitorious.org/vsyrjala/linux: drm/i915: Add a kludge for DSL incrementing too late and ISR not working drm/radeon: Move the early vblank IRQ fixup to radeon_get_crtc_scanoutpos() drm: Pass 'flags' from the caller to .get_scanout_position() drm: Fix vblank timestamping constants for interlaced modes drm/i915: Fix scanoutpos calculations for interlaced modes drm: Change {pixel,line,frame}dur_ns from s64 to int drm: Use crtc_clock in drm_calc_timestamping_constants() drm/radeon: Populate crtc_clock in radeon_atom_get_tv_timings() drm: Simplify the math in drm_calc_timestamping_constants() drm: Improve drm_calc_timestamping_constants() documentation drm/i915: Call drm_calc_timestamping_constants() earlier drm/i915: Kill hwmode save/restore drm: Pass the display mode to drm_calc_vbltimestamp_from_scanoutpos() drm: Pass the display mode to drm_calc_timestamping_constants()
2014-01-22Merge branch 'topic/core-stuff' of ↵Dave Airlie
git://people.freedesktop.org/~danvet/drm-intel into drm-next Some straggling drm core patches * 'topic/core-stuff' of git://people.freedesktop.org/~danvet/drm-intel: drm/gem: Always initialize the gem object in object_init drm/edid: Populate picture aspect ratio for CEA modes drm/edid: parse the list of additional 3D modes drm/edid: split VIC display mode lookup into a separate function drm: Make the connector mode_valid() vfunc return a drm_mode_status enum
2014-01-22Merge branch 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux ↵Dave Airlie
into drm-next Just a single fix for sparse/smatch warnings introduced by the previous vmwgfx-next pull. * 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux: drm/vmwgfx: Fix recently introduced sparse / smatch warnings and errors
2014-01-21drm/vmwgfx: Fix recently introduced sparse / smatch warnings and errorsThomas Hellstrom
Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Jakob Bornecrant <jakob@vmware.com>
2014-01-21drm/gem: Always initialize the gem object in object_initDaniel Vetter
At least drm/i915 expects that the obj->dev pointer is set even in failure paths. Specifically when the shmem initialization fails we call i915_gem_object_free which needs to deref obj->base.dev to get at the slab pointer in the device private structure. And the shmem allocation can easily fail when userspace is hitting open file limits. Doing the structure init even when the shmem file allocation fails prevents this Oops. This is a regression from commit 89c8233f82d9c8af5b20e72e4a185a38a7d3c50b Author: David Herrmann <dh.herrmann@gmail.com> Date: Thu Jul 11 11:56:32 2013 +0200 drm/gem: simplify object initialization v2: Add regression note which Chris supplied. Testcase: igt/gem_fd_exhaustion Reported-and-Suggested-by: Linus Torvalds <torvalds@linux-foundation.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> References: http://lists.freedesktop.org/archives/intel-gfx/2014-January/038433.html Cc: stable@vger.kernel.org Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Cc: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-21Merge branch 'drm-next-3.14' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie
into drm-next New tree with the INFO ioctl merge fixed up. This also adds a couple of additional minor fixes. A few more changes for 3.14, mostly just bug fixes. Note that: drm/radeon: add query to fetch the max engine clock. will conflict with 3.13 final, but the fix is pretty obvious. * 'drm-next-3.14' of git://people.freedesktop.org/~agd5f/linux: (22 commits) drm/radeon: add UVD support for OLAND drm/radeon: fix minor typos in si_dpm.c drm/radeon: set the full cache bit for fences on r7xx+ drm/radeon: fix surface sync in fence on cayman (v2) drm/radeon/dpm: disable mclk switching on desktop RV770 drm/radeon: fix endian handling in radeon_atom_init_mc_reg_table drm/radeon: write gfx pg bases even when gfx pg is disabled drm/radeon: bail early from enable ss in certain cases drm/radeon: handle ss percentage divider properly drm/radeon: add query to fetch the max engine clock (v2) drm/radeon/dp: sleep after powering up the display drm/radeon/dp: use usleep_range rather than udelay drm/radeon/dp: bump i2c-over-aux retries to 7 drm/radeon: disable ss on DP for DCE3.x drm/radeon/cik: use hw defaults for TC_CFG registers drm/radeon: disable dpm on BTC drm/radeon/cik: use WAIT_REG_MEM special op for CP HDP flush drm/radeon/cik: use POLL_REG_MEM special op for sDMA HDP flush drm/radeon: consolidate sdma hdp flushing code for CIK drm/radeon: consolidate cp hdp flushing code for CIK ...
2014-01-20drm/radeon: add UVD support for OLANDAlex Deucher
It seems this got dropped when we merged UVD support last year. Add this back now. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-01-20drm/radeon: fix minor typos in si_dpm.cAlex Deucher
Copy/paste typos from the ni code. Should not have any functional change. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-20drm/radeon: set the full cache bit for fences on r7xx+Alex Deucher
Needed to properly flush the read caches for fences. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-01-20drm/radeon: fix surface sync in fence on cayman (v2)Alex Deucher
We need to set the engine bit to select the ME and also set the full cache bit. Should help stability on TN and cayman. V2: fix up surface sync in ib execute as well Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-01-20drm/radeon/dpm: disable mclk switching on desktop RV770Alex Deucher
Mclk switching doesn't seem to work reliably on these cards. Most RV770 boards specify the same mclk for all performance levels anyway so in most cases, this has no affect. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=73067 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-01-20drm/radeon: fix endian handling in radeon_atom_init_mc_reg_tableAlex Deucher
Need to swap the data for big endian. Notcied by sylware in IRC. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-20drm/radeon: write gfx pg bases even when gfx pg is disabledAlex Deucher
For consistency. These buffers aren't used when pg is disabled. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-20drm/radeon: bail early from enable ss in certain casesAlex Deucher
If the ss percentage is 0 or we are using external ss, just bail when enabling ss. We disable it explicitly earlier in the modeset already. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-20drm/radeon: handle ss percentage divider properlyAlex Deucher
It's either 100 or 1000 depending on the flags in the table. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-20drm/radeon: add query to fetch the max engine clock (v2)Alex Deucher
This is needed for reporting the max GPU engine clock in OpenCL. This just reports the max possible engine clock, it does not take into account current conditions that may limit that clock. v2: fix query number for merge with 3.13 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-20drm/edid: Populate picture aspect ratio for CEA modesVandana Kannan
Adding picture aspect ratio for CEA modes based on CEA-861D Table 3 or CEA-861E Table 4. This is useful for filling up the detail in AVI infoframe. v2: Ville's review comments incorporated Added picture aspect ratio as part of edid_cea_modes instead of DRM_MODE Signed-off-by: Vandana Kannan <vandana.kannan@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-20drm/radeon/dp: sleep after powering up the displayAlex Deucher
According to the DP 1.1 spec, the sink must power up within 1ms. Noticed while reviewing Thierry's drm/dp patches. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-20drm/radeon/dp: use usleep_range rather than udelayAlex Deucher
Based on common dp code proposed by Thierry Reding. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-20drm/radeon/dp: bump i2c-over-aux retries to 7Alex Deucher
As per the DP1.2 spec. Noticed while reviewing Thierry's drm/dp patches. Also bump native aux retries to 7 for consistency. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-20drm/radeon: disable ss on DP for DCE3.xAlex Deucher
Seems to cause problems with certain DP monitors. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=40699 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-01-20drm/radeon/cik: use hw defaults for TC_CFG registersAlex Deucher
Use the hw power up values rather than 0. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-20drm/radeon: disable dpm on BTCAlex Deucher
Still unstable on some boards. Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=73053 https://bugzilla.kernel.org/show_bug.cgi?id=68571 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: 3.13 <stable@vger.kernel.org> # 3.13
2014-01-20drm/radeon/cik: use WAIT_REG_MEM special op for CP HDP flushAlex Deucher
This is the preferred flushing method on CIK. Note, this only works on the PFP so the engine bit must be set. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-20drm/radeon/cik: use POLL_REG_MEM special op for sDMA HDP flushAlex Deucher
This is the preferred flushing method on CIK. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-20drm/radeon: consolidate sdma hdp flushing code for CIKAlex Deucher
It's used in several places so move to a common shared function. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-20drm/radeon: consolidate cp hdp flushing code for CIKAlex Deucher
It's used in several places so move to a common shared function. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-20drm/radeon: don't power gate paused UVD streamsChristian König
Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-20Revert "drm/radeon: disable CIK CP semaphores for now"Alex Deucher
This reverts commit 99b4f25122f43210278cde17a9d100906235a074. Semaphores work fine after further review and testing. Cc: 3.13 <stable@vger.kernel.org> # 3.13
2014-01-20drm/edid: parse the list of additional 3D modesThomas Wood
Parse 2D_VIC_order_X and 3D_Structure_X from the list at the end of the HDMI Vendor Specific Data Block. v2: Use an offset value depending on 3D_Multi_present and add detail_present. (Ville Syrjälä) v3: Make sure the list is parsed even if 3D_Structure_ALL/MASK is not present. (Ville Syrjälä) Fix one length check and remove another. (Ville Syrjälä) Signed-off-by: Thomas Wood <thomas.wood@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-20drm/edid: split VIC display mode lookup into a separate functionThomas Wood
Signed-off-by: Thomas Wood <thomas.wood@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-20drm: Make the connector mode_valid() vfunc return a drm_mode_status enumDamien Lespiau
To make it clear what exactly mode_valid() should return. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-20drm/i915: Add a kludge for DSL incrementing too late and ISR not workingVille Syrjälä
On pre-PCH platforms ISR doesn't seem to be an actual ISR, at least as far as display interrupts are concerned. Instead it sort of looks like some ISR bits just directly reflect the corresponding bit from PIPESTAT. The bit appears in the ISR only if the PIPESTAT interrupt is enabled. So in that sense it sort of looks a bit like the south interrupt scheme on PCH platforms. So it goes something a bit like this: PIPESTAT.status & PIPESTAT.enable -> ISR -> IMR -> IIR -> IER -> actual interrupt In any case that means the intel_pipe_in_vblank_locked() doesn't actually work for pre-PCH platforms. As a last resort, add a similar kludge as radeon has that fixes things up if we got called from the vblank interrupt, but the scanline counter value indicates that we're not quite there yet. We know that the scanline counter increments at hsync but is otherwise accurate, so we can limit the kludge to the line just prior to vblank start, instead of the relative distance that radeon uses. Reviewed-by: mario.kleiner.de@gmail.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2014-01-20drm/radeon: Move the early vblank IRQ fixup to radeon_get_crtc_scanoutpos()Ville Syrjälä
i915 doesn't need this kludge for most platforms. Although we do appear to need something similar on certain platforms, but we can be more accurate when we apply the adjustment since we know exactly why the scanline counter doesn't always quite match the vblank status. Also the current code doesn't handle interlaced modes correctly, and we already deal with interlaced modes in i915 code. So let's just move the current code to radeon_get_crtc_scanoutpos() since that's why it was added. For i915 we'll add a more finely targeted variant. v2: Fix vpos vs. *vpos bug (Mario) Reviewed-by: mario.kleiner.de@gmail.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2014-01-20drm: Pass 'flags' from the caller to .get_scanout_position()Ville Syrjälä
Preparation for moving the early vblank IRQ logic into radeon_get_crtc_scanoutpos(). v2: Fix radeon_drv.c compile warning (Mario) Reviewed-by: mario.kleiner.de@gmail.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2014-01-20drm: Fix vblank timestamping constants for interlaced modesVille Syrjälä
We're currently miscalculating the line and pixel durations for interlaced modes. crtc_htotal and crtc_vtotal are the full frame timings, and so is crtc_clock, so we can compute the line and pixel durations from those w/o any extra adjustments. But we actually want framedur_ns to be the field, not frame, duration, so we must divide it by two. This should make the scanout based vblank timestamp corrections work correctly with interlaced modes, at least for i915. It all depends whether we keep the field or frame timings in the display mode crtc_ timings. v2: Preserve halve->half typo fix that happened in the meantine Reviewed-by: mario.kleiner.de@gmail.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2014-01-20drm/i915: Fix scanoutpos calculations for interlaced modesVille Syrjälä
The scanline counter counts lines in the current field, not the entire frame. But the crtc_ timings are the values for the entire frame. Divide the vertical timings by 2 to make them match the scanline counter. The rounding was carefully chosen to make it do the right thing wrt. the observed scanline counter and ISR vblank bit behaviour. Reviewed-by: mario.kleiner.de@gmail.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2014-01-20drm: Change {pixel,line,frame}dur_ns from s64 to intVille Syrjälä
Using s64 for the timestamping constants is wasteful. Signed 32bit integers get us a range of over +-2 seconds. Presuming that no-one wants to a vrefresh rate less than 0.5, we can switch to using int for the timestamping constants. We save a few bytes in drm_crtc and avoid a bunch of 64bit math. Reviewed-by: mario.kleiner.de@gmail.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2014-01-20drm: Use crtc_clock in drm_calc_timestamping_constants()Ville Syrjälä
drm_calc_timestamping_constants() computes the pixel/line/frame durations based on the crtc_ timing values. The corresponding pixel clock is in mode->crtc_clock, so we need to use that instead of mode->clock. This should fix drm_calc_timestamping_constants() for frame packing stereo modes. Reviewed-by: mario.kleiner.de@gmail.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2014-01-20drm/radeon: Populate crtc_clock in radeon_atom_get_tv_timings()Ville Syrjälä
crtc_clock is now supposed to be the actual pixel clock corresponding to the other crtc_ timing values. Populate crtc_clock appropriately in radeon_atom_get_tv_timings(). This was the only obvious place where we frob with the crtc_ timigns directly instead of calling drm_mode_set_crtcinfo() which would also update crtc_clock. Reviewed-by: mario.kleiner.de@gmail.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2014-01-20drm: Simplify the math in drm_calc_timestamping_constants()Ville Syrjälä
drm_calc_timestamping_constants() makes the math more complex than necessary. - multipying the dotclock by 1000 is pointless, just makes all the numbers bigger - div64_u64() is also pointless, div_u64 is enough - pixeldur_ns doesn't need any 64bit math Reviewed-by: mario.kleiner.de@gmail.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2014-01-20drm: Improve drm_calc_timestamping_constants() documentationVille Syrjälä
Move the long blurp to into the body of the comment, leaving only a short summary line at the top. Reviewed-by: mario.kleiner.de@gmail.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2014-01-20drm/i915: Call drm_calc_timestamping_constants() earlierVille Syrjälä
Update the pixel/line/frame duration information when we switch to the new pipe config. This will keep the timestamping constants in better sync with the real hardware state. Reviewed-by: mario.kleiner.de@gmail.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2014-01-20drm/i915: Kill hwmode save/restoreVille Syrjälä
drm core no longer uses crtc->hwmode, and neither does i915, so we can totally ignore it in i915. Reviewed-by: mario.kleiner.de@gmail.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2014-01-20drm: Pass the display mode to drm_calc_vbltimestamp_from_scanoutpos()Ville Syrjälä
Rather than using crtc->hwmode, just pass the relevant mode to drm_calc_vbltimestamp_from_scanoutpos(). This removes the last hwmode usage from core drm. Reviewed-by: mario.kleiner.de@gmail.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2014-01-20drm: Pass the display mode to drm_calc_timestamping_constants()Ville Syrjälä
We don't really use hwmode anymore in i915, so eliminating its use from the core code seems prudent. Just pass the appropriate mode to drm_calc_timestamping_constants(). Reviewed-by: mario.kleiner.de@gmail.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2014-01-20Merge branch 'drm-intel-next' of ↵Dave Airlie
git://people.freedesktop.org/~danvet/drm-intel into drm-next drm-intel-next-2014-01-10: - final bits for runtime D3 on Haswell from Paul (now enabled fully) - parse the backlight modulation freq information in the VBT from Jani (but not yet used) - more watermark improvements from Ville for ilk-ivb and bdw - bugfixes for fastboot from Jesse - watermark fix for i830M (but not yet everything) - vlv vga hotplug w/a (Imre) - piles of other small improvements, cleanups and fixes all over Note that the pull request includes a backmerge of the last drm-fixes pulled into Linus' tree - things where getting a bit too messy. So the shortlog also contains a bunch of patches from Linus tree. Please yell if you want me to frob it for you a bit. * 'drm-intel-next' of git://people.freedesktop.org/~danvet/drm-intel: (609 commits) drm/i915/bdw: make sure south port interrupts are enabled properly v2 drm/i915: Include more information in disabled hotplug interrupt warning drm/i915: Only complain about a rogue hotplug IRQ after disabling drm/i915: Only WARN about a stuck hotplug irq ONCE drm/i915: s/hotplugt_status_gen4/hotplug_status_g4x/
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