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2019-07-16drm/amd/powerplay: Use proper enums in vega20_print_clk_levelsNathan Chancellor
clang warns: drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:995:39: warning: implicit conversion from enumeration type 'PPCLK_e' to different enumeration type 'enum smu_clk_type' [-Wenum-conversion] ret = smu_get_current_clk_freq(smu, PPCLK_SOCCLK, &now); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:1016:39: warning: implicit conversion from enumeration type 'PPCLK_e' to different enumeration type 'enum smu_clk_type' [-Wenum-conversion] ret = smu_get_current_clk_freq(smu, PPCLK_FCLK, &now); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:1031:39: warning: implicit conversion from enumeration type 'PPCLK_e' to different enumeration type 'enum smu_clk_type' [-Wenum-conversion] ret = smu_get_current_clk_freq(smu, PPCLK_DCEFCLK, &now); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~ The values are mapped one to one in vega20_get_smu_clk_index so just use the proper enums here. Fixes: 096761014227 ("drm/amd/powerplay: support sysfs to get socclk, fclk, dcefclk") Link: https://github.com/ClangBuiltLinux/linux/issues/587 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amdgpu/gfx10: set SH_MEM_CONFIG.INITIAL_INST_PREFETCHNicolai Hähnle
Prefetch mode 0 is not supported and can lead to hangs with certain very specific code patterns. Set a sound prefetch mode for all VMIDs rather than forcing all shaders to set the prefetch mode at the beginning. Reduce code duplication a bit while we're at it. Note that the 64-bit address mode enum and the retry all enum are both 0, so the only functional change is in the INITIAL_INST_PREFETCH field. Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amd/powerplay: enable fw ctf,apcc dfll and gfx ssKenneth Feng
enable fw ctf, apcc dfll and gfx ss on navi10. fw ctf: when the fw ctf is triggered, the gfx and soc power domain are shut down. fan speed is boosted to the maximum. gfx ss: hardware feature, sanity check has been done. apcc dfll: can check the scoreboard in smu fw to confirm if it's enabled. no need to do further check since the gfx hardware control the frequency once a pcc signal comes. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amdgpu: check kdb_bin_size to exclude kdb loading sequenceHawking Zhang
The legacy navi10 sos binary will not carry on kdb image. the kdb_start_addr is actually the start address of sys_drv image and shouldn't be sent to psp bootloader. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amdgpu: Fix unaligned memory copiesFelix Kuehling
When starting a new mm_node, the page_offset becomes 0. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amdgpu: replace simple_strtol() by kstrtou32()Wang Xiayang
The simple_strtol() function is deprecated. kstrto[l,u32]() is the correct replacement as it can properly handle overflows. This patch replaces the deprecated simple_strtol() use introduced recently. As clk is of type uint32_t, we are safe to use kstrtou32(). It is also safe to return zero on string parsing error, similar to the case of returning zero if buf is empty in parse_clk(). Fixes: bb5a2bdf36a8 ("drm/amdgpu: support dpm level modification under virtualization v3") Signed-off-by: Wang Xiayang <xywang.sjtu@sjtu.edu.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amdgpu: remove memset after kzallocFuqian Huang
kzalloc has already zeroed the memory during the allocation. So memset is unneeded. Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Signed-off-by: Fuqian Huang <huangfq.daxian@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amd/amdgpu: hide #warning for missing DC configArnd Bergmann
It is annoying to have #warnings that trigger in randconfig builds like drivers/gpu/drm/amd/amdgpu/soc15.c:653:3: error: "Enable CONFIG_DRM_AMD_DC for display support on SOC15." drivers/gpu/drm/amd/amdgpu/nv.c:400:3: error: "Enable CONFIG_DRM_AMD_DC for display support on navi." Remove these and rely on the users to turn these on. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amdgpu: Fix Vega20 Perf counter for pcie_bwKent Russell
The perf counter for Vega20 is 108, instead of 104 which it was on all previous GPUs, so add a check to use the appropriate value. Signed-off-by: Kent Russell <kent.russell@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amd/amdgpu: Add missing select_me_pipe_q() for gfx10Tom St Denis
The ability to select GFX GRBM me/pipe/queue/vmid was missing from the gfx10 driver. This patch adds it. Used by the debugfs register interface to select GFX resources when read/writing registers. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amd/amdgpu: Add VMID to SRBM debugfs bank selectionTom St Denis
Add 5 bits to the offset for SRBM selection to handle VMIDs. Also update the select_me_pipe_q() callback to also select VMID. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amdgpu: extend AMDGPU_CTX_PRIORITY_NORMAL commentEmil Velikov
Currently the AMDGPU_CTX_PRIORITY_* defines are used in both drm_amdgpu_ctx_in::priority and drm_amdgpu_sched_in::priority. Extend the comment to mention the CAP_SYS_NICE or DRM_MASTER requirement is only applicable with the former. Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amd/powerplay: add helper of smu_clk_dpm_is_enabled for smuKevin Wang
v2: change function name to smu_clk_dpm_is_enabled. add this helper function to check dpm clk feature is enabled. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amd/powerplay: fix save dpm level error for smuKevin Wang
the save dpm level should be save previous dpm profile level, should not modified by get dpm level function. eg: default auto 1. auto -> standard ==> dpm_level = standard, save_dpm = auto. 2. standard -> auto ==> dpm_level = auto, save_dpm = standard. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amd/powerplay: avoid double check feature enabledKevin Wang
the unforce_dpm_levels doesn't need to check feature enablement. because the smu_get_dpm_freq_range function has check feature logic. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amd/powerplay: add standard profile dpm support for smuKevin Wang
1. the standard dpm is not support before. 2. use auto profile to adapt standard profile. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amd/powerplay: add socclk profile dpm support.Kevin Wang
1.miss socclk profile support when bringup. 2.add feature check for socclk. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amdkfd: Consistently apply noretry settingFelix Kuehling
Apply the same setting to SH_MEM_CONFIG and VM_CONTEXT1_CNTL. This makes the noretry param no longer KFD-specific. On GFX10 I'm not changing SH_MEM_CONFIG in this commit because GFX10 has different retry behaviour in the SQ and I don't have a way to test it at the moment. Suggested-by: Christian König <Christian.Koenig@amd.com> CC: Philip Yang <Philip.Yang@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by : Shaoyun.liu < Shaoyun.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amd/display: return 'NULL' instead of 'false' from ↵Arnd Bergmann
dcn20_acquire_idle_pipe_for_layer clang complains that 'false' is a not a pointer: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:2428:10: error: expression which evaluates to zero treated as a null pointer constant of type 'struct pipe_ctx *' [-Werror,-Wnon-literal-null-conversion] return false; Changing it to 'NULL' looks like the right thing that will shut up the warning and make it easier to read, while not changing behavior. Fixes: 7ed4e6352c16 ("drm/amd/display: Add DCN2 HW Sequencer and Resource") Reviewed-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-16drm/amd/display: Support clang option for stack alignmentArnd Bergmann
As previously fixed for dml in commit 4769278e5c7f ("amdgpu/dc/dml: Support clang option for stack alignment") and calcs in commit cc32ad8f559c ("amdgpu/dc/calcs: Support clang option for stack alignment"), dcn20 uses an option that is not available with clang: clang: error: unknown argument: '-mpreferred-stack-boundary=4' scripts/Makefile.build:281: recipe for target 'drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.o' failed Use the same trick that we have in the other two files. Fixes: 7ed4e6352c16 ("drm/amd/display: Add DCN2 HW Sequencer and Resource") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-12drm/amd/powerplay: add pstate mclk(uclk) support for navi10Kevin Wang
add pstate mclk(uclk) support. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-12drm/amd/powerplay: fix smu clock type change miss errorKevin Wang
in the smu module, use the smu_xxxclk type to identify the CLK type use SMU_SCLK, SMU_MCLK to replace PP_SCLK, PP_MCLK. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-12drm/amdgpu: support key database loading for navi10Hawking Zhang
Starting from navi10, driver should send Key Database Load command to bootloader before loading sys_drv and sos Signed-off-by: John Clements <John.Clements@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-12drm/amdgpu: switch to macro for psp bootloader commandHawking Zhang
The command will be sent to psp bootloader from driver to ask psp bootloader to exerise tOS, sys_drv and kdb loading Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-11drm/amdgpu: Print out voltage in DM_PPLIBPaul Menzel
As the clock is already logged, also log the voltage. Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-11drm/amd/display: Add drm_audio_component support to amdgpu_dmNicholas Kazlauskas
[Why] The drm_audio_component can be used to give pin ELD notifications directly to the sound driver. This fixes audio endpoints disappearing due to missing unsolicited notifications. [How] Send the notification via the audio component whenever we enable or disable audio state on a stream. This matches what i915 does with their drm_audio_component and what Takashi Iwai's proposed hack for radeon/amdpgu did. This is a bit delayed in when the notification actually occurs, however. We wait until after all the programming is complete rather than sending the notification mid sequence. Particular care is needed for the get ELD callback since it can happen outside the locking and fencing DRM does for atomic commits. Cc: Leo Li <sunpeng.li@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-11drm/amd/display: Expose audio inst from DC to DMNicholas Kazlauskas
[Why] In order to give pin notifications to the sound driver from DM we need to know whether audio is enabled on a stream and what pin it's using from DC. [How] Expose the instance via stream status if it's a mapped resource for the stream. It will be -1 if there's no audio mapped. Cc: Leo Li <sunpeng.li@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-11drm/amdkfd: fix cp hang in evictionEric Huang
The cp hang occurs in OCL conformance test only on supermicro platform which has 40 cores and the test generates 40 threads. The root cause is race condition in non-protected flags. The fix is to add flags of is_evicted and is_active(init_mqd()) into protected area. Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-11drm/amdgpu: enable IP discovery by default on naviAlex Deucher
Use the IP discovery table rather than hardcoding the settings in the driver. Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-11drm/amdgpu/discovery: fix DCE_HWIP mapping error in hw_id_map arraytiancyin
ID of DCE_HWIP from vbios is DMU_HWID, mismatch cause null pointer crash in navi10 modprobe. Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: tiancyin <tianci.yin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-11drm/amd/powerplay: bug fix for sysfsKenneth Feng
when we set profile_peak to sysfs:power_dpm_force_performance_level, we gets the wrong socclk level and mclk level.this patch fix this issue. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-11drm/amd/powerplay: increase the SMU msg response waiting timeEvan Quan
This is expected to fix some mode1 reset failures. And this affects SMU part only as the timeout setting for other parts is controlled by a different macro. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-11drm/amdgpu: Fix potential integer overflowsFelix Kuehling
With mm_nodes larger than 4GB, byte_count in amdgpu_fill_buffer would overflow. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-09drm/amdgpu/psp: add a mutex to protect access to the psp ringAlex Deucher
We need to serialize access to the psp ring if there are multiple callers at runtime. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-09drm/amdgpu/navi10: add uclk activity sensorAlex Deucher
Query the metrics table for the current uclk activity. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-09drm/amdgpu: properly guard the generic discovery codeAlex Deucher
It's only available on navi and newer. Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-09drm/amdgpu: add missing documentation on new module parametersAlex Deucher
New parameters added for navi lack documentation. Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-09drm/amdgpu: don't invalidate caches in RELEASE_MEM, only do the writebackMarek Olšák
This RELEASE_MEM use has the Release semantic, which means we should write back but not invalidate. Invalidations only make sense with the Acquire semantic (ACQUIRE_MEM), or when RELEASE_MEM is used to do the combined Acquire-Release semantic, which is a barrier, not a fence. The undesirable side effect of doing invalidations for the Release semantic is that it invalidates caches while shaders are running, because the Release can execute in the middle of the next IB. UMDs should use ACQUIRE_MEM at the beginning of IBs. Doing cache invalidations for a fence (like in this case) doesn't do anything for correctness. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-08drm/amd/display: avoid 64-bit divisionArnd Bergmann
On 32-bit architectures, dividing a 64-bit integer in the kernel leads to a link error: ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: "__divdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! Change the two recently introduced instances to a multiply+shift operation that is also much cheaper on 32-bit architectures. We can do that here, since both of them are really 32-bit numbers that change a few percent. Fixes: bedbbe6af4be ("drm/amd/display: Move link functions from dc to dc_link") Fixes: f18bc4e53ad6 ("drm/amd/display: update calculated bounding box logic for NV") Acked-by: Slava Abramov <slava.abramov@amd.com> Tested-by: Slava Abramov <slava.abramov@amd.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-08drm/amdgpu/psp11: simplify the ucode register logicAlex Deucher
Split it between navi10 and newer and everything before navi10. Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-08drm/amdgpu: properly guard DC support in navi codeAlex Deucher
Need to add appropriate ifdef. Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-08drm/amd/powerplay: vega20: fix uninitialized variable useArnd Bergmann
If smu_get_current_rpm() fails, we can't use the output, as that may be uninitialized: drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:3023:8: error: variable 'current_rpm' is used uninitialized whenever '?:' condition is false [-Werror,-Wsometimes-uninitialized] ret = smu_get_current_rpm(smu, &current_rpm); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../powerplay/inc/amdgpu_smu.h:735:3: note: expanded from macro 'smu_get_current_rpm' ((smu)->funcs->get_current_rpm ? (smu)->funcs->get_current_rpm((smu), (speed)) : 0) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:3024:12: note: uninitialized use occurs here percent = current_rpm * 100 / pptable->FanMaximumRpm; ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:3023:8: note: remove the '?:' if its condition is always true ret = smu_get_current_rpm(smu, &current_rpm); ^ drivers/gpu/drm/amd/amdgpu/../powerplay/inc/amdgpu_smu.h:735:3: note: expanded from macro 'smu_get_current_rpm' ((smu)->funcs->get_current_rpm ? (smu)->funcs->get_current_rpm((smu), (speed)) : 0) ^ drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:3020:22: note: initialize the variable 'current_rpm' to silence this warning uint32_t current_rpm; Propagate the error code in that case. Fixes: ee0db82027ee ("drm/amd/powerplay: move PPTable_t uses into asic level") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-08drm/amd/display: dcn20: include linux/delay.hArnd Bergmann
Without this header, we get a compiler error in some configurations: .../dc/dcn20/dcn20_hwseq.c: In function 'dcn20_hwss_wait_for_blank_complete': .../dc/dcn20/dcn20_hwseq.c:1493:3: error: implicit declaration of function 'udelay' [-Werror=implicit-function-declaration] Note: the use of udelay itself may be problematic, as can occupy the CPU for 200ms in a busy-loop here. Fixes: 7ed4e6352c16 ("drm/amd/display: Add DCN2 HW Sequencer and Resource") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-08amdgpu: make pmu support optionalArnd Bergmann
When CONFIG_PERF_EVENTS is disabled, we cannot compile the pmu portion of the amdgpu driver: drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c:48:38: error: no member named 'hw' in 'struct perf_event' struct hw_perf_event *hwc = &event->hw; ~~~~~ ^ drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c:51:13: error: no member named 'attr' in 'struct perf_event' if (event->attr.type != event->pmu->type) ~~~~~ ^ ... Use conditional compilation for this file. Fixes: 9c7c85f7ea1f ("drm/amdgpu: add pmu counters") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-08drm/amd/powerplay: Zero initialize current_rpm in vega20_get_fan_speed_percentNathan Chancellor
clang warns (trimmed for brevity): drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:3023:8: warning: variable 'current_rpm' is used uninitialized whenever '?:' condition is false [-Wsometimes-uninitialized] ret = smu_get_current_rpm(smu, &current_rpm); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ smu_get_current_rpm expands to a ternary operator conditional on smu->funcs->get_current_rpm being not NULL. When this is false, current_rpm will be uninitialized. Zero initialize current_rpm to avoid using random stack values if that ever happens. Fixes: ee0db82027ee ("drm/amd/powerplay: move PPTable_t uses into asic level") Link: https://github.com/ClangBuiltLinux/linux/issues/588 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-08drm/amd/powerplay: Zero initialize freq in smu_v11_0_get_current_clk_freqNathan Chancellor
clang warns (trimmed for brevity): drivers/gpu/drm/amd/amdgpu/../powerplay/smu_v11_0.c:1098:10: warning: variable 'freq' is used uninitialized whenever '?:' condition is false [-Wsometimes-uninitialized] ret = smu_get_current_clk_freq_by_table(smu, clk_id, &freq); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ If get_current_clk_freq_by_table is ever NULL, freq will fail to be properly initialized. Zero initialize it to avoid using uninitialized stack values. smu_get_current_clk_freq_by_table expands to a ternary operator conditional on smu->funcs->get_current_clk_freq_by_table being not NULL. When this is false, freq will be uninitialized. Zero initialize freq to avoid using random stack values if that ever happens. Fixes: e36182490dec ("drm/amd/powerplay: fix dpm freq unit error (10KHz -> Mhz)") Link: https://github.com/ClangBuiltLinux/linux/issues/585 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-08drm/amd/powerplay: Use memset to initialize metrics structsNathan Chancellor
clang warns: drivers/gpu/drm/amd/amdgpu/../powerplay/navi10_ppt.c:601:33: warning: suggest braces around initialization of subobject [-Wmissing-braces] static SmuMetrics_t metrics = {0}; ^ {} drivers/gpu/drm/amd/amdgpu/../powerplay/navi10_ppt.c:905:26: warning: suggest braces around initialization of subobject [-Wmissing-braces] SmuMetrics_t metrics = {0}; ^ {} 2 warnings generated. One way to fix these warnings is to add additional braces like clang suggests; however, there has been a bit of push back from some maintainers[1][2], who just prefer memset as it is unambiguous, doesn't depend on a particular compiler version[3], and properly initializes all subobjects. Do that here so there are no more warnings. [1]: https://lore.kernel.org/lkml/022e41c0-8465-dc7a-a45c-64187ecd9684@amd.com/ [2]: https://lore.kernel.org/lkml/20181128.215241.702406654469517539.davem@davemloft.net/ [3]: https://lore.kernel.org/lkml/20181116150432.2408a075@redhat.com/ Fixes: 98e1a543c7b1 ("drm/amd/powerplay: add function get current clock freq interface for navi10") Fixes: ab43c4bf1cc8 ("drm/amd/powerplay: fix fan speed show error (for hwmon pwm)") Link: https://github.com/ClangBuiltLinux/linux/issues/583 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-08drm/amdgpu/mes10.1: Fix header guardNathan Chancellor
clang warns: In file included from drivers/gpu/drm/amd/amdgpu/nv.c:53: drivers/gpu/drm/amd/amdgpu/../amdgpu/mes_v10_1.h:24:9: warning: '__MES_V10_1_H__' is used as a header guard here, followed by #define of a different macro [-Wheader-guard] #ifndef __MES_V10_1_H__ ^~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../amdgpu/mes_v10_1.h:25:9: note: '__MES_v10_1_H__' is defined here; did you mean '__MES_V10_1_H__'? #define __MES_v10_1_H__ ^~~~~~~~~~~~~~~ __MES_V10_1_H__ 1 warning generated. Capitalize the V. Fixes: 886f82aa7a1d ("drm/amdgpu/mes10.1: add ip block mes10.1 (v2)") Link: https://github.com/ClangBuiltLinux/linux/issues/582 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-08drm/amd/powerplay: add temperature sensor support for navi10Kevin Wang
the hwmon interface need temperature sensor type support. 1. SENSOR_HOTSPOT_TEMP 2. SENSOR_EDGE_TEMP(SENSOR_GPU_TEMP) 3. SENSOR_MEM_TEMP Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-08drm/amdgpu: fix scheduler timeout calcFlora Cui
scheduler timeout is in jiffies v2: move timeout check to amdgpu_device_get_job_timeout_settings after parsing the value v3: add lockup_timeout param check. 0: keep default value. negative: infinity timeout. v4: refactor codes. Signed-off-by: Flora Cui <flora.cui@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-12 13:24:42 +0000