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Age	Commit message (Expand)	Author
2018-10-18	Merge branch 'clk-k3-tisci' into clk-next	Stephen Boyd
2018-10-18	Merge branches 'clk-mvebu-periph-pm', 'clk-meson', 'clk-allwinner', 'clk-mveb...	Stephen Boyd
2018-10-18	Merge branches 'clk-qcom-sdm845-camcc' and 'clk-mtk-unused' into clk-next	Stephen Boyd
2018-10-18	Merge branch 'clk-renesas' into clk-next	Stephen Boyd
2018-10-18	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	Stephen Boyd
2018-10-18	Merge branches 'clk-spdx', 'clk-qcom-dfs', 'clk-smp2s11-include', 'clk-qcom-8...	Stephen Boyd
2018-10-16	clk: mvebu: armada-37xx-tbg: Switch to clk_get and balance it in probe	Gregory CLEMENT
2018-10-07	clk: keystone: add missing MODULE_LICENSE	Arnd Bergmann
2018-10-02	clk: keystone: Enable TISCI clocks if K3_ARCH	Nishanth Menon
2018-10-02	clk: davinci: kill davinci_clk_reset_assert/deassert()	Bartosz Golaszewski
2018-10-01	clk: mvebu: ap806: Remove superfluous of_clk_add_provider	Gregory CLEMENT
2018-10-01	clk: mvebu: use SPDX-License-Identifier	Gregory CLEMENT
2018-10-01	Merge tag 'sunxi-clk-for-4.20' of https://git.kernel.org/pub/scm/linux/kernel...	Stephen Boyd
2018-10-01	Merge tag 'clk-renesas-for-v4.20-tag2' of git://git.kernel.org/pub/scm/linux/...	Stephen Boyd
2018-10-01	Merge tag 'meson-clk-4.20-1' of https://github.com/BayLibre/clk-meson into cl...	Stephen Boyd
2018-09-28	clk: renesas: Convert to SPDX identifiers	Kuninori Morimoto
2018-09-28	clk: renesas: r7s9210: Add SPI clocks	Chris Brandt
2018-09-26	clk: renesas: r7s9210: Move table update to separate function	Chris Brandt
2018-09-26	clk: renesas: r7s9210: Convert some clocks to early	Chris Brandt
2018-09-26	clk: renesas: cpg-mssr: Add early clock support	Chris Brandt
2018-09-26	clk: meson: meson8b: use the regmap in the internal reset controller	Martin Blumenstingl
2018-09-26	clk: meson: meson8b: register the clock controller early	Martin Blumenstingl
2018-09-26	clk: meson-axg: pcie: drop the mpll3 clock parent	Yixun Lan
2018-09-26	clk: meson: axg: round audio system master clocks down	Jerome Brunet
2018-09-26	clk: meson: clk-pll: drop hard-coded rates from pll tables	Jerome Brunet
2018-09-26	clk: meson: clk-pll: remove od parameters	Jerome Brunet
2018-09-26	clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary	Jerome Brunet
2018-09-26	clk: meson: clk-pll: add enable bit	Jerome Brunet
2018-09-25	clk: renesas: r8a77970: Add TPU clock	Sergei Shtylyov
2018-09-25	clk: renesas: r8a77990: Fix incorrect PLL0 divider in comment	Geert Uytterhoeven
2018-09-19	dt-bindings: clock: renesas: cpg-mssr: Document r8a774c0	Fabrizio Castro
2018-09-19	clk: renesas: cpg-mssr: Add r8a774c0 support	Fabrizio Castro
2018-09-19	clk: renesas: Add r8a774c0 CPG Core Clock Definitions	Fabrizio Castro
2018-09-19	clk: renesas: r8a7743: Add r8a7744 support	Biju Das
2018-09-19	clk: renesas: Add r8a7744 CPG Core Clock Definitions	Biju Das
2018-09-19	dt-bindings: clock: renesas: cpg-mssr: Document r8a7744 binding	Biju Das
2018-09-19	dt-bindings: clock: renesas: Convert to SPDX identifiers	Kuninori Morimoto
2018-09-11	clk: renesas: cpg-mssr: Add R7S9210 support	Chris Brandt
2018-09-11	clk: renesas: r8a77970: Add TMU clocks	Sergei Shtylyov
2018-09-11	clk: renesas: r8a77970: Add CMT clocks	Sergei Shtylyov
2018-09-11	clk: renesas: r9a06g032: Fix UART34567 clock rate	Phil Edworthy
2018-09-05	dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro	Jagan Teki
2018-09-05	clk: sunxi-ng: a64: Add max. rate constraint to video PLLs	Icenowy Zheng
2018-09-05	clk: sunxi-ng: a64: Add minimal rate for video PLLs	Jagan Teki
2018-09-05	clk: sunxi-ng: sun50i: h6: Add 2x fixed post-divider to MMC module clocks	Icenowy Zheng
2018-09-03	clk: renesas: r8a77970: Add SD0H/SD0 clocks for SDHI	Sergei Shtylyov
2018-09-03	clk: renesas: r8a77980: Add CMT clocks	Sergei Shtylyov
2018-08-31	clk: mvebu: armada-37xx-periph: add suspend/resume support	Miquel Raynal
2018-08-31	clk: mvebu: armada-37xx-periph: save the IP base address in the driver data	Miquel Raynal
2018-08-31	reset: hisilicon: fix potential NULL pointer dereference	Gustavo A. R. Silva