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AgeCommit message (Expand)Author
2020-09-17drm/i915: DP->HDMI TMDS clock limits vs. deep colorVille Syrjälä
2020-09-17drm/i915: Extract intel_hdmi_has_audio()Ville Syrjälä
2020-09-17drm/i915: Handle downstream facing ports w/o EDIDVille Syrjälä
2020-09-17drm/dp: Add drm_dp_downstream_mode()Ville Syrjälä
2020-09-17drm/i915: Configure DP 1.3+ protocol converted HDMI modeVille Syrjälä
2020-09-17drm/i915: Deal with TMDS DFP clock limitsVille Syrjälä
2020-09-17drm/dp: Add drm_dp_downstream_{min,max}_tmds_clock()Ville Syrjälä
2020-09-17drm/i915: Reworkd DP DFP clock handlingVille Syrjälä
2020-09-17drm/dp: Redo drm_dp_downstream_max_clock() as drm_dp_downstream_max_dotclock()Ville Syrjälä
2020-09-17drm/dp: Pimp drm_dp_downstream_max_bpc()Ville Syrjälä
2020-09-17drm/dp: Add helpers to identify downstream facing port typesVille Syrjälä
2020-09-17drm/i915: Reworkd DFP max bpc handlingVille Syrjälä
2020-09-17drm/dp: Define more downstream facing port capsVille Syrjälä
2020-09-17drm/dp: Define protocol converter DPCD registersVille Syrjälä
2020-09-17drm/i915/lspcon: Do not send infoframes to non-HDMI sinksVille Syrjälä
2020-09-17drm/dp: Dump downstream facing port capsVille Syrjälä
2020-09-16drm/i915/selftests: Push the fake iommu device from the stack to dataChris Wilson
2020-09-16drm/i915: Initialise outparam for error return from wait_for_registerChris Wilson
2020-09-15drm/i915/pll: Centralize PLL_ENABLE register lookupAnusha Srivatsa
2020-09-15drm/i915: Nuke pointless variableVille Syrjälä
2020-09-15drm/i915: Introduce intel_hpd_hotplug_irqs()Ville Syrjälä
2020-09-15drm/i915: Introduce HPD_PORT_TC<n>Ville Syrjälä
2020-09-15drm/i915: Move hpd_pin setup to encoder initVille Syrjälä
2020-09-15drm/i915: Split icp_hpd_detection_setup() into ddi vs. tc partsVille Syrjälä
2020-09-15drm/i915: Configure GEN11_{TBT,TC}_HOTPLUG_CTL for ports TC5/6Ville Syrjälä
2020-09-15drm/i915: Nuke the redundant TC/TBT HPD bit definesVille Syrjälä
2020-09-15drm/i915: Add VBT AUX CH H and IVille Syrjälä
2020-09-15drm/i915: Add VBT DVO ports H and IVille Syrjälä
2020-09-15drm/i915: Add AUX_CH_{H,I} power domain handlingVille Syrjälä
2020-09-15drm/i915: Add PORT_{H,I} to intel_port_to_power_domain()Ville Syrjälä
2020-09-15drm/i915: Add more AUX CHs to the enumVille Syrjälä
2020-09-15drm/i915: Reduce INTEL_DISPLAY_ENABLED to just treat outputs as disconnectedVille Syrjälä
2020-09-15drm/i915: Reduce INTEL_DISPLAY_ENABLED to just removing the outputsVille Syrjälä
2020-09-14drm/i915: Update DRIVER_DATE to 20200914Rodrigo Vivi
2020-09-14drm/i915: Update DRIVER_DATE to 20200914Rodrigo Vivi
2020-09-14Merge tag 'gvt-next-2020-09-10' of https://github.com/intel/gvt-linux into dr...Rodrigo Vivi
2020-09-14drm/i915: Use fb->format->is_yuv for the g4x+ sprite RGB vs. YUV checkVille Syrjälä
2020-09-14drm/i915: Fix g4x+ sprite dotclock limit for upscalingVille Syrjälä
2020-09-14drm/i915: Nuke CACHE_MODE_0 save/restoreVille Syrjälä
2020-09-14drm/i915: Nuke MI_ARB_STATE save/restoreVille Syrjälä
2020-09-14drm/i915: Nuke the magic FBC_CONTROL save/restoreVille Syrjälä
2020-09-14drm/i915: Kill unused savePCH_PORT_HOTPLUGVille Syrjälä
2020-09-11Merge drm/drm-next into drm-intel-next-queuedRodrigo Vivi
2020-09-11drm/i915: Nuke dpio_phy_iosf_port[]Ville Syrjälä
2020-09-11drm/i915: move gmbus restore to i915_restore_displayJani Nikula
2020-09-11drm/i915: move gen4 GCDGMBUS save/restore to display save/restoreJani Nikula
2020-09-11drm/i915: disable all display features when no displayJani Nikula
2020-09-10drm/i915: Fix slightly botched merge in __reloc_entry_gpuMaarten Lankhorst
2020-09-10drm/i915/gvt: Init vreg GUC_STATUS to GS_MIA_IN_RESETColin Xu
2020-09-10drm/i915/gvt: Add F_CMD_ACCESS for some GEN9 SKU WA MMIO accessColin Xu
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