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AgeCommit message (Expand)Author
2015-06-25ARCv2: STAR 9000837815 workaround hardware exclusive transactions livelockVineet Gupta
2015-06-25ARC: Reduce bitops lines of code using macrosVineet Gupta
2015-06-25ARCv2: barriersVineet Gupta
2015-06-25arch: conditionally define smp_{mb,rmb,wmb}Vineet Gupta
2015-06-25ARC: add smp barriers around atomics per Documentation/atomic_ops.txtVineet Gupta
2015-06-25ARC: add compiler barrier to LLSC based cmpxchgVineet Gupta
2015-06-22ARCv2: SMP: intc: IDU 2nd level intc for dynamic IRQ distributionVineet Gupta
2015-06-22ARCv2: SMP: clocksource: Enable Global Real Time counterVineet Gupta
2015-06-22ARCv2: SMP: ARConnect debug/robustnessVineet Gupta
2015-06-22ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et alVineet Gupta
2015-06-22ARC: make plat_smp_ops weak to allow over-ridesVineet Gupta
2015-06-22ARCv2: clocksource: Introduce 64bit local RTC counterVineet Gupta
2015-06-22ARCv2: extable: Enable sorting at build timeVineet Gupta
2015-06-22ARCv2: Adhere to Zero Delay loop restrictionVineet Gupta
2015-06-22ARCv2: optimised string/mem lib routinesClaudiu Zissulescu
2015-06-22ARCv2: MMUv4: support aliasing icache configVineet Gupta
2015-06-22ARCv2: MMUv4: cache programming model changesVineet Gupta
2015-06-22ARCv2: MMUv4: TLB programming Model changesVineet Gupta
2015-06-22ARCv2: STAR 9000814690: Really Re-enable interrupts to avoid deadlocksVineet Gupta
2015-06-22ARCv2: STAR 9000808988: signals involving Delay SlotVineet Gupta
2015-06-22ARCv2: STAR 9000793984: Handle return from intr to Delay SlotVineet Gupta
2015-06-22ARCv2: Support for ARCv2 ISA and HS38x coresVineet Gupta
2015-06-22ARCv2: [intc] HS38 core interrupt controllerVineet Gupta
2015-06-22ARC: uncached base is hard constant for ARC, don't save itVineet Gupta
2015-06-19ARC: intc: split into ARCompact ISA specific, common bitsVineet Gupta
2015-06-19ARC: Make way for pt_regs != user_regs_structVineet Gupta
2015-06-19ARC: entry.S: [arcompact] simplify SWITCH_TO_KERNEL_STKVineet Gupta
2015-06-19ARC: entry.S: use single EXCEPTION_PROLOGUEVineet Gupta
2015-06-19ARC: entry.S: micro-optimize Trap handlerVineet Gupta
2015-06-19ARC: entry.S: move some code around for cache locality in return pathVineet Gupta
2015-06-19ARC: entry.S: split into ARCompact ISA specific, common bitsVineet Gupta
2015-06-19ARC: entry.S: Ensure that restore_regs is local to compilation unitVineet Gupta
2015-06-19ARC: entry.S: comments cleanupVineet Gupta
2015-06-19ARC: entry.S: Trap handler to use r10 for syscall vs. brkpt decisionVineet Gupta
2015-06-19ARC: entry.S: FAKE_RET_FROM_EXCPN can always use r9Vineet Gupta
2015-06-19ARC: entry.S: confine EXCEPTION_* macros to one fileVineet Gupta
2015-06-19ARC: entry.S: canonical'ize EXCEPTION_{PROLOGUE,EPILOGUE}Vineet Gupta
2015-06-19ARC: entry.S: Introduce INTERRUPT_{PROLOGUE,EPILOGUE}Vineet Gupta
2015-06-19ARC: entry.S: common'ize scrtach reg freeup in intr + exceptionsVineet Gupta
2015-06-19ARC: untangle cache flush loopVineet Gupta
2015-06-19ARC: cacheflush: No need to retain DC_CTRL from __before_dc_op()Vineet Gupta
2015-06-19ARC: cacheflush: move some code around, delete old commentsVineet Gupta
2015-06-19ARC: mm/cache_arc700.c -> mm/cache.cVineet Gupta
2015-06-19ARC: [axs101] Add missing __init annotationsVineet Gupta
2015-06-19ARC: [axs101] STAR 9000799830: Fix SD cards supportAlexey Brodkin
2015-06-19ARC: [axs101] Tweak DDR port aperture mappings for performanceVineet Gupta
2015-06-19ARC: [axs101] support early 8250 uartVineet Gupta
2015-06-19ARC: [axs101] Add support for AXS101 SDP (software development platform)Alexey Brodkin
2015-06-19ARC: mm: document system mem map clearlyVineet Gupta
2015-06-19ARC: stack unwinder to bail if PC is not kernel modeVineet Gupta
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