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2013-10-28powerpc/dts/c293pcie: Add range field for IFC NANDPrabhakar Kushwaha
C290PCIe has NAND flash present on IFC Chip Select(CS) 1. So Add "ranges" field for NAND flash on CS1. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-28powerpc/b4860emu: Add device tree file for b4860emuYork Sun
B4860EMU is a emualtor target with minimum peripherals. It is based on B4860QDS and trimmed down most peripherals due to either not modeled or lack of board level connections. The main purpose of this minimum dts is to speed up booting on emulator. Signed-off-by: York Sun <yorksun@freescale.com> [scottwood@freescale.com: whitespace fix] Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-28powerpc/t4240emu: Add device tree file for t4240emuYork Sun
T4240EMU is an emulator target with minimum peripherals. It is based on T4240QDS and trimmed down most peripherals due to either not modeled or lack of board level connections. The main purpose of this minimum dts is to speed up booting on emulator. Signed-off-by: York Sun <yorksun@freescale.com> [scottwood@freescale.com: whitespace fixes] Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-28powerpc/b4qds: enable coreintScott Wood
Commit 9837b43c5f3514e5d28f65f1513f4dc6759d2810 ("powerpc/85xx: enable coreint for all the 64bit boards") removed the ifdef that avoided coreint on 64-bit, but it missed b4_qds.c. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Kevin Hao <haokexin@gmail.com> Cc: Shaveta Leekha <shaveta@freescale.com>
2013-10-28powerpc/8xx: Revert commit e0908085fc2391c85b85fb814ae1df377c8e0dcbLEROY Christophe
The commit e0908085fc2391c85b85fb814ae1df377c8e0dcb ("powerpc/8xx: Fix regression introduced by cache coherency rewrite") is not needed anymore. The issue was because dcbst wrongly sets the store bit when causing a DTLB error, but this is now fixed by commit 0a2ab51ffb8dfdf51402dcfb446629648c96bc78 ("powerpc/8xx: Fixup DAR from buggy dcbX instructions.") which handles the buggy dcbx instructions on data page faults on the 8xx. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> [scottwood@freescale.com: fix commit message] Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-28powerpc: Add I2C bus multiplexer node for B4 and T4240QDSHongtao Jia
In both B4 and T4240QDS platform PCA9547 I2C bus multiplexer is used. The sub-nodes are also reorganized according to right I2C topology. Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-28powerpc/fsl/defconfig: enable CONFIG_AT803X_PHYShengzhou Liu
Enable CONFIG_AT803X_PHY to support AR8030/8033/8035 PHY. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-28powerpc/dts: Correct sdhci quirk for bsc9131Haijun.Zhang
We use property "sdhci,auto-cmd12" instead of "fsl,sdhci-auto-cmd12" to distinguish if the sdhc host has quirk SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12. Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-28powerpc/eSDCH: Specify voltage for T4240QDSHaijun.Zhang
Freescale T4240QDS reference board has extra voltage shifters added to allow 3.3V operation, so add 3.3v voltage support for T4240QDS. 1.8v and 3.3v is recommand for eMMC and SDHC card. Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-28powerpc/mpc8xx: Clearer Oops message for Software Emulation ExceptionLEROY Christophe
This patch modifies the Oops message in case of Software Emulation Exception. The existing message is quite confusing because it refers to FPU Emulation while most often the issue is due to either a non supported instruction (not necessarily FPU related) or a stale instruction due to HW issues. The new message tries to be more generic in order to make the user understand that the Oops is due to something wrong with an instruction, not necessarily due to an FPU instruction. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-28powerpc: Set the NOTE type for SPE regsetSuzuki Poulose
The regset defintion for SPE doesn't have the core_note_type set, which prevents it from being dumped. Add the note type NT_PPC_SPE for SPE regset. Signed-off-by: Suzuki K Poulose <suzuki@in.ibm.com> Cc: Roland McGrath <roland@hack.frob.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-28powerpc/e500v2: Include Power ISA propertiesLijun Pan
bsc9131 device tree does not have these properties. Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-28powerpc/e6500: Include Power ISA propertiesLijun Pan
b4420 and b4860 device trees do not have these properties. Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-28powerpc/pci: Change the DECLARE_PCI_FIXUP_{HEADER => EARLY} macro of pci quirkChunhe Lan
Freescale platform has class code = 0x0b2000, when it boots. This makes kernel PCI bus code to setup these devices resulting into the following notice information when trying to enable them: pci 0000:00:00.0: ignoring class 0x0b2000 (doesn't match header type 01) The above information is outputted by judging value of dev->class before pci_setup_device() function, and the DECLARE_PCI_FIXUP_HEADER quirk runs after pci_setup_device() function. But the DECLARE_PCI_FIXUP_EARLY quirk runs before judging value of dev->class and pci_setup_device() function. So we use the DECLARE_PCI_FIXUP_EARLY macro to fix this issue. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-28powerpc/dts: fix sRIO error interrupt for b4860Minghuan Lian
For B4 platform, MPIC EISR register is in reversed bitmap order, instead of "Error interrupt source 0-31. Bit 0 represents SRC0." the correct ordering is "Error interrupt source 0-31. Bit 0 represents SRC31." This patch is to fix sRIO EISR bit value of error interrupt in dts node. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-18powerpc/booke: clear DBCR0_BT in user_disable_single_step()James Yang
BookE version of user_disable_single_step() clears DBCR0_IC for the instruction completion debug, but did not also clear DBCR0_BT for the branch taken exception. This behavior was lost by the 2/2010 patch. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-18powerpc: export debug registers save function for KVMBharat Bhushan
KVM need this function when switching from vcpu to user-space thread. My subsequent patch will use this function. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Acked-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-18powerpc: move debug registers in a structureBharat Bhushan
This way we can use same data type struct with KVM and also help in using other debug related function. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Acked-by: Michael Neuling <mikey@neuling.org> [scottwood@freescale.com: removed obvious debug_reg comment] Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-18powerpc: remove unnecessary line continuationsBharat Bhushan
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Acked-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-18powerpc/kgdb: use DEFINE_PER_CPU to allocate kgdb's thread_infoTiejun Chen
Use DEFINE_PER_CPU to allocate thread_info statically instead of kmalloc(). This can avoid introducing more memory check codes. Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com> [scottwood@freescale.com: wrapped long line] Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-16powerpc: Emulate sync instruction variantsJames Yang
Reserved fields of the sync instruction have been used for other instructions (e.g. lwsync). On processors that do not support variants of the sync instruction, emulate it by executing a sync to subsume the effect of the intended instruction. Signed-off-by: James Yang <James.Yang@freescale.com> [scottwood@freescale.com: whitespace and subject line fix] Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-16powerpc/fsl-booke: Use common defines for SPE/FP interrupts numbersMihai Caraman
On Book3E some SPE/FP/AltiVec interrupts share the same number. Use common defines to indentify these numbers. Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com> [scottwood@freescale.com: fixed space-before-tab] Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-16powerpc/booke64: Use common defines for AltiVec interrupts numbersMihai Caraman
On Book3E some SPE/FP/AltiVec interrupts share the same number. Use common defines to indentify these numbers. Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-16powerpc: remove dependency on MV64360Paul Bolle
The Kconfig entry that allows to "Distribute interrupts on all CPUs by default" has a (negative) dependency on MV64360. But that Kconfig symbol was removed in v2.6.27, which means that this dependency has evaluated to true ever since. It can be removed too. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-11Merge branch 'for-kvm' into nextBenjamin Herrenschmidt
Topic branch for commits that the KVM tree might want to pull in separately. Hand merged a few files due to conflicts with the LE stuff Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc: Provide for giveup_fpu/altivec to save state in alternate locationPaul Mackerras
This provides a facility which is intended for use by KVM, where the contents of the FP/VSX and VMX (Altivec) registers can be saved away to somewhere other than the thread_struct when kernel code wants to use floating point or VMX instructions. This is done by providing a pointer in the thread_struct to indicate where the state should be saved to. The giveup_fpu() and giveup_altivec() functions test these pointers and save state to the indicated location if they are non-NULL. Note that the MSR_FP/VEC bits in task->thread.regs->msr are still used to indicate whether the CPU register state is live, even when an alternate save location is being used. This also provides load_fp_state() and load_vr_state() functions, which load up FP/VSX and VMX state from memory into the CPU registers, and corresponding store_fp_state() and store_vr_state() functions, which store FP/VSX and VMX state into memory from the CPU registers. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc: Put FP/VSX and VR state into structuresPaul Mackerras
This creates new 'thread_fp_state' and 'thread_vr_state' structures to store FP/VSX state (including FPSCR) and Altivec/VSX state (including VSCR), and uses them in the thread_struct. In the thread_fp_state, the FPRs and VSRs are represented as u64 rather than double, since we rarely perform floating-point computations on the values, and this will enable the structures to be used in KVM code as well. Similarly FPSCR is now a u64 rather than a structure of two 32-bit values. This takes the offsets out of the macros such as SAVE_32FPRS, REST_32FPRS, etc. This enables the same macros to be used for normal and transactional state, enabling us to delete the transactional versions of the macros. This also removes the unused do_load_up_fpu and do_load_up_altivec, which were in fact buggy since they didn't create large enough stack frames to account for the fact that load_up_fpu and load_up_altivec are not designed to be called from C and assume that their caller's stack frame is an interrupt frame. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc: add real mode support for dma operations on powernvAlexey Kardashevskiy
The existing TCE machine calls (tce_build and tce_free) only support virtual mode as they call __raw_writeq for TCE invalidation what fails in real mode. This introduces tce_build_rm and tce_free_rm real mode versions which do mostly the same but use "Store Doubleword Caching Inhibited Indexed" instruction for TCE invalidation. This new feature is going to be utilized by real mode support of VFIO. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc: Prepare to support kernel handling of IOMMU map/unmapAlexey Kardashevskiy
The current VFIO-on-POWER implementation supports only user mode driven mapping, i.e. QEMU is sending requests to map/unmap pages. However this approach is really slow, so we want to move that to KVM. Since H_PUT_TCE can be extremely performance sensitive (especially with network adapters where each packet needs to be mapped/unmapped) we chose to implement that as a "fast" hypercall directly in "real mode" (processor still in the guest context but MMU off). To be able to do that, we need to provide some facilities to access the struct page count within that real mode environment as things like the sparsemem vmemmap mappings aren't accessible. This adds an API function realmode_pfn_to_page() to get page struct when MMU is off. This adds to MM a new function put_page_unless_one() which drops a page if counter is bigger than 1. It is going to be used when MMU is off (for example, real mode on PPC64) and we want to make sure that page release will not happen in real mode as it may crash the kernel in a horrible way. CONFIG_SPARSEMEM_VMEMMAP and CONFIG_FLATMEM are supported. Cc: linux-mm@kvack.org Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Andrew Morton <akpm@linux-foundation.org> Reviewed-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11hashtable: add hash_for_each_possible_rcu_notrace()Alexey Kardashevskiy
This adds hash_for_each_possible_rcu_notrace() which is basically a notrace clone of hash_for_each_possible_rcu() which cannot be used in real mode due to its tracing/debugging capability. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc/eeh: Reorder output messagesGavin Shan
We already had some output messages from EEH core. Occasionally, we can see the output messages from EEH core before the stack dump. That's not what we expected. The patch fixes that and shows the stack dump prior to output messages from EEH core. Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc/eeh: Output PHB3 diag-dataGavin Shan
The patch adds function ioda_eeh_phb3_phb_diag() to dump PHB3 PHB diag-data. That's called while detecting informative errors or frozen PE on the specific PHB. Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc/powernv: Double size of log blobGavin Shan
Each PHB instance (struct pnv_phb) has its corresponding log blob, which is used to hold the retrieved error log from firmware. The current size of that (4096) isn't enough for PHB3 case and the patch makes that double to 8192. Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc/eeh: Output error numberGavin Shan
The patch prints the error number while failing to retrieve error log from firmware. It's helpful for debugging. Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc/powernv: Support inbound error injectionGavin Shan
For now, we only support outbound error injection. Actually, the hardware supports injecting inbound errors as well. The patch enables to inject inbound errors. Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc/powernv: Enable EEH for PHB3Gavin Shan
The EEH isn't enabled for PHB3 and the patch intends to enable it. Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc/scom: Use "devspec" rather than "path" in debugfs entriesBenjamin Herrenschmidt
This is the traditional name for device-tree path, used in sysfs, do the same for the XSCOM debugfs files. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc/scom: CONFIG_SCOM_DEBUGFS should depend on CONFIG_DEBUG_FSBenjamin Herrenschmidt
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc/powernv: Add scom support under OPALv3Benjamin Herrenschmidt
OPAL v3 provides interfaces to access the chips XSCOM, expose this via the existing scom infrastructure. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc/scom: Create debugfs files using ibm,chip-id if availableBenjamin Herrenschmidt
When creating the debugfs scom files, use "ibm,chip-id" as the scom%d index rather than a simple made up number when possible. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc/scom: Add support for "reg" propertyBenjamin Herrenschmidt
When devices are direct children of a scom controller node, they should be able to use the normal "reg" property instead of "scom-reg". In that case, they also use #address-cells rather than #scom-cells to indicate the size of an entry. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc/scom: Change scom_read() and scom_write() to return errorsBenjamin Herrenschmidt
scom_read() now returns the read value via a pointer argument and both functions return an int error code Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc: Enable /dev/port when isa_io_special is setBenjamin Herrenschmidt
isa_io_special is set when the platform provides a "special" implementation of inX/outX via some FW interface for example. Such a platform doesn't need an ISA bridge on PCI, and so /dev/port should be made available even if one isn't present. This makes the LPC bus IOs accessible via /dev/port on PowerNV Power8 Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc: Make ftrace endian-safe.Eugene Surovegin
Signed-off-by: Eugene Surovegin <surovegin@google.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc: Make kernel module helper endian-safe.Eugene Surovegin
Signed-off-by: Eugene Surovegin <surovegin@google.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc: prom_init exception when updating core valueLaurent Dufour
Since the CPU is generating an exception when accessing unaligned word, and as this exception is not yet handled when running prom_init, data should be copied from the architecture vector byte per byte. Signed-off-by: Laurent Dufour <ldufour@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc/booke64: Check napping in performance monitor interruptKevin Hao
The performance monitor interrupt is asynchronous, so we should check if the current processor is in napping status in the handler of this interrupt. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc/kernel: Fix endian issue in rtas_pciCedric Le Goater
Signed-off-by: Cédric Le Goater <clg@fr.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11powerpc/pseries: Implement arch_get_random_long() based on H_RANDOMMichael Ellerman
Add support for the arch_get_random_long() hook based on the H_RANDOM hypervisor call. We trust the hypervisor to provide us with random data, ie. we don't whiten it in anyway. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-11hwrng: Add a driver for the hwrng found in power7+ systemsMichael Ellerman
Add a driver for the hwrng found in power7+ systems, based on the existing code for the arch_get_random_long() hook. We only register a single instance of the driver, not one per device, because we use the existing per_cpu array of devices in the arch code. This means we always read from the "closest" device, avoiding inter-chip memory traffic. Signed-off-by: Guo Chao <yan@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>