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AgeCommit message (Expand)Author
2015-02-20MIPS: OCTEON: Implement the core-16057 workaroundDavid Daney
2015-02-20MIPS: OCTEON: Delete unused COP2 saving codeAleksey Makarov
2015-02-20MIPS: OCTEON: Use correct instruction to read 64-bit COP0 registerChandrakala Chavva
2015-02-20MIPS: OCTEON: Save and restore CP2 SHA3 stateDavid Daney
2015-02-20MIPS: OCTEON: Fix FP context save.David Daney
2015-02-20MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUsDavid Daney
2015-02-20MIPS: boot: Provide more uImage optionsMarkos Chandras
2015-02-20MIPS: Remove unneeded #ifdef __KERNEL__ from asm/processor.hDavid Daney
2015-02-20MIPS: ip22-gio: Remove legacy suspend/resume supportLars-Peter Clausen
2015-02-20mips: pci: Add ifdef around pci_proc_domainZubair Lutfullah Kakakhel
2015-02-20MIPS: Alchemy: Fix cpu clock calculationManuel Lauss
2015-02-20MIPS: Alchemy: remove declaration for set_cpuspecManuel Lauss
2015-02-20MIPS: Alchemy: preset loops_per_jiffy based on CPU clockManuel Lauss
2015-02-20MIPS: Alchemy: fix Au1000/Au1500 LRCLK calculationManuel Lauss
2015-02-20MIPS: Add set/clear CP0 macros for PageGrain registerSteven J. Hill
2015-02-19MIPS: Usage and cosmetic cleanups of page table bits.Steven J. Hill
2015-02-19Merge branch 'mipsr6-for-3.20' of git://git.linux-mips.org/pub/scm/mchandras/...Ralf Baechle
2015-02-19MIPS: Export MSA functions used by lose_fpu(1) for KVMJames Hogan
2015-02-19MIPS: Export FP functions used by lose_fpu(1) for KVMJames Hogan
2015-02-19MIPS: BCM3384: Fix outdated use of mips_cpu_intc_init()Kevin Cernekee
2015-02-19MIPS: Provide correct siginfo_t.si_stimePetr Malat
2015-02-19MIPS: Makefile: Move the ASEs checks after setting the core's CFLAGSMarkos Chandras
2015-02-19MIPS: Makefile: Pass -march option on Loongson3A coresRalf Baechle
2015-02-17MIPS: Add Malta QEMU 32R6 defconfigMarkos Chandras
2015-02-17MIPS: Malta: Add support for building MIPS R6 kernelMarkos Chandras
2015-02-17MIPS: kernel: elf: Improve the overall ABI and FPU mode checksMarkos Chandras
2015-02-17MIPS: asm: fpu: Allow 64-bit FPU on MIPS32 R6Markos Chandras
2015-02-17MIPS: kernel: process: Do not allow FR=0 on MIPS R6Markos Chandras
2015-02-17MIPS: Handle MIPS IV, V and R2 FPU instructions on MIPS R6 as wellMarkos Chandras
2015-02-17MIPS: Make use of the ERETNC instruction on MIPS R6Markos Chandras
2015-02-17MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6Leonid Yegoshin
2015-02-17MIPS: asm: mipsregs: Add support for the LLADDR registerMarkos Chandras
2015-02-17MIPS: Add LLB bit and related feature for the Config 5 CP0 registerMarkos Chandras
2015-02-17MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructionsMarkos Chandras
2015-02-17MIPS: Emulate the new MIPS R6 BEQZC and JIC instructionsMarkos Chandras
2015-02-17MIPS: Emulate the new MIPS R6 BALC instructionMarkos Chandras
2015-02-17MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructionsMarkos Chandras
2015-02-17MIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC instructionsMarkos Chandras
2015-02-17MIPS: Emulate the new MIPS R6 branch compact (BC) instructionMarkos Chandras
2015-02-17MIPS: Emulate the new MIPS R6 B{L,G}T{Z,}{AL,}C instructionsMarkos Chandras
2015-02-17MIPS: Emulate the new MIPS R6 B{L,G}Ε{Z,}{AL,}C instructionsMarkos Chandras
2015-02-17MIPS: Emulate the BC1{EQ,NE}Z FPU instructionsMarkos Chandras
2015-02-17MIPS: kernel: branch: Do not emulate the branch likelies on MIPS R6Markos Chandras
2015-02-17MIPS: kernel: Prepare the JR instruction for emulation on MIPS R6Markos Chandras
2015-02-17MIPS: mm: scache: Add secondary cache support for MIPS R6 coresMarkos Chandras
2015-02-17MIPS: mm: c-r4k: Set the correct ISA levelMarkos Chandras
2015-02-17MIPS: mm: tlbex: Use cpu_has_mips_r2_exec_hazard for the EHB instructionLeonid Yegoshin
2015-02-17MIPS: mm: page: Add MIPS R6 supportMarkos Chandras
2015-02-17MIPS: lib: memset: Add MIPS R6 supportLeonid Yegoshin
2015-02-17MIPS: lib: memcpy: Add MIPS R6 supportLeonid Yegoshin