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2020-04-20drm/i915: Flatten intel_dp_check_mst_status() a bitVille Syrjälä
Make intel_dp_check_mst_status() somewhat legible by humans. Note that the return value of drm_dp_mst_hpd_irq() is always either 0 or -ENOMEM, and we never did anything with the latter so we can just ignore the whole thing. We can also get rid of the direct drm_dp_mst_topology_mgr_set_mst(false) call since returning -EINVAL causes the caller to do the very same call for us. Cc: Lyude Paul <lyude@redhat.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200417152734.464-1-ville.syrjala@linux.intel.com Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-04-20drm/i915: Pass encoder all the way to intel_ddi_transcoder_func_reg_val_get()Ville Syrjälä
Pass the encoder all the way down to intel_ddi_transcoder_func_reg_val_get(). Allows us eliminate the intel_ddi_get_crtc_encoder() eyesore. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200417134720.16654-4-ville.syrjala@linux.intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Jani Nikula <jani.nikula@intel.com>
2020-04-20drm/i915: Push TRANS_DDI_FUNC_CTL into the encoder->enable() hookVille Syrjälä
Push the TRANS_DDI_FUNC_CTL into the encoder enable hook. The disable is already there, and as a followup will enable us to pass the encoder all the way down. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200417134720.16654-3-ville.syrjala@linux.intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Jani Nikula <jani.nikula@intel.com>
2020-04-20drm/i915: Move the TRANS_DDI_FUNC_CTL enable to a later pointVille Syrjälä
No reason that I can see why we should enable TRANS_DDI_FUNC_CTL before we set up the watermarks of configure the mbus stuff. In fact reordering these seems to match the bspec sequence better, and crucially will allow us to push the TRANS_DDI_FUNC_CTL enable into the encoder enable hook as a followup. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200417134720.16654-2-ville.syrjala@linux.intel.com Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Jani Nikula <jani.nikula@intel.com>
2020-04-20drm/i915: Pass encoder to intel_ddi_enable_pipe_clock()Ville Syrjälä
Since intel_ddi_enable_pipe_clock() was pushed down into the encoder hooks we can pass on the encoder instead of having to use intel_ddi_get_crtc_encoder(). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200417134720.16654-1-ville.syrjala@linux.intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Jani Nikula <jani.nikula@intel.com>
2020-04-20Make the "Reducing compressed framebufer size" message be DRM_INFO_ONCE()Peter Jones
This was sort of annoying me: random:~$ dmesg | tail -1 [523884.039227] [drm] Reducing the compressed framebuffer size. This may lead to less power savings than a non-reduced-size. Try to increase stolen memory size if available in BIOS. random:~$ dmesg | grep -c "Reducing the compressed" 47 This patch makes it DRM_INFO_ONCE() just like the similar message farther down in that function is pr_info_once(). Cc: stable@vger.kernel.org Signed-off-by: Peter Jones <pjones@redhat.com> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1745 Link: https://patchwork.freedesktop.org/patch/msgid/20180706190424.29194-1-pjones@redhat.com [vsyrjala: Rebase due to per-device logging] Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2020-04-20drm/i915/gt: Move the late flush_submission in retire to the endChris Wilson
Avoid flushing the submission queue (of others) under the client's timeline lock, but instead move it to the end so that we may catch more. References: https://gitlab.freedesktop.org/drm/intel/-/issues/1066 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200420125356.26614-2-chris@chris-wilson.co.uk
2020-04-20drm/i915/gem: Remove object_is_locked assertion from unpin_from_display_planeChris Wilson
Since moving the obj->vma.list to a spin_lock, and the vm->bound_list to its vm->mutex, along with tracking shrinkable status under its own spinlock, we no long require the object to be locked by the caller. This is fortunate as it appears we can be called with the lock along an error path in flipping: <4> [139.942851] WARN_ON(debug_locks && !lock_is_held(&(&((obj)->base.resv)->lock.base)->dep_map)) <4> [139.943242] WARNING: CPU: 0 PID: 1203 at drivers/gpu/drm/i915/gem/i915_gem_domain.c:405 i915_gem_object_unpin_from_display_plane+0x70/0x130 [i915] <4> [139.943263] Modules linked in: snd_hda_intel i915 vgem snd_hda_codec_realtek snd_hda_codec_generic coretemp snd_intel_dspcfg snd_hda_codec snd_hwdep snd_hda_core r8169 lpc_ich snd_pcm realtek prime_numbers [last unloaded: i915] <4> [139.943347] CPU: 0 PID: 1203 Comm: kms_flip Tainted: G U 5.6.0-gd0fda5c2cf3f1-drmtip_474+ #1 <4> [139.943363] Hardware name: /D510MO, BIOS MOPNV10J.86A.0311.2010.0802.2346 08/02/2010 <4> [139.943589] RIP: 0010:i915_gem_object_unpin_from_display_plane+0x70/0x130 [i915] <4> [139.943589] Code: 85 28 01 00 00 be ff ff ff ff 48 8d 78 60 e8 d7 9b f0 e2 85 c0 75 b9 48 c7 c6 50 b9 38 c0 48 c7 c7 e9 48 3c c0 e8 20 d4 e9 e2 <0f> 0b eb a2 48 c7 c1 08 bb 38 c0 ba 0a 01 00 00 48 c7 c6 88 a3 35 <4> [139.943589] RSP: 0018:ffffb774c0603b48 EFLAGS: 00010282 <4> [139.943589] RAX: 0000000000000000 RBX: ffff9a142fa36e80 RCX: 0000000000000006 <4> [139.943589] RDX: 000000000000160d RSI: ffff9a142c1a88f8 RDI: ffffffffa434a64d <4> [139.943589] RBP: ffff9a1410a513c0 R08: ffff9a142c1a88f8 R09: 0000000000000000 <4> [139.943589] R10: 0000000000000000 R11: 0000000000000000 R12: ffff9a1436ee94b8 <4> [139.943589] R13: 0000000000000001 R14: 00000000ffffffff R15: ffff9a1410960000 <4> [139.943589] FS: 00007fc73a744e40(0000) GS:ffff9a143da00000(0000) knlGS:0000000000000000 <4> [139.943589] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 <4> [139.943589] CR2: 00007fc73997e098 CR3: 000000002f5fe000 CR4: 00000000000006f0 <4> [139.943589] Call Trace: <4> [139.943589] intel_pin_and_fence_fb_obj+0x1c9/0x1f0 [i915] <4> [139.943589] intel_plane_pin_fb+0x3f/0xd0 [i915] <4> [139.943589] intel_prepare_plane_fb+0x13b/0x5c0 [i915] <4> [139.943589] drm_atomic_helper_prepare_planes+0x85/0x110 <4> [139.943589] intel_atomic_commit+0xda/0x390 [i915] <4> [139.943589] drm_atomic_helper_page_flip+0x9c/0xd0 <4> [139.943589] ? drm_event_reserve_init+0x46/0x60 <4> [139.943589] drm_mode_page_flip_ioctl+0x587/0x5d0 This completes the symmetry lost in commit 8b1c78e06e61 ("drm/i915: Avoid calling i915_gem_object_unbind holding object lock"). Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1743 Fixes: 8b1c78e06e61 ("drm/i915: Avoid calling i915_gem_object_unbind holding object lock") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Matthew Auld <matthew.auld@intel.com> Cc: Andi Shyti <andi.shyti@intel.com> Cc: <stable@vger.kernel.org> # v5.6+ Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200420125356.26614-1-chris@chris-wilson.co.uk
2020-04-20drm/i915/dpcd_bl: Unbreak enable_dpcd_backlight modparamLyude Paul
Looks like I accidentally made it so you couldn't force DPCD backlight support on, whoops. Fix that. Signed-off-by: Lyude Paul <lyude@redhat.com> Fixes: 17f5d57915be ("drm/i915: Force DPCD backlight mode on X1 Extreme 2nd Gen 4K AMOLED panel") Cc: Adam Jackson <ajax@redhat.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: "Ville Syrjälä" <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200413214407.1851002-1-lyude@redhat.com
2020-04-20drm/i915/audio: error log non-zero audio power refcount after unbindJani Nikula
We have some module unload/reload tests hitting an issue with i915 unbinding the component interface before the audio driver has properly put the power. Log an error about it for ease of debugging. (Normally this leads to a wakeref debug splat on the power well.) Cc: Kai Vehmanen <kai.vehmanen@linux.intel.com> Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200417065132.23048-1-jani.nikula@intel.com
2020-04-20drm/i915: fix Sphinx build duplicate label warningJani Nikula
Fix the warning caused by enabling the autosectionlabel extension in the kernel Sphinx build: Documentation/gpu/i915.rst:610: WARNING: duplicate label gpu/i915:layout, other instance in Documentation/gpu/i915.rst The autosectionlabel extension adds labels to each section title for cross-referencing, but forbids identical section titles in a document. With kernel-doc, this includes sections titles in the included kernel-doc comments. In the warning message, Sphinx is unable to reference the labels in their true locations in the kernel-doc comments in source. In this case, there's "Layout" sections in both gt/intel_workarounds.c and i915_reg.h. Rename the section in the latter to "File Layout". Fixes: 58ad30cf91f0 ("docs: fix reference to core-api/namespaces.rst") Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200417130109.12791-1-jani.nikula@intel.com
2020-04-18drm/i915: Refactor setting dma info to a common helperMichael J. Ruhl
DMA_MASK bit values are different for different generations. This will become more difficult to manage over time with the open coded usage of different versions of the device. Fix by: disallow setting of dma mask in AGP path (< GEN(5) for i915, add dma_mask_size to the device info configuration, updating open code call sequence to the latest interface, refactoring into a common function for setting the dma segment and mask info Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com> cc: Brian Welty <brian.welty@intel.com> cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200417195107.68732-1-michael.j.ruhl@intel.com
2020-04-18drm/i915: remove redundant assignment to variable test_resultColin Ian King
The variable test_result is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200417160829.112776-1-colin.king@canonical.com
2020-04-18drm/i915: Add ICL PG3 PW ID for EHLAnshuman Gupta
Gen11 onwards PG3 contains functions for pipe B, external displays, and VGA. Add missing ICL_DISP_PW_3 for ehl_power_wells. Cc: Animesh Manna <animesh.manna@intel.com> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1737 Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200417172835.15461-1-anshuman.gupta@intel.com
2020-04-17drm/i915/display: Load DP_TP_CTL/STATUS offset before use itJosé Roberto de Souza
Right now dp.regs.dp_tp_ctl/status are only set during the encoder pre_enable() hook, what is causing all reads and writes to those registers to go to offset 0x0 before pre_enable() is executed. So if i915 takes the BIOS state and don't do a modeset any following link retraing will fail. In the case that i915 needs to do a modeset, the DDI disable sequence will write to a wrong register not disabling DP 'Transport Enable' in DP_TP_CTL, making a HDMI modeset in the same port/transcoder to not light up the monitor. So here for GENs older than 12, that have those registers fixed at port offset range it is loading at encoder/port init while for GEN12 it will keep setting it at encoder pre_enable() and during HW state readout. Fixes: 4444df6e205b ("drm/i915/tgl: move DP_TP_* to transcoder") Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200414230442.262092-1-jose.souza@intel.com
2020-04-17drm/i915/tc: Do not warn when aux power well of static TC ports timeoutJosé Roberto de Souza
This is a expected timeout of static TC ports not conneceted, so not throwing warnings that would taint CI. v3: - moved checks to tc_phy_aux_timeout_expected() v4: - moved and add comments to tc_phy_aux_timeout_expected() v5: - only checking tc_legacy_port for TC ports Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200414194956.164323-8-jose.souza@intel.com
2020-04-17drm/i915/tc: Catch TC users accessing FIA registers without enable auxJosé Roberto de Souza
As described in "drm/i915/tc/icl: Implement TC cold sequences" users of TC functions should held aux power well during access to avoid read garbage due HW in TC cold state. v3: - renamed is_tc_cold_blocked() to assert_tc_cold_blocked() - restored the removed 0xffffffff checks Reviewed-by: Imre Deak <imre.deak@intel.com> Tested-by: You-Sheng Yang <vicamo.yang@canonical.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200414194956.164323-7-jose.souza@intel.com
2020-04-17drm/i915/tc/tgl: Implement TC cold sequencesJosé Roberto de Souza
TC ports can enter in TCCOLD to save power and is required to request to PCODE to exit this state before use or read to TC registers. For TGL there is a new MBOX command to do that with a parameter to ask PCODE to exit and block TCCOLD entry or unblock TCCOLD entry. So adding a new power domain to reuse the refcount and only allow TC cold when all TC ports are not in use. v2: - fixed missing case in intel_display_power_domain_str() - moved tgl_tc_cold_request to intel_display_power.c - renamed TGL_TC_COLD_OFF to TGL_TC_COLD_OFF_POWER_DOMAINS - added all TC and TBT aux power domains to TGL_TC_COLD_OFF_POWER_DOMAINS v3: - added one msec sleep when PCODE returns -EAGAIN - added timeout of 5msec to not loop forever if sandybridge_pcode_write_timeout() keeps returning -EAGAIN v4: - Made failure to block or unblock TC cold a error - removed 5msec timeout, instead giving PCODE 1msec by up 3 times to recover from the internal error v5: - only sleeping 1msec when ret is -EAGAIN BSpec: 49294 Cc: Imre Deak <imre.deak@intel.com> Cc: Cooper Chiou <cooper.chiou@intel.com> Cc: Kai-Heng Feng <kai.heng.feng@canonical.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200414194956.164323-6-jose.souza@intel.com
2020-04-17drm/i915/tc: Skip ref held check for TC legacy aux power wellsJosé Roberto de Souza
As part of ICL TC cold exit sequences we need to request aux power well before lock the access to TC ports, so skiping the intel_tc_port_ref_held() check for TC legacy ports. Reviewed-by: Imre Deak <imre.deak@intel.com> Tested-by: You-Sheng Yang <vicamo.yang@canonical.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200414194956.164323-5-jose.souza@intel.com
2020-04-17drm/i915/tc/icl: Implement TC cold sequencesJosé Roberto de Souza
This is required for legacy/static TC ports as IOM is not aware of the connection and will not trigger the TC cold exit. Just request PCODE to exit TCCOLD is not enough as it could enter again before driver makes use of the port, to prevent it BSpec states that aux powerwell should be held. So here embedding the TC cold exit sequence into ICL aux enable, it will enable aux and then request TC cold to exit. The TC cold block(exit and aux hold) and unblock was added to some exported TC functions for the others and to access PHY registers, callers should enable and keep aux powerwell enabled during access. Also adding TC cold check and warnig in tc_port_load_fia_params() as at this point of the driver initialization we can't request power wells, if we get this warning we will need to figure out how to handle it. v2: - moved ICL TC cold exit function to intel_display_power - using dig_port->tc_legacy_port to only execute sequences for legacy ports, hopefully VBTs will have this right - fixed check to call _hsw_power_well_continue_enable() - calling _hsw_power_well_continue_enable() unconditionally in icl_tc_phy_aux_power_well_enable(), if needed we will surpress timeout warnings of TC legacy ports - only blocking TC cold around fia access v3: - added timeout of 5msec to not loop forever if sandybridge_pcode_write_timeout() keeps returning -EAGAIN returning -EAGAIN in in icl_tc_cold_exit() - removed leftover tc_cold_wakeref - added one msec sleep when PCODE returns -EAGAIN v4: - removed 5msec timeout, instead giving 1msec to whoever is using PCODE to finish it up to 3 times - added a comment about turn TC cold exit failure as a error in future BSpec: 21750 Closes: https://gitlab.freedesktop.org/drm/intel/issues/1296 Cc: Imre Deak <imre.deak@intel.com> Cc: Cooper Chiou <cooper.chiou@intel.com> Cc: Kai-Heng Feng <kai.heng.feng@canonical.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200414194956.164323-4-jose.souza@intel.com
2020-04-17drm/i915/display: Split hsw_power_well_enable() into twoJosé Roberto de Souza
This is a preparation for ICL TC cold exit sequences. v2: - renamed new functions to hsw_power_well_enable_prepare()/complete() Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Tested-by: You-Sheng Yang <vicamo.yang@canonical.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200414194956.164323-3-jose.souza@intel.com
2020-04-17drm/i915/display: Add intel_legacy_aux_to_power_domain()José Roberto de Souza
This is a similar function to intel_aux_power_domain() but it do not care about TBT ports, this will be needed by ICL TC sequences. v2: - renamed to intel_legacy_aux_to_power_domain() Cc: Imre Deak <imre.deak@intel.com> Cc: Cooper Chiou <cooper.chiou@intel.com> Cc: Kai-Heng Feng <kai.heng.feng@canonical.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Tested-by: You-Sheng Yang <vicamo.yang@canonical.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200414194956.164323-2-jose.souza@intel.com
2020-04-17drm/i915/display: Move out code to return the digital_port of the aux chJosé Roberto de Souza
Moving the code to return the digital port of the aux channel also removing the intel_phy_is_tc() to make it generic. digital_port will be needed in icl_tc_phy_aux_power_well_enable() so adding it as a parameter to icl_tc_port_assert_ref_held(). While at at removing the duplicated call to icl_tc_phy_aux_ch() in icl_tc_port_assert_ref_held(). v2: - fixed build when DRM_I915_DEBUG_RUNTIME_PM is not set - moved to before hsw_wait_for_power_well_enable() as it will be needed by hsw_wait_for_power_well_enable() in a future patch v4: - fixed action of if (!dig_port), continue instead of return Cc: You-Sheng Yang <vicamo@gmail.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Tested-by: You-Sheng Yang <vicamo.yang@canonical.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200414194956.164323-1-jose.souza@intel.com
2020-04-17drm/i915: Add missing deinitialization cases of load failureJosé Roberto de Souza
The intel_display_power_put_async() used in TC cold sequences made easy to hit the missing deinitialization of driver in case of load failure as seen in the stack trace bellow. intel_modeset_driver_remove_noirq() had to be removed from i915_driver_modeset_remove_noirq() as those are different initialialition steps with IRQ and GEM initialization in between then. [drm:__intel_engine_init_ctx_wa [i915]] Initialized 3 context workarounds on rcs'0 [drm:__i915_inject_probe_error [i915]] Injecting failure -19 at checkpoint 36 [__uc_init:294] [drm:i915_hdcp_component_unbind [i915]] I915 HDCP comp unbind [drm:edp_panel_vdd_off_sync [i915]] Turning [ENCODER:275:DDI A] VDD off [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000060 [drm:intel_power_well_disable [i915]] disabling AUX A general protection fault, probably for non-canonical address 0x6b6b6b6b6b6b6b6b: 0000 [#1] PREEMPT SMP NOPTI CPU: 3 PID: 1142 Comm: kworker/u16:20 Tainted: G U 5.6.0-CI-Patchwork_17226+ #1 Hardware name: Intel Corporation Tiger Lake Client Platform/TigerLake U DDR4 SODIMM RVP, BIOS TGLSFWI1.R00.2457.A16.1912270059 12/27/2019 Workqueue: events_unbound intel_display_power_put_async_work [i915] RIP: 0010:__intel_display_power_put_domain+0xa5/0x180 [i915] Code: 48 85 c0 78 54 44 89 e1 41 bd 01 00 00 00 49 c7 c4 80 44 41 a0 49 d3 e5 eb 0d 48 83 eb 10 48 3b 9d 08 ad 00 00 78 32 48 8b 03 <4c> 85 68 10 74 ea 8b 53 08 85 d2 74 2d 83 ea 01 85 d2 89 53 08 75 RSP: 0018:ffffc9000061fdb0 EFLAGS: 00010206 RAX: 6b6b6b6b6b6b6b6b RBX: ffff8884948f5df0 RCX: 000000000000003d RDX: 0000000080000001 RSI: 0000000000000000 RDI: 0000000000000000 RBP: ffff888479be0000 R08: ffff88849a180920 R09: 0000000000000000 R10: 0000000000000000 R11: 0000000000000000 R12: ffffffffa0414480 R13: 2000000000000000 R14: ffff888479beb320 R15: 2000000000000000 FS: 0000000000000000(0000) GS:ffff88849ff80000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 00005634fa8ed670 CR3: 0000000005610004 CR4: 0000000000760ee0 PKRU: 55555554 Call Trace: release_async_put_domains+0x9b/0x110 [i915] intel_display_power_put_async_work+0x91/0xf0 [i915] process_one_work+0x260/0x600 ? worker_thread+0xc9/0x380 worker_thread+0x37/0x380 ? process_one_work+0x600/0x600 kthread+0x119/0x130 ? kthread_park+0x80/0x80 ret_from_fork+0x24/0x50 Modules linked in: i915(+) vgem snd_hda_codec_hdmi mei_hdcp x86_pkg_temp_thermal coretemp crct10dif_pclmul crc32_pclmul cdc_ether usbnet mii snd_intel_dspcfg ghash_clmulni_intel snd_hda_codec snd_hwdep snd_hda_core e1000e ptp mei_me snd_pcm pps_core mei intel_lpss_pci prime_numbers [last unloaded: i915] ---[ end trace b402d1b4060f8b97 ]--- BUG: sleeping function called from invalid context at kernel/sched/completion.c:99 in_atomic(): 0, irqs_disabled(): 0, non_block: 0, pid: 1142, name: kworker/u16:20 INFO: lockdep is turned off. Preemption disabled at: [<0000000000000000>] 0x0 CPU: 3 PID: 1142 Comm: kworker/u16:20 Tainted: G UD 5.6.0-CI-Patchwork_17226+ #1 Hardware name: Intel Corporation Tiger Lake Client Platform/TigerLake U DDR4 SODIMM RVP, BIOS TGLSFWI1.R00.2457.A16.1912270059 12/27/2019 Workqueue: events_unbound intel_display_power_put_async_work [i915] Call Trace: dump_stack+0x71/0x9b ___might_sleep+0x178/0x260 wait_for_completion+0x37/0x1a0 virt_efi_query_variable_info+0x161/0x1b0 efi_query_variable_store+0xb3/0x1a0 ? efivar_entry_set_safe+0x19c/0x220 efivar_entry_set_safe+0x19c/0x220 ? efi_pstore_write+0x10b/0x150 ? efi_pstore_write+0xa0/0x150 efi_pstore_write+0x10b/0x150 pstore_dump+0x123/0x340 kmsg_dump+0x87/0x1b0 oops_end+0x3e/0x90 do_general_protection+0x1c3/0x2f0 general_protection+0x2d/0x40 RIP: 0010:__intel_display_power_put_domain+0xa5/0x180 [i915] Code: 48 85 c0 78 54 44 89 e1 41 bd 01 00 00 00 49 c7 c4 80 44 41 a0 49 d3 e5 eb 0d 48 83 eb 10 48 3b 9d 08 ad 00 00 78 32 48 8b 03 <4c> 85 68 10 74 ea 8b 53 08 85 d2 74 2d 83 ea 01 85 d2 89 53 08 75 RSP: 0018:ffffc9000061fdb0 EFLAGS: 00010206 RAX: 6b6b6b6b6b6b6b6b RBX: ffff8884948f5df0 RCX: 000000000000003d RDX: 0000000080000001 RSI: 0000000000000000 RDI: 0000000000000000 RBP: ffff888479be0000 R08: ffff88849a180920 R09: 0000000000000000 R10: 0000000000000000 R11: 0000000000000000 R12: ffffffffa0414480 R13: 2000000000000000 R14: ffff888479beb320 R15: 2000000000000000 release_async_put_domains+0x9b/0x110 [i915] intel_display_power_put_async_work+0x91/0xf0 [i915] process_one_work+0x260/0x600 ? worker_thread+0xc9/0x380 worker_thread+0x37/0x380 ? process_one_work+0x600/0x600 kthread+0x119/0x130 ? kthread_park+0x80/0x80 ret_from_fork+0x24/0x50 ------------[ cut here ]------------ WARNING: CPU: 3 PID: 1142 at kernel/rcu/tree_plugin.h:293 rcu_note_context_switch+0x87/0x650 Modules linked in: i915(+) vgem snd_hda_codec_hdmi mei_hdcp x86_pkg_temp_thermal coretemp crct10dif_pclmul crc32_pclmul cdc_ether usbnet mii snd_intel_dspcfg ghash_clmulni_intel snd_hda_codec snd_hwdep snd_hda_core e1000e ptp mei_me snd_pcm pps_core mei intel_lpss_pci prime_numbers [last unloaded: i915] v2: - fixed handling in case of failure in drm_vblank_init() - moved i915_gem_driver_remove() call to before i915_driver_modeset_remove_noirq() this match initialization order too v3: - reverting call swap between i915_reset_error_state() and i915_gem_driver_remove() call order - improved label naming in i915_driver_modeset_probe_noirq() Closes: https://gitlab.freedesktop.org/drm/intel/issues/1647 Cc: Imre Deak <imre.deak@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200416185841.125686-1-jose.souza@intel.com
2020-04-17drm/i915/icl: Update forcewake firmware rangesRadhakrishna Sripada
Some workarounds are not sticking across suspend resume cycles. The forcewake ranges table has been updated and would reflect the hardware appropriately. Closes: https://gitlab.freedesktop.org/drm/intel/issues/1222 v2: Simplify the table and use 0 for some unused ranges(Matt) Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200416164610.15422-1-radhakrishna.sripada@intel.com
2020-04-17drm/i915/selftests: Check power consumption at min/max frequenciesChris Wilson
A basic premise of RPS is that at lower frequencies, not only do we run slower, but we save power compared to higher frequencies. For example, when idle, we set the minimum frequency just in case there is some residual current. Since the power curve should be a physical relationship, if we find no power saving it's likely that we've broken our frequency handling, so test! Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Andi Shyti <andi.shyti@intel.com> Reviewed-by: Andi Shyti <andi.shyti@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200417152018.13079-2-chris@chris-wilson.co.uk
2020-04-17drm/i915/selftests: Move gpu energy measurement into its own little libChris Wilson
Move the handy utility to measure the GPU energy consumption using RAPL msr into a common lib so that it can be reused easily. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Andi Shyti <andi.shyti@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200417152018.13079-1-chris@chris-wilson.co.uk
2020-04-17drm/i915: Add pre/post plane updates for SAGVStanislav Lisovskiy
Lets have a unified way to handle SAGV changes, espoecially considering the upcoming Gen12 changes. Current "standard" way of doing this in commit_tail is pre/post plane updates, when everything which has to be forbidden and not supported in new config has to be restricted before update and relaxed after plane update. v2: - Removed unneeded returns(Ville) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200415143911.10244-5-stanislav.lisovskiy@intel.com
2020-04-17drm/i915: Prepare to extract gen specific functions from intel_can_enable_sagvStanislav Lisovskiy
Addressing one of the comments, recommending to extract platform specific code from intel_can_enable_sagv as a preparation, before we are going to add support for tgl+. v2: - Removed whitespace v3: - Removed premature debug and new cycle introduction(Ville) - Added missing no active pipes check(Ville) v4: - Fixed stupid mistake with plane_state caused by stupid macro change Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200415145740.28241-1-stanislav.lisovskiy@intel.com
2020-04-17drm/i915: Add intel_atomic_get_bw_*_state helpersStanislav Lisovskiy
Add correspondent helpers to be able to get old/new bandwidth global state object. v2: - Fixed typo in function call v3: - Changed new functions naming to use convention proposed by Jani Nikula, i.e intel_bw_* in intel_bw.c file. v4: - Change function naming back to intel_atomic* pattern, was decided to rename in a separate patch series. v5: - Fix function naming to match existing practices(Ville) v6: - Removed spurious whitespace v7: - Removed bw_state NULL checks(Ville) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200415143911.10244-3-stanislav.lisovskiy@intel.com
2020-04-17drm/i915/selftests: Take the engine wakeref around __rps_up_interruptChris Wilson
Since we are touching the device to read the registers, we are required to ensure the device is awake at the time. Currently, we believe ourselves to be inside the active request [thus an active engine wakeref], but since that may be retired in the background, we can spontaneously lose the wakeref and the ability to probe the HW. <4> [379.686703] RPM wakelock ref not held during HW access <4> [379.686805] WARNING: CPU: 7 PID: 4869 at ./drivers/gpu/drm/i915/intel_runtime_pm.h:115 gen12_fwtable_read32+0x233/0x300 [i915] <4> [379.686808] Modules linked in: i915(+) vgem snd_hda_codec_hdmi mei_hdcp x86_pkg_temp_thermal coretemp crct10dif_pclmul crc32_pclmul ax88179_178a usbnet mii ghash_clmulni_intel snd_intel_dspcfg snd_hda_codec snd_hwdep snd_hda_core snd_pcm e1000e mei_me ptp mei pps_core intel_lpss_pci prime_numbers [last unloaded: i915] <4> [379.686827] CPU: 7 PID: 4869 Comm: i915_selftest Tainted: G U 5.7.0-rc1-CI-CI_DRM_8313+ #1 <4> [379.686830] Hardware name: Intel Corporation Tiger Lake Client Platform/TigerLake U DDR4 SODIMM RVP, BIOS TGLSFWI1.R00.2457.A13.1912190237 12/19/2019 <4> [379.686883] RIP: 0010:gen12_fwtable_read32+0x233/0x300 [i915] <4> [379.686887] Code: d8 ea e0 0f 0b e9 19 fe ff ff 80 3d ad 12 2d 00 00 0f 85 17 fe ff ff 48 c7 c7 b0 32 3e a0 c6 05 99 12 2d 00 01 e8 2d d8 ea e0 <0f> 0b e9 fd fd ff ff 8b 05 c4 75 56 e2 85 c0 0f 85 84 00 00 00 48 <4> [379.686889] RSP: 0018:ffffc90000727970 EFLAGS: 00010286 <4> [379.686892] RAX: 0000000000000000 RBX: ffff88848cc20ee8 RCX: 0000000000000001 <4> [379.686894] RDX: 0000000080000001 RSI: ffff88843b1f0900 RDI: 00000000ffffffff <4> [379.686896] RBP: 0000000000000000 R08: ffff88843b1f0900 R09: 0000000000000000 <4> [379.686898] R10: 0000000000000000 R11: 0000000000000000 R12: 000000000000a058 <4> [379.686900] R13: 0000000000000001 R14: ffff88848cc2bf30 R15: 00000000ffffffea <4> [379.686902] FS: 00007f7d63f5e300(0000) GS:ffff8884a0180000(0000) knlGS:0000000000000000 <4> [379.686904] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 <4> [379.686907] CR2: 000055e5c30f4988 CR3: 000000042e190002 CR4: 0000000000760ee0 <4> [379.686910] PKRU: 55555554 <4> [379.686911] Call Trace: <4> [379.686986] live_rps_interrupt+0xb14/0xc10 [i915] <4> [379.687051] ? intel_rps_unpark+0xb0/0xb0 [i915] <4> [379.687057] ? __trace_bprintk+0x57/0x80 <4> [379.687143] __i915_subtests+0xb8/0x210 [i915] <4> [379.687222] ? __i915_live_teardown+0x50/0x50 [i915] <4> [379.687291] ? __intel_gt_live_setup+0x30/0x30 [i915] <4> [379.687361] __run_selftests+0x112/0x170 [i915] <4> [379.687431] i915_live_selftests+0x2c/0x60 [i915] <4> [379.687491] i915_pci_probe+0x93/0x1b0 [i915] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Andi Shyti <andi.shyti@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200417093928.17822-2-chris@chris-wilson.co.uk
2020-04-17drm/i915/selftests: Delay spinner before waiting for an interruptChris Wilson
It seems that although (perhaps because of the memory stall?) the spinner has signaled that it has started, it still takes some time to spin up to 100% utilisation of the HW. Since the test depends on the full utilisation of the HW to trigger the RPS interrupt, wait a little bit and flush the interrupt status to be sure that the event we see if from the spinner. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Andi Shyti <andi.shyti@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200417093928.17822-1-chris@chris-wilson.co.uk
2020-04-17drm/i915/gt: Scrub execlists state on resumeChris Wilson
Before we resume, we reset the HW so we restart from a known good state. However, as a part of the reset process, we drain our pending CS event queue -- and if we are resuming that does not correspond to internal state. On setup, we are scrubbing the CS pointers, but alas only on setup. Apply the sanitization not just to setup, but to all resumes. Reported-by: Venkata Ramana Nayana <venkata.ramana.nayana@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Venkata Ramana Nayana <venkata.ramana.nayana@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200416114117.3460-1-chris@chris-wilson.co.uk
2020-04-17drm/i915/display: Enable DP Display Audio WAUma Shankar
For certain DP VDSC bpp settings, hblank asserts before hblank_early, leading to a bad audio state. Driver need to program "hblank early enable" and "samples per line" parameters in AUDIO_CONFIG_BE register. This is Display Audio WA #1406928334 for 4k+VDSC usecase applicable on DP encoders. Implemented the same. v2: Fixed build failures on 32bit machine. v3: Dropped u64, added helpers for sample room calculation, other general comments as per Jani Nikula's feedback. Also fixed connector type check (spotted by Anshuman) v4: Addressed Jani Nikula and Kai's review comments. v5: Addressed Anshuman's review comment and used crtc_* variable to get timings. v6: Dropped a redundant initialization. Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200416105419.9664-1-uma.shankar@intel.com
2020-04-17drm/i915: Add i915_lpsp_status debugfs attributeAnshuman Gupta
It requires a separate debugfs attribute to expose lpsp status to user space, as there may be display less configuration without any valid connected output, those configuration will not be able to test lpsp status, if lpsp status exposed from a connector based debugfs attribute. Reviewed-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200415170555.15531-5-anshuman.gupta@intel.com
2020-04-17drm/i915: Add connector dbgfs for all connectorsAnshuman Gupta
Add connector debugfs attributes for each intel connector which is getting register. v2: - adding connector debugfs for each connector in intel_connector_register() to fix CI failure for legacy connectors. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200415170555.15531-4-anshuman.gupta@intel.com
2020-04-17drm/i915: Add i915_lpsp_capability debugfsAnshuman Gupta
New i915_pm_lpsp igt solution approach relies on connector specific debugfs attribute i915_lpsp_capability, it exposes whether an output is capable of driving lpsp. v2: - CI fixup. v3: - register i915_lpsp_info only for supported connector. [Jani] - use intel_display_power_well_is_enabled() instead of looking inside power_well count. [Jani] - fixes the lpsp capable conditional logic. [Jani] - combined the lpsp capable and enable info. [Jani] v4: - Separate out connector based debugfs i915_lpsp_capability lpsp enable status would be exposes by different entry. [Animesh] v5: - Add Platform Gen condition to add i915_lpsp_capability and some cosmetic nitpick changes. [Animesh] Reviewed-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200415170555.15531-3-anshuman.gupta@intel.com
2020-04-17drm/i915: Power well id for ICL PG3Anshuman Gupta
Gen11 onwards PG3 is contains functions for pipe B, external displays, and VGA. It make sense to add a power well id with name ICL_DISP_PW_3 rather then TGL_DISP_PW_3, Also PG3 power well id requires to know if lpsp is enabled. Reviewed-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200415170555.15531-2-anshuman.gupta@intel.com
2020-04-17drm/i915: Update DRIVER_DATE to 20200417Joonas Lahtinen
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2020-04-16drm/i915/tgl: TBT AUX should use TC power well opsMatt Roper
As on ICL, we want to use the Type-C aux handlers for the TBT aux wells to ensure the DP_AUX_CH_CTL_TBT_IO flag is set properly. Fixes: 656409bbaf87 ("drm/i915/tgl: Add power well support") Cc: José Roberto de Souza <jose.souza@intel.com> Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200415233435.3064257-1-matthew.d.roper@intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2020-04-16Merge tag 'topic/phy-compliance-2020-04-08' of ↵Joonas Lahtinen
git://anongit.freedesktop.org/drm/drm-misc into drm-intel-next-queued Topic pull request for topic/phy-compliance: - Standardize DP_PHY_TEST_PATTERN name. - Add support for setting/getting test pattern from sink. - Implement DP PHY compliance to i915. From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/efb3d0d9-2cf7-046b-3a9b-2548d086258e@linux.intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2020-04-16Merge drm/drm-next into drm-intel-next-queuedJoonas Lahtinen
Backmerging in order to pull "topic/phy-compliance". Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2020-04-16drm/i915: HDCP: fix Ri prime check done during link checkOliver Barta
The check was always succeeding even in case of a mismatch due to the HDCP_STATUS_ENC bit being set. Make sure both bits are actually set. Signed-off-by: Oliver Barta <oliver.barta@aptiv.com> Fixes: 2320175feb74 ("drm/i915: Implement HDCP for HDMI") Reviewed-by: Ramalingam C <ramalingam.c@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200328104100.12162-1-oliver.barta@aptiv.com
2020-04-16drm/i915: Add YUV444 packed format support for skl+Stanislav Lisovskiy
PLANE_CTL_FORMAT_AYUV is already supported, according to hardware specification. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200407215546.5445-2-bob.j.paauwe@intel.com
2020-04-16drm/i915/gt: Update PMINTRMSK holding fwChris Wilson
If we use a non-forcewaked write to PMINTRMSK, it does not take effect until much later, if at all, causing a loss of RPS interrupts and no GPU reclocking, leaving the GPU running at the wrong frequency for long periods of time. Reported-by: Francisco Jerez <currojerez@riseup.net> Suggested-by: Francisco Jerez <currojerez@riseup.net> Fixes: 35cc7f32c298 ("drm/i915/gt: Use non-forcewake writes for RPS") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Francisco Jerez <currojerez@riseup.net> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Andi Shyti <andi.shyti@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Andi Shyti <andi.shyti@intel.com> Reviewed-by: Francisco Jerez <currojerez@riseup.net> Cc: <stable@vger.kernel.org> # v5.6+ Link: https://patchwork.freedesktop.org/patch/msgid/20200415170318.16771-2-chris@chris-wilson.co.uk
2020-04-16drm/i915/selftests: Exercise basic RPS interrupt generationChris Wilson
Since we depend upon RPS generating interrupts after evaluation intervals to determine when to up/down clock the GPU, it is imperative that we successfully enable interrupt generation! Verify that we do see an interrupt if we keep the GPU busy for an entire EI. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Andi Shyti <andi.shyti@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200415170318.16771-1-chris@chris-wilson.co.uk
2020-04-15drm/i915/tgl: Initialize multicast register steering for workaroundsMatt Roper
Even though the bspec is missing gen12 register details for the MCR selector register (0xFDC), this is confirmed by hardware folks to be a mistake; the register does exist and we do indeed need to steer multicast register reads to an appropriate instance the same as we did on gen11. Note that despite the lack of documentation we were still using the MCR selector to read INSTDONE and such in read_subslice_reg() too. Cc: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200414211118.2787489-4-matthew.d.roper@intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2020-04-15drm/i915/tgl: Extend Wa_1409767108:tgl to B0 steppingMatt Roper
Cc: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200414211118.2787489-2-matthew.d.roper@intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2020-04-15drm/i915/tgl: Add Wa_14010477008:tglMatt Roper
Media decompression support should not be advertised on any display planes for steppings A0-C0. Bspec: 53273 Fixes: 2dfbf9d2873a ("drm/i915/tgl: Gen-12 display can decompress surfaces compressed by the media engine") Cc: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200414211118.2787489-3-matthew.d.roper@intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2020-04-15drm/i915/ehl: extended Wa_2006604312 to ehlMatt Atwood
Reflect recent bspec changes. Bspec: 33451 Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200413175322.12162-1-matthew.s.atwood@intel.com Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-21 15:31:56 +0000