Age | Commit message (Collapse) | Author |
|
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/drivers
Yaml conversion of grf, pmu and power-domain bindings,
Power-domains for rk3568 + necessary plumbing,
Fixes for the usbphy bindings.
* tag 'v5.14-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
dt-bindings: soc: rockchip: drop unnecessary #phy-cells from grf.yaml
dt-bindings: soc: rockchip: grf: add compatible for RK3308 USB grf
dt-bindings: phy: rename phy nodename in phy-rockchip-inno-usb2.yaml
dt-bindings: soc: rockchip: convert grf.txt to YAML
soc: rockchip: power-domain: add rk3568 powerdomains
dt-bindings: power: rockchip: Add bindings for RK3568 Soc
dt-bindings: power: rockchip: Convert to json-schema
dt-bindings: arm: rockchip: add more compatible strings to pmu.yaml
dt-bindings: arm: rockchip: convert pmu.txt to YAML
soc: rockchip: power-domain: Add a meaningful power domain name
dt-bindings: add power-domain header for RK3568 SoCs
Link: https://lore.kernel.org/r/4647955.GXAFRqVoOG@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/drivers
mvebu drivers for 5.14 (part 1)
Make the turris mox rwtm firmware more generic for Armada 3700 SoCs
* tag 'mvebu-drivers-5.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string
Link: https://lore.kernel.org/r/87bl802a2d.fsf@BL-laptop
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/drivers
mvebu fixes for 5.13 (part 1)
Few fixes for the Turris Mox rWTM firmware found on the Armada 3700
SoCs.
* tag 'mvebu-fixes-5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
firmware: turris-mox-rwtm: show message about HWRNG registration
firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng
firmware: turris-mox-rwtm: report failures better
firmware: turris-mox-rwtm: fix reply status decoding function
Link: https://lore.kernel.org/r/87eecx0w6s.fsf@BL-laptop
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
arm/drivers
Reset controller updates for v5.14, part2
This tag contains a few small fixes, allows to build the Berlin reset
driver as a module, and adds stubs to the reset controller API to allow
compile-testing drivers outside of drivers/reset without enabling the
reset framework.
* tag 'reset-for-v5.14-2' of git://git.pengutronix.de/pza/linux:
reset: Add compile-test stubs
reset: berlin: support module build
reset: bail if try_module_get() fails
reset: mchp: sparx5: fix return value check in mchp_sparx5_map_io()
reset: lantiq: use devm_reset_controller_register()
reset: hi6220: Use the correct HiSilicon copyright
Link: https://lore.kernel.org/r/14d33ac19b2a107e97ce1ab264987b707baa9ba7.camel@pengutronix.de
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
string
Add more generic compatible string 'marvell,armada-3700-rwtm-firmware' for
this driver, since it can also be used on other Armada 3720 devices.
Current compatible string 'cznic,turris-mox-rwtm' is kept for backward
compatibility.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
|
|
Currently it is hard to determinate if on Armada 3720 device is HWRNG
by running kernel accessible or not. So print information message into
dmesg when HWRNG is available and registration was successful.
Fixes: 389711b37493 ("firmware: Add Turris Mox rWTM firmware driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
|
|
When Marvell's rWTM firmware, which does not support the GET_RANDOM
command, is used, kernel prints an error message
hwrng: no data available
every 10 seconds.
Fail probing of this driver if the rWTM firmware does not support the
GET_RANDOM command.
Fixes: 389711b37493 ("firmware: Add Turris Mox rWTM firmware driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
|
|
Report a notice level message if a command is not supported by the rWTM
firmware.
This should not be an error, merely a notice, because the firmware can
be used on boards that do not have manufacturing information burned.
Fixes: 389711b37493 ("firmware: Add Turris Mox rWTM firmware driver")
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
|
|
The status decoding function mox_get_status() currently contains an
incorrect check: if the error status is not MBOX_STS_SUCCESS, it always
returns -EIO, so the comparison to MBOX_STS_FAIL is never executed and
we don't get the actual error code sent by the firmware.
Fix this.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Fixes: 389711b37493 ("firmware: Add Turris Mox rWTM firmware driver")
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.14 - Tegra SoC, part two
Second set of changes for Tegra SoC memory controller drivers,
containing patchset from Thierry Reding:
"The goal here is to avoid early identity mappings altogether and instead
postpone the need for the identity mappings to when devices are attached
to the SMMU. This works by making the SMMU driver coordinate with the
memory controller driver on when to start enforcing SMMU translations.
This makes Tegra behave in a more standard way and pushes the code to
deal with the Tegra-specific programming into the NVIDIA SMMU
implementation."
This pulls a dependency from Will Deacon (ARM SMMU driver) and contains
further ARM SMMU driver patches to resolve complex dependencies between
different patchsets. The pull from Will contains only one patch
("Implement ->probe_finalize()"). Further work in Will's tree might
depend on this patch, therefore patch was applied there.
On the other hand, this ("Implement ->probe_finalize()") patch is also a
dependency for ARM SMMU driver changes for Tegra. These changes,
bringing seamless transition from the firmware framebuffer to the OS
framebuffer, depend on earlier Tegra memory controller driver patches.
* tag 'memory-controller-drv-tegra-5.14-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: (37 commits)
iommu/arm-smmu: Use Tegra implementation on Tegra186
iommu/arm-smmu: tegra: Implement SID override programming
iommu/arm-smmu: tegra: Detect number of instances at runtime
dt-bindings: arm-smmu: Add Tegra186 compatible string
memory: tegra: Delete dead debugfs checking code
iommu/arm-smmu: Implement ->probe_finalize()
memory: tegra: Implement SID override programming
memory: tegra: Split Tegra194 data into separate file
memory: tegra: Add memory client IDs to tables
memory: tegra: Unify drivers
memory: tegra: Only initialize reset controller if available
memory: tegra: Make IRQ support opitonal
memory: tegra: Parameterize interrupt handler
memory: tegra: Extract setup code into callback
memory: tegra: Make per-SoC setup more generic
memory: tegra: Push suspend/resume into SoC drivers
memory: tegra: Introduce struct tegra_mc_ops
memory: tegra: Unify struct tegra_mc across SoC generations
memory: tegra: Consolidate register fields
memory: tegra30-emc: Use devm_tegra_core_dev_init_opp_table()
...
Link: https://lore.kernel.org/r/20210614195200.21657-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers
Arm Firmware Framework for ARMv8-A(FFA) interface driver
The Arm FFA specification describes a software architecture to
leverages the virtualization extension to isolate software images
provided by an ecosystem of vendors from each other and describes
interfaces that standardize communication between the various software
images including communication between images in the Secure world and
Normal world. Any Hypervisor could use the FFA interfaces to enable
communication between VMs it manages.
The Hypervisor a.k.a Partition managers in FFA terminology can assign
system resources(Memory regions, Devices, CPU cycles) to the partitions
and manage isolation amongst them.
This is the initial and minimal support for the FFA interface to enable
communication between secure partitions and the normal world OS.
* tag 'arm-ffa-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: arm_ffa: Add support for MEM_* interfaces
firmware: arm_ffa: Setup in-kernel users of FFA partitions
firmware: arm_ffa: Add support for SMCCC as transport to FFA driver
firmware: arm_ffa: Add initial Arm FFA driver support
firmware: arm_ffa: Add initial FFA bus support for device enumeration
arm64: smccc: Add support for SMCCCv1.2 extended input/output registers
Link: https://lore.kernel.org/r/20210601095838.GA838783@bogus
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
firmware: tegra: Changes for v5.14-rc1
These changes contain two minor fixes for the Tegra BPMP driver.
* tag 'tegra-for-5.14-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
firmware: tegra: bpmp: Fix Tegra234-only builds
firmware: tegra: Fix error return code in tegra210_bpmp_init()
Link: https://lore.kernel.org/r/20210611164437.3568059-3-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for v5.14
In addition to fixing a kerneldoc issue in the qcom-ebi2 driver this
populates socinfo with a range of platforms and PMICs and extends a few
of the Qualcomm drivers bits of support for MSM8226, MDM9607, SM6125 and
SC8180X.
* tag 'qcom-drivers-for-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
firmware: qcom_scm: Add MDM9607 compatible
soc: qcom: rpmpd: Add MDM9607 RPM Power Domains
soc: qcom: smd-rpm: Add MSM8226 compatible
dt-bindings: soc: qcom: smd-rpm: Add MSM8226 compatible
soc: qcom: socinfo: import PMIC IDs from pmic-spmi
bus: qcom-ebi2: Fix incorrect documentation for '{slow,fast}_cfg'
soc: qcom: socinfo: Add more IDs
soc: qcom: rpmhpd: Add SC8180X
dt-bindings: power: rpmpd: Add SC8180X to rpmpd binding
dt-bindings: soc: qcom: smd-rpm: Document SM6125 compatible
soc: qcom: smd-rpm: Add SM6125 compatible
soc: qcom: socinfo: Add remaining IPQ6018 family ID-s
soc: qcom: socinfo: Add missing SoC ID for SM6125
Link: https://lore.kernel.org/r/20210614223727.393159-1-bjorn.andersson@linaro.org
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.14:
- A patch series from Lucas Stach and Peng Fan adding i.MX8MM power
domains support into i.MX GPCv2 driver.
- A couple of patches from Adam Ford adding i.MX8MN power domains on top
of i.MX8MM power domain support.
* tag 'imx-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: gpcv2: add support for i.MX8MN power domains
dt-bindings: add defines for i.MX8MN power domains
soc: imx: gpcv2: move reset assert after requesting domain power up
soc: imx: gpcv2: Add support for missing i.MX8MM VPU/DISPMIX power domains
soc: imx: gpcv2: add support for i.MX8MM power domains
dt-bindings: power: add defines for i.MX8MM power domains
soc: imx: gpcv2: add support for optional resets
soc: imx: gpcv2: allow domains without power-sequence control
soc: imx: gpcv2: add runtime PM support for power-domains
soc: imx: gpcv2: wait for ADB400 handshake
soc: imx: gpcv2: split power up and power down sequence control
soc: imx: gpcv2: switch to clk_bulk_* API
soc: imx: gpcv2: move domain mapping to domain driver probe
soc: imx: gpcv2: move to more ideomatic error handling in probe
Link: https://lore.kernel.org/r/20210613082544.16067-1-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers
SOC: Keystone driver update for v5.13
Couple of cleanup fixes in PM AVS and WKUP M3 drivers
* tag 'drivers_soc_for_5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
soc: ti: wkup_m3_ipc: Remove redundant error printing in wkup_m3_ipc_probe()
PM: AVS: remove redundant dev_err call in omap_sr_probe()
Link: https://lore.kernel.org/r/1623564105-10273-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.14 - PL353
Bigger work around ARM Primecell PL35x SMC memory controller driver by
Miquel Raynal built on previous series from Naga Sureshkumar Relli.
This includes bindings cleanup and correction, converting these to
dtschema and several cleanyps in pl353-smc driver.
* tag 'memory-controller-drv-pl353-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
dt-binding: memory: pl353-smc: Convert to yaml
MAINTAINERS: Add PL353 SMC entry
memory: pl353-smc: Declare variables following a reverse christmas tree order
memory: pl353-smc: Avoid useless acronyms in descriptions
memory: pl353-smc: Let lower level controller drivers handle inits
memory: pl353-smc: Rename goto labels
memory: pl353-smc: Fix style
dt-binding: memory: pl353-smc: Fix the NAND controller node in the example
dt-binding: memory: pl353-smc: Drop unsupported nodes from the example
dt-binding: memory: pl353-smc: Fix the example syntax and style
dt-binding: memory: pl353-smc: Describe the child reg property
dt-binding: memory: pl353-smc: Drop the partitioning section
dt-binding: memory: pl353-smc: Document the range property
dt-binding: memory: pl353-smc: Rephrase the binding
Link: https://lore.kernel.org/r/20210611140659.61980-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.14
Several small fixes and cleanups for stm32, atmel, pl353, renesas-rpc,
TI emif and fsl_ifc.
* tag 'memory-controller-drv-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
memory: emif: remove unused frequency and voltage notifiers
memory: fsl_ifc: fix leak of private memory on probe failure
memory: fsl_ifc: fix leak of IO mapping on probe failure
MAINTAINERS: memory: cover also header file
memory: renesas-rpc-if: correct whitespace
memory: pl353: Fix error return code in pl353_smc_probe()
memory: atmel-ebi: add missing of_node_put for loop iteration
memory: stm32-fmc2-ebi: add missing of_node_put for loop iteration
Link: https://lore.kernel.org/r/20210611140659.61980-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers
devapc:
- add missing MODULE_DEVICE_TABLE to fix modalias
mkt-pm-domains:
- register smi node as regmap and not as syscon
- prepare-enable and unprepare-disable dependent clocks
pwrap:
- add support for MT8195
* tag 'v5.13-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
soc: mediatek: pwrap: add pwrap driver for MT8195 SoC
dt-bindings: mediatek: add compatible for MT8195 pwrap
soc: mtk-pm-domains: Fix the clock prepared issue
soc: mtk-pm-domains: do not register smi node as syscon
soc: mediatek: add missing MODULE_DEVICE_TABLE
Link: https://lore.kernel.org/r/479ec9ad-95d3-ce91-8243-63596c4c6676@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers
Renesas driver updates for v5.14
- Initial support for the new RZ/G2L SoC variants.
* tag 'renesas-drivers-for-v5.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
Link: https://lore.kernel.org/r/cover.1623403800.git.geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers
ARM SCMI updates for v5.14
- Support for SCMI clocks from the SCMI power domains
- Addition of checks for correct compatibles for shmem devicetree nodes
that were found missing in the process of YAML schema conversion
- Kconfig and associated build fix found when optee transport are being
worked on
- Couple of fixes and cleanups found as with work-in-progress virtio
transport support
The new transports(optee and virtio) themselves are still being worked on
with ongoing reviews, they are not part of this yet
* tag 'scmi-updates-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: arm_scmi: Avoid multiple initialisations of hdr->protocol_id
firmware: arm_scmi: Move reinit_completion from scmi_xfer_get to do_xfer
firmware: arm_scmi: Add delayed response status check
firmware: arm_scmi: Add compatibility checks for shmem node
firmware: arm_scpi: Add compatibility checks for shmem node
firmware: arm_scmi: Fix the build when CONFIG_MAILBOX is not selected
firmware: arm_scmi: Reset Rx buffer to max size during async commands
firmware: arm_scmi: Add SMCCC discovery dependency in Kconfig
firmware: arm_scmi: Add clock management to the SCMI power domain
Link: https://lore.kernel.org/r/20210611075722.2813550-1-sudeep.holla@arm.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
into arm/drivers
This pull request contains Broadcom SoCs drivers changes for 5.14,
please pull the following:
- Jiapeng removes an unused variable in the Broadcom STB BIU driver
causing an unused warning.
* tag 'arm-soc/for-5.14/drivers' of https://github.com/Broadcom/stblinux:
soc: bcm: brcmstb: remove unused variable 'brcmstb_machine_match'
Link: https://lore.kernel.org/r/20210610194836.309869-3-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/drivers
Amlogic Drivers updates for v5.14:
- soc: amlogic: meson-ee-pwrc: Rename "get_power" to "is_powered_off"
* tag 'amlogic-drivers-for-v5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
soc: amlogic: meson-ee-pwrc: Rename "get_power" to "is_powered_off"
Link: https://lore.kernel.org/r/58283600-2d9a-c259-4d80-6915e6e6c79e@baylibre.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
arm/drivers
Reset controller updates for v5.14
This tag adds support for the Microchip Sparx5 Switch Reset controller
and contains some small fixes and cleanups in core and various drivers.
* tag 'reset-for-v5.14' of git://git.pengutronix.de/pza/linux:
reset: brcmstb: Add missing MODULE_DEVICE_TABLE
reset: a10sr: add missing of_match_table reference
reset: RESET_INTEL_GW should depend on X86
reset: RESET_BRCMSTB_RESCAL should depend on ARCH_BRCMSTB
reset: uniphier: enclose UNIPHIER_RESET_ID_END value in parentheses
reset: sti/syscfg: replace comma with semicolon
reset: ti-syscon: fix to_ti_syscon_reset_data macro
reset: berlin: replace unsigned with unsigned int
reset: whitespace fixes
reset: mchp: sparx5: add switch reset driver
dt-bindings: reset: microchip sparx5 reset driver bindings
reset: oxnas: replace file name with short description
reset: zynqmp: replace spaces with tabs
reset: bcm6345: Make reset_control_ops const
Link: https://lore.kernel.org/r/418cf3a460cfe1d0f91f87e10baaf478bd41f1d5.camel@pengutronix.de
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
This adds support for the power domains founds on i.MX8MN. The Nano
has fewer domains than the Mini, and the access to some of these domains
is different than that of the Mini, the Mini power domains cannot be
reused.
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
The i.MX8M Nano has a similar power domain controller to that of the
mini, but it isn't fully compatible, so it needs a separate binding
and power domain tables.
Add the bindings and tables.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
The tegra186_bpmp_ops symbol is used on Tegra234, so make sure it's
available.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Tegra186 requires the same SID override programming as Tegra194 in order
to seamlessly transition from the firmware framebuffer to the Linux
framebuffer, so the Tegra implementation needs to be used on Tegra186
devices as well.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-7-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
The secure firmware keeps some SID override registers set as passthrough
in order to allow devices such as the display controller to operate with
no knowledge of SMMU translations until an operating system driver takes
over. This is needed in order to seamlessly transition from the firmware
framebuffer to the OS framebuffer.
Upon successfully attaching a device to the SMMU and in the process
creating identity mappings for memory regions that are being accessed,
the Tegra implementation will call into the memory controller driver to
program the override SIDs appropriately.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-6-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
Parse the reg property in device tree and detect the number of instances
represented by a device tree node. This is subsequently needed in order
to support single-instance SMMUs with the Tegra implementation because
additional programming is needed to properly configure the SID override
registers in the memory controller.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-5-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
The ARM SMMU instantiations found on Tegra186 and later need inter-
operation with the memory controller in order to correctly program
stream ID overrides.
Furthermore, on Tegra194 multiple instances of the SMMU can gang up
to achieve higher throughput. In order to do this, they have to be
programmed identically so that the memory controller can interleave
memory accesses between them.
Add the Tegra186 compatible string to make sure the interoperation
with the memory controller can be enabled on that SoC generation.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-3-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/will/linux into for-v5.14/tegra-mc
Pull ARM SMMU driver change from Will Deacon to resolve dependencies
between memory controllers, Tegra ARM SoC and ARM SMMU drivers trees.
Further ARM SMMU changes for Tegra depend on the change in Will's tree
and on Tegra memory controllers drivers work done before by Thierry
Reding. Pulling Will's tree allows to apply the rest of this ARM SMMU
Tegra work via memory controllers drivers tree.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
Convert this binding file to yaml schema.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-10-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
Add a compatible for MDM9607. It uses the "legacy" calling
convention.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013058.54299-1-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
This SoC while being from 8916 era, makes use of the
newer-style, floor-level management, instead of the older
floor-corner.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013233.54666-1-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Add Naga from Xilinx and myself responsible of this driver.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-16-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
This is a purely cosmetic change.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-15-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
APER does not mean anything, while it seems legitimate to call this
clock the AXI peripheral clock.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-14-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
There is no point in having all these definitions at the SMC bus level,
these are extremely tight to the NAND controller driver implementation,
are not particularly generic, imply more boilerplate than needed, do
not really follow the device model by receiving no argument and some of
them are actually buggy.
Let's get rid of these right now as there is no current user and keep
this driver at a simple level: only the SMC bare initializations.
The NAND controller driver which I am going to introduce will take care
of redefining properly all these helpers and using them directly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-13-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
A goto label is better named
do_something:
than
out_something_to_do:
Use the former wording and really describe what the jump involves.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-12-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
Use proper spacing.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-11-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
To be fully valid, the NAND controller node in the example should be
named nand-controller instead of flash, should be at the address @0,0
instead of @e1000000 and should have a couple of:
- #address-cells
- #size-cells
properties.
The label is being renamed nfc0 as well which is more usual than nand_0.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-8-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
These nodes are given as examples and are not described nor used
anywhere else. There is also no hardware of my knowledge compatible with
these yet. If we want to be backward compatible, then we should avoid
partially describing nodes and their content while there are no users.
Plus, the examples are wrong (the addresses should be updated) so
let's drop them before converting this file to yaml (only the NAND node,
which will be fixed in the example and described somewhere else is
kept).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-7-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
Enhance the spacing, the comment style, add { }, remove (...).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-6-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
Each chil node should have a reg property, no matter the type of
controller (NAND, NOR, SRAM). This should be part of the bindings.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-5-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
This sentence does not belong to this file as this file describes the
bus on which various controllers are wired to.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-4-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
The ranges property is missing in the description while actually used in
the example. This property is actually needed, so mention it.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-3-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
Reword this document before converting it to yaml.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-2-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
Add support for reading the LSI DEVID register which is present in
SYSC block of RZ/G2{L,LC} SoC's.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210609163717.3083-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
|
Add ARCH_R9A07G044 as a configuration symbol for the new Renesas
RZ/G2L SoC variants.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210609153230.6967-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
|
The recent yaml conversion of the grf and inno-usb2-phy bindings
left the #phy-cells in place in the main usb2phy node inside the
example in grf.yaml, causing new warnings.
Drop it to make the bindingcheck happy.
Fixes: e71ccdff376b ("dt-bindings: phy: rename phy nodename in phy-rockchip-inno-usb2.yaml")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20210607141845.3331910-1-heiko@sntech.de
|