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2018-03-13usb: dwc2: core: Add hibernated flagVardan Mikayelyan
Added a flag to indicate that core is in hibernation, it is used to determine the hibernation state of the core. Signed-off-by: Vardan Mikayelyan <mvardan@synopsys.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: gadget: Fix dwc2_restore_device_registersVardan Mikayelyan
Add parameter remote_wakeup to dwc2_restore_device_registers() to be able to restore device registers according to programming guide for dwc-otg. It says that in case of rem_wakeup DCTL must not be restored here. Remove setting of DCTL_PWRONPRGDONE from this function, because it will be done in function responsible for exiting from hibernation. WA for enabled EPx's IN and OUT in DDMA mode. On entering to hibernation wrong value read and saved from DIEPDMAx, as result BNA interrupt asserted on hibernation exit by restoring from saved area. Signed-off-by: Vardan Mikayelyan <mvardan@synopsys.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Artur Petrosyan <arturp@synopsys.com> Signed-off-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: gadget: Moved dtxfsiz backup array placeVardan Mikayelyan
Moved dtxfsiz from dwc2_gregs_backup to dwc2_dregs_backup, because it is device register. Signed-off-by: Vardan Mikayelyan <mvardan@synopsys.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Add hibernation field into dwc2_hw_paramsVardan Mikayelyan
Add parameter and it's initialization, needed for hibernation. Reimplement dwc2_set_param_power_down() to support hibernation too. Now 'power_down' parameter can be initialized with 0, 1 or 2. 0 - No 1 - Partial power down 2 - Hibernation Signed-off-by: Vardan Mikayelyan <mvardan@synopsys.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Rename hibernation to partial_power_downVardan Mikayelyan
No-op change, only rename. This code was misnamed originally. It was only responsible for partial power down and not for hibernation. Rename core_params->hibernation to core_params->power_down, dwc2_set_param_hibernation() to dwc2_set_param_power_down(). Signed-off-by: Vardan Mikayelyan <mvardan@synopsys.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Enable LPMJohn Youn
Set 'lpm_capable' flag in the gadget structure so indicating that LPM is supported. Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Sevak Arakelyan <sevaka@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc3: add dual role support using OTG blockRoger Quadros
This is useful on platforms (e.g. TI AM437x) that don't have ID available on a GPIO but do have the OTG block. We can obtain the ID state via the OTG block and use it for dual-role switching. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: phy: tegra: Increase PHY clock stabilization timeoutDmitry Osipenko
This fixes "utmi_phy_clk_enable: timeout waiting for phy to stabilize" error message. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: phy-generic: Use gpiod_set_value_cansleepMike Looijmans
The nop_reset and shutdown methods are called in a context that can sleep, so use gpiod_set_value_cansleep instead of gpiod_set_value. If you've connected the reset line to a GPIO expander, you'd get a kernel "slowpath" warning with gpiod_set_value. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: gadget: udc: Use scnprintf() instead of snprintf()Jaejoong Kim
The show() method should use scnprintf() not snprintf() because snprintf() may returns a value that exceeds its second argument. Signed-off-by: Jaejoong Kim <climbbb.kim@gmail.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc3: prevent setting PRTCAP to OTG from debugfsRoger Quadros
We don't support PRTCAP == OTG yet, so prevent user from setting it via debugfs. Fixes: 41ce1456e1db ("usb: dwc3: core: make dwc3_set_mode() work properly") Cc: <stable@vger.kernel.org> # v4.12+ Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc3: core.h: add some register definitionsRoger Quadros
Add OTG and GHWPARAMS6 register definitions Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc3: of-simple: add support for the Amlogic Meson GXL and AXG SoCsMartin Blumenstingl
Amlogic Meson GXL and AXG SoCs come with a (host-only) dwc3 USB controller. To use this controller a clock has to be enabled and a reset line has to be pulsed. Enabling the clock works identical to other SoCs. However, the reset line has to be pulsed (using reset_control_reset) instead of using a level reset (reset_control_{assert,deassert}). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc3: of-simple: add support for shared and pulsed reset linesMartin Blumenstingl
Some SoCs (such as Amlogic Meson GXL for example) share the reset line with other components (in case of the Meson GXL example there's a shared reset line between the USB2 PHYs, USB3 PHYs and the dwc3 controller). Additionally SoC implementations may prefer a reset pulse over level resets. For now this falls back to the old defaults, which are: - reset lines are exclusive - level resets are being used Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13dt-bindings: usb: add support for dwc3 controller on Amlogic Meson GXMartin Blumenstingl
Amlogic Meson GX SoCs (GXL and AXG) come with a (host-only) dwc3 USB controller. This requires a clock to be enabled and a reset line to be pulsed to get the hardware into a known state. Add the documentation for this IP block, similar to "qcom,dwc3.txt". Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Rob Herring <robh@kernel.org> Tested-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: gadget: Use true and false for boolean valuesGustavo A. R. Silva
Assign true or false to boolean variables instead of an integer value. This issue was detected with the help of Coccinelle. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Add core state checkingGrigor Tovmasyan
Added core state checking in dwc2_hsotg_ep_queue() function to make sure that application will submit requests only in L0 state. Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Add call_gadget() function callGrigor Tovmasyan
Added call_gadget() function call when entering to L1 state to inform gadget that core is in L1 state. Did the same thing when exiting from L1 state to inform gadget that core is in L0 state. Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: gadget: Configure the core to enable LPMSevak Arakelyan
Configure core in device mode to support LPM according to programming guide. Device will start giving valid responses for LPM tokens. After this patch device side LPM will start working. Signed-off-by: Sevak Arakelyan <sevaka@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Enable LPM Transaction Received interruptSevak Arakelyan
Enable "LPM Transaction Received" interrupt for receive an interrupt when host will send LPM token. Signed-off-by: Sevak Arakelyan <sevaka@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: gadget: LPM interrupt handlerSevak Arakelyan
This interrupt indicates that an LPM transaction was received on the USB bus. After getting this interrupt we are going from L0 state to L1 state. Signed-off-by: Sevak Arakelyan <sevaka@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: gadget: Add functionality to exit from LPM L1 stateSevak Arakelyan
Add a function which will be called if device is in L1 sleep state and Resume/Remote Wakeup Detected interrupt is asserted. Signed-off-by: Sevak Arakelyan <sevaka@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Add core parameters for LPM supportSevak Arakelyan
Add lpm, lpm_clock_gating, besl, hird_threshold_en and hird_threshold core parameters. These will indicate LPM and LPM Errata support as well as chosen L1 sleeping mode for the core and PHY. Signed-off-by: Sevak Arakelyan <sevaka@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Rename GLPMCFG... definitionsSevak Arakelyan
Make field names of GLPMCFG register in definitions to be the same with the databook. Signed-off-by: Sevak Arakelyan <sevaka@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Backup and restore PCGCCTL1 registerRazmik Karapetyan
Backup PCGCCTL1 register when entering hibernation mode and restore it after exiting from hibernation, to keep active ACG feature. Signed-off-by: Razmik Karapetyan <razmik@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Add ACG support to the driverRazmik Karapetyan
Added function for supporting Active Clock Gating functionality in the driver. PCGCCTL1 (Power and Clock Control) register will be used for controlling the core`s active clock gating feature, and the previously reserved 12th bit in GHWCFG4 now indicates that the controller supports the Dynamic Power Reduction (Active Clock Gating) during no traffic scenarios such as L0, idle, resume and suspend states. dwc2_enable_acg() function sets GATEEN bit in PCGCCTL1 register and enables ACG, if it supported. According to ACG functional specification, enabling of ACG feature in host mode done in host initialization, before turning Vbus on, specifically in dwc2_core_host_init function. Enabling of ACG feature in device mode done in device initialization, before clearing the SftDiscon bit in DCTL. This bit was cleared in dwc2_hsotg_core_connect() function.So dwc2_enable_acg() called before dwc2_core_connect() calls. Signed-off-by: Razmik Karapetyan <razmik@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Print error if unable to set DMA coherent maskStefan Wahren
We better print an error in case probing of dwc2 fails on setting the DMA coherent mask. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: gadget: udc: atmel: convert to use GPIO descriptorsLudovic Desroches
Use GPIO descriptors instead of relying on the old method. Include irq.h header since it is needed and was indirectly included through of_gpio.h. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: gadget: udc: atmel: remove code related to platform stuffLudovic Desroches
With the removal of AVR platforms, code related to platform stuff is useless. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Fix interval type issueGrigor Tovmasyan
The maximum value that unsigned char can hold is 255, meanwhile the maximum value of interval is 2^(bIntervalMax-1)=2^15. Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: pci: Handle error cleanup in probeVardan Mikayelyan
The probe function doesn't properly handle errors. Fix it so that it properly handles cleanup. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Vardan Mikayelyan <mvardan@synopsys.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: pci: Move devm_kzalloc() before platform_device_add()Vardan Mikayelyan
After platform_device_add(), if we error out, we must do platform_device_unregister(), which also does the put. So lets move devm_kzalloc() to simplify error handling and avoid calling of platform_device_unregister(). Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Vardan Mikayelyan <mvardan@synopsys.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: pci: Move usb_phy_generic_register()Vardan Mikayelyan
Move usb_phy_generic_register() function call to the top, to simplify error handling. If this fails we can simply return instead of cleaning up. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Vardan Mikayelyan <mvardan@synopsys.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: pci: Replace kzalloc() with devm_kzalloc()Vardan Mikayelyan
Use devm_kzalloc() and remove the unnecessary kfree(). Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Vardan Mikayelyan <mvardan@synopsys.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Change TxFIFO and RxFIFO flushing flowMinas Harutyunyan
Before flushing fifos required to check AHB master state and lush when AHB master is in IDLE state. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: host: Fix transaction errors in host modeMinas Harutyunyan
Added missing GUSBCFG programming in host mode, which fixes transaction errors issue on HiKey and Altera Cyclone V boards. These field even if was programmed in device mode (in function dwc2_hsotg_core_init_disconnected()) will be resetting to POR values after core soft reset applied. So, each time when switching to host mode required to set this field to correct value. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: hcd: Fix host channel halt flowMinas Harutyunyan
According databook in Buffer and External DMA mode non-split periodic channels can't be halted. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Remove unnecessary debug printsRazmik Karapetyan
Removed unnecessary debug prints about DMA mode for host side from dwc2_gahbcfg_init() function. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Razmik Karapetyan <razmik@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Delete unused functionalityGrigor Tovmasyan
Deleted dwc2_hcd_dump_frrem() function, because it used undefined parameters from dwc2_hsotg structure. The function body was in #ifdef statement and was never compiled. Also removed that parameters from dwc2_hsotg structure, which were used only in dwc2_hcd_dump_frrem() function. And also delete dwc2_sample_frrem macro, because without dwc2_hcd_dump_frrem() function it's lose its purpose. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Rename bit set/clear function namesRazmik Karapetyan
Renamed __orr32 and __bic32 function names to more descriptive dwc2_set_bit and dwc2_clear_bit respectively. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Razmik Karapetyan <razmik@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Update GINTSTS_GOUTNAKEFF interrupt handlingRazmik Karapetyan
Disabled only unmasked endpoints based on DAINTMSK register. This will allow to minimize GINTSTS_GOUTNAKEFF interrupt handling. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Razmik Karapetyan <razmik@synopsys.com> Signed-off-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Update dwc2_handle_incomplete_isoc_out() functionRazmik Karapetyan
In 'for' loop skipped masked and non-ISOC EPs. Also breaked 'for' loop after setting SGOUTNAK in DCTL,when one enabled EP was detected. This will allow to minimize incomplete ISOC OUT interrupt handling. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Razmik Karapetyan <razmik@synopsys.com> Signed-off-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Update dwc2_handle_incomplete_isoc_in() functionRazmik Karapetyan
Disabled only that ISOC endpoints,for which interrupt bit was set in the DAINTMSK register. This will allow to minimize incomplete ISOC IN interrupt handling. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Razmik Karapetyan <razmik@synopsys.com> Signed-off-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Set AHB burst size to INCRRazmik Karapetyan
Changed AHB burst size from INCR4 to INCR by default. With this value driver shows excellent DMA performance. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Razmik Karapetyan <razmik@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Use AHB burst size parameterRazmik Karapetyan
In dwc2_hsotg_core_init_disconnected() function used AHB burst size parameter, instead of calculating already calculated value. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Razmik Karapetyan <razmik@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Update bit polling functionalitySevak Arakelyan
Move dwc2_hsotg_wait_bit_set function to core.c so it can be used anywhere in the code. Added dwc2_hsotg_wait_bit_clear function in core.c. Replace all the parts of register bit polling code with dwc2_hsotg_wait_bit_set or dwc2_hsotg_wait_bit_clear functions calls depends on code logic. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Sevak Arakelyan <sevaka@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: dwc2: Remove version check in GSNPSIDGevorg Sahakyan
Only check the ID portion of the GSNPSID register and don’t check the version. This will allow the driver to work with version 4.00a and later of the DWC_hsotg IP. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Gevorg Sahakyan <sahakyan@synopsys.com> Signed-off-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: gadget: ffs: Let setup() return USB_GADGET_DELAYED_STATUSLars-Peter Clausen
Some UDC drivers (like the DWC3) expect that the response to a setup() request is queued from within the setup function itself so that it is available as soon as setup() has completed. Upon receiving a setup request the function fs driver creates an event that is made available to userspace. And only once userspace has acknowledged that event the response to the setup request is queued. So it violates the requirement of those UDC drivers and random failures can be observed. This is basically a race condition and if userspace is able to read the event and queue the response fast enough all is good. But if it is not, for example because other processes are currently scheduled to run, the USB host that sent the setup request will observe an error. To avoid this the gadget framework provides the USB_GADGET_DELAYED_STATUS return code. If a setup() callback returns this value the UDC driver is aware that response is not yet available and can uses the appropriate methods to handle this case. Since in the case of function fs the response will never be available when the setup() function returns make sure that this status code is used. This fixed random occasional failures that were previously observed on a DWC3 based system under high system load. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: gadget: ffs: Execute copy_to_user() with USER_DS setLars-Peter Clausen
When using a AIO read() operation on the function FS gadget driver a URB is submitted asynchronously and on URB completion the received data is copied to the userspace buffer associated with the read operation. This is done from a kernel worker thread invoking copy_to_user() (through copy_to_iter()). And while the user space process memory is made available to the kernel thread using use_mm(), some architecture require in addition to this that the operation runs with USER_DS set. Otherwise the userspace memory access will fail. For example on ARM64 with Privileged Access Never (PAN) and User Access Override (UAO) enabled the following crash occurs. Internal error: Accessing user space memory with fs=KERNEL_DS: 9600004f [#1] SMP Modules linked in: CPU: 2 PID: 1636 Comm: kworker/2:1 Not tainted 4.9.0-04081-g8ab2dfb-dirty #487 Hardware name: ZynqMP ZCU102 Rev1.0 (DT) Workqueue: events ffs_user_copy_worker task: ffffffc87afc8080 task.stack: ffffffc87a00c000 PC is at __arch_copy_to_user+0x190/0x220 LR is at copy_to_iter+0x78/0x3c8 [...] [<ffffff800847b790>] __arch_copy_to_user+0x190/0x220 [<ffffff80086f25d8>] ffs_user_copy_worker+0x70/0x130 [<ffffff80080b8c64>] process_one_work+0x1dc/0x460 [<ffffff80080b8f38>] worker_thread+0x50/0x4b0 [<ffffff80080bf5a0>] kthread+0xd8/0xf0 [<ffffff8008083680>] ret_from_fork+0x10/0x50 Address this by placing a set_fs(USER_DS) before of the copy operation and revert it again once the copy operation has finished. This patch is analogous to commit d7ffde35e31a ("vhost: use USER_DS in vhost_worker thread") which addresses the same underlying issue. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-03-13usb: gadget: mass_storage: Set max_speed to SSPThinh Nguyen
Increase max_speed of the mass_storage driver for UDCs that support SuperSpeed Plus. The composite driver will pass this value to UDC core to set the device speed on probe (actual speed may be different depending on whether the USB controller supports it or other external factors). Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>