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Age	Commit message (Expand)	Author
2014-01-16	clk: qcom: Add support for MSM8660's global clock controller (GCC)	Stephen Boyd
2014-01-16	clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC)	Stephen Boyd
2014-01-16	clk: qcom: Add support for MSM8974's global clock controller (GCC)	Stephen Boyd
2014-01-16	clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)	Stephen Boyd
2014-01-16	clk: qcom: Add support for MSM8960's global clock controller (GCC)	Stephen Boyd
2014-01-16	clk: qcom: Add reset controller support	Stephen Boyd
2014-01-16	clk: qcom: Add support for branches/gate clocks	Stephen Boyd
2014-01-16	clk: qcom: Add support for root clock generators (RCGs)	Stephen Boyd
2014-01-16	clk: qcom: Add support for phase locked loops (PLLs)	Stephen Boyd
2014-01-16	clk: qcom: Add a regmap type clock struct	Stephen Boyd
2014-01-16	clk: Add set_rate_and_parent() op	Stephen Boyd
2014-01-16	reset: Silence warning in reset-controller.h	Stephen Boyd
2014-01-16	clk: sirf: re-arch to make the codes support both prima2 and atlas6	Barry Song
2014-01-15	clk: composite: pass mux_hw into determine_rate	Mike Turquette
2014-01-14	Merge branch 'clk-next-shmobile' into clk-next	Mike Turquette
2014-01-14	clk: shmobile: Fix MSTP clock array initialization	Valentine Barshak
2014-01-14	clk: shmobile: Fix MSTP clock index	Valentine Barshak
2014-01-08	Merge tag 'for_3.14/samsung-clk' of git://git.kernel.org/pub/scm/linux/kernel...	Mike Turquette
2014-01-08	ARM: dts: Add clock provider specific properties to max77686 node	Tomasz Figa
2014-01-08	clk: max77686: Register OF clock provider	Tomasz Figa
2014-01-08	clk: max77686: Refactor driver data handling	Tomasz Figa
2014-01-08	clk: max77686: Fix clean-up in error and remove paths	Tomasz Figa
2014-01-08	clk: max77686: Make max77686_clk_register() return struct clk *	Tomasz Figa
2014-01-08	clk: max77686: Refactor successful exit of probe function	Tomasz Figa
2014-01-08	clk: max77686: Provide .recalc_rate() operation	Tomasz Figa
2014-01-08	clk: max77686: Correct callback used for checking clock status	Tomasz Figa
2014-01-08	MAINTAINERS: Add entry for Samsung SoC clock drivers	Tomasz Figa
2014-01-08	ARM: dts: exynos5420: add input clocks to audss clock controller	Andrew Bresticker
2014-01-08	clk: exynos-audss: add support for Exynos 5420	Andrew Bresticker
2014-01-08	ARM: dts: exynos5250: add input clocks to audss clock controller	Andrew Bresticker
2014-01-08	clk: exynos5250: add clock ID for div_pcm0	Andrew Bresticker
2014-01-08	clk: exynos-audss: allow input clocks to be specified in device tree	Andrew Bresticker
2014-01-08	clk: exynos-audss: convert to platform device	Andrew Bresticker
2014-01-08	clk: exynos5440: replace clock ID private enums with IDs from DT header	Andrzej Hajda
2014-01-08	ARM: exynos5440: create a DT header defining CLK IDs	Andrzej Hajda
2014-01-08	clk: exynos5420: replace clock ID private enums with IDs from DT header	Andrzej Hajda
2014-01-08	ARM: exynos5420: create a DT header defining CLK IDs	Andrzej Hajda
2014-01-08	clk: exynos5250: replace clock ID private enums with IDs from DT header	Andrzej Hajda
2014-01-08	ARM: exynos5250: create a DT header defining CLK IDs	Andrzej Hajda
2014-01-08	clk: exynos4: replace clock ID private enums with IDs from DT header	Andrzej Hajda
2014-01-08	ARM: exynos4: create a DT header defining CLK IDs	Andrzej Hajda
2014-01-08	clk: exynos5250: register APLL rate table	Andrew Bresticker
2013-12-31	Merge branch 'clk-next-unregister' into clk-next	Mike Turquette
2013-12-30	Merge branch 'for_3.14/keystone-clk' of git://git.kernel.org/pub/scm/linux/ke...	Mike Turquette
2013-12-30	clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apll	Sachin Kamat
2013-12-30	clk: samsung: exynos5250: Fix parents of gate clocks from MFC domain	Tomasz Figa
2013-12-30	clk: samsung: exynos5250: Correct parent list of audio muxes	Tomasz Figa
2013-12-30	clk: samsung: exynos5250: Add missing unpopulated mux parents	Tomasz Figa
2013-12-30	clk: samsung: exynos5250: Fix parent of gate clocks from DISP1 domain	Tomasz Figa
2013-12-30	clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domain	Tomasz Figa