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2015-12-12e1000: fix kernel-doc argument being missingJean Sacren
Due to historical reason, 'phy_data' has never been included in the kernel doc. Fix it so that the requirement could be fulfilled. Signed-off-by: Jean Sacren <sakiwit@gmail.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12e1000e: clean up the local variableJean Sacren
The local variable 'ret' doesn't serve much purpose so we might as well clean it up. Signed-off-by: Jean Sacren <sakiwit@gmail.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12e1000: fix a typo in the commentJean Sacren
Use 'That' to replace 'The' so that the comment would make sense. Signed-off-by: Jean Sacren <sakiwit@gmail.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12e1000: clean up the checking logicJean Sacren
The checking logic needed some clean-up work, so we rewrite it by checking for break first. With that change in place, we can even move the second check for goto statement outside of the loop. As this is merely a cleanup, no functional change is involved. The questionable 'tmp != 0xFF' is intentionally left alone. Mark Rustad and Alexander Duyck contributed to this patch. CC: Mark Rustad <mark.d.rustad@intel.com> CC: Alex Duyck <aduyck@mirantis.com> Signed-off-by: Jean Sacren <sakiwit@gmail.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12igb: use the correct i210 register for EEMNGCTLTodd Fujinaka
The i210 has two EEPROM access registers that are located in non-standard offsets: EEARBC and EEMNGCTL. EEARBC was fixed previously and EEMNGCTL should also be corrected. Reported-by: Roman Hodek <roman.aud@siemens.com> Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12e1000: Remove checkpatch coding style errorsJanusz Wolak
Signed-off-by: Janusz Wolak <januszvdm@gmail.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12igb: don't unmap NULL hw_addrJarod Wilson
I've got a startech thunderbolt dock someone loaned me, which among other things, has the following device in it: 08:00.0 Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev 03) This hotplugs just fine (kernel 4.2.0 plus a patch or two here): [ 863.020315] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.2.18-k [ 863.020316] igb: Copyright (c) 2007-2014 Intel Corporation. [ 863.028657] igb 0000:08:00.0: enabling device (0000 -> 0002) [ 863.062089] igb 0000:08:00.0: added PHC on eth0 [ 863.062090] igb 0000:08:00.0: Intel(R) Gigabit Ethernet Network Connection [ 863.062091] igb 0000:08:00.0: eth0: (PCIe:2.5Gb/s:Width x1) e8:ea:6a:00:1b:2a [ 863.062194] igb 0000:08:00.0: eth0: PBA No: 000200-000 [ 863.062196] igb 0000:08:00.0: Using MSI-X interrupts. 4 rx queue(s), 4 tx queue(s) [ 863.064889] igb 0000:08:00.0 enp8s0: renamed from eth0 But disconnecting it is another story: [ 1002.807932] igb 0000:08:00.0: removed PHC on enp8s0 [ 1002.807944] igb 0000:08:00.0 enp8s0: PCIe link lost, device now detached [ 1003.341141] ------------[ cut here ]------------ [ 1003.341148] WARNING: CPU: 0 PID: 199 at lib/iomap.c:43 bad_io_access+0x38/0x40() [ 1003.341149] Bad IO access at port 0x0 () [ 1003.342767] Modules linked in: snd_usb_audio snd_usbmidi_lib snd_rawmidi igb dca firewire_ohci firewire_core crc_itu_t rfcomm ctr ccm arc4 iwlmvm mac80211 fuse xt_CHECKSUM ipt_MASQUERADE nf_nat_masquerade_ipv4 tun ip6t_rpfilter ip6t_REJECT nf_reject_ipv6 ipt_REJECT nf_reject_ipv4 xt_conntrack ebtable_nat ebtable_broute bridge stp llc ebtable_filter ebtables ip6table_nat nf_conntrack_ipv6 nf_defrag_ipv6 nf_nat_ipv6 ip6table_mangle ip6table_security ip6table_raw ip6table_filter ip6_tables iptable_nat nf_conntrack_ipv4 nf_defrag_ipv4 nf_nat_ipv4 nf_nat nf_conntrack iptable_mangle iptable_security iptable_raw iptable_filter bnep dm_mirror dm_region_hash dm_log dm_mod coretemp x86_pkg_temp_thermal intel_powerclamp kvm_intel snd_hda_codec_hdmi kvm crct10dif_pclmul crc32_pclmul ghash_clmulni_intel drbg [ 1003.342793] ansi_cprng aesni_intel hp_wmi aes_x86_64 iTCO_wdt lrw iTCO_vendor_support ppdev gf128mul sparse_keymap glue_helper ablk_helper cryptd snd_hda_codec_realtek snd_hda_codec_generic microcode snd_hda_intel uvcvideo iwlwifi snd_hda_codec videobuf2_vmalloc videobuf2_memops snd_hda_core videobuf2_core snd_hwdep btusb v4l2_common btrtl snd_seq btbcm btintel videodev cfg80211 snd_seq_device rtsx_pci_ms bluetooth pcspkr input_leds i2c_i801 media parport_pc memstick rfkill sg lpc_ich snd_pcm 8250_fintek parport joydev snd_timer snd soundcore hp_accel ie31200_edac mei_me lis3lv02d edac_core input_polldev mei hp_wireless shpchp tpm_infineon sch_fq_codel nfsd auth_rpcgss nfs_acl lockd grace sunrpc ip_tables autofs4 xfs libcrc32c sd_mod sr_mod cdrom rtsx_pci_sdmmc mmc_core crc32c_intel serio_raw rtsx_pci [ 1003.342822] nouveau ahci libahci mxm_wmi e1000e xhci_pci hwmon ptp drm_kms_helper pps_core xhci_hcd ttm wmi video ipv6 [ 1003.342839] CPU: 0 PID: 199 Comm: kworker/0:2 Not tainted 4.2.0-2.el7_UNSUPPORTED.x86_64 #1 [ 1003.342840] Hardware name: Hewlett-Packard HP ZBook 15 G2/2253, BIOS M70 Ver. 01.07 02/26/2015 [ 1003.342843] Workqueue: pciehp-3 pciehp_power_thread [ 1003.342844] ffffffff81a90655 ffff8804866d3b48 ffffffff8164763a 0000000000000000 [ 1003.342846] ffff8804866d3b98 ffff8804866d3b88 ffffffff8107134a ffff8804866d3b88 [ 1003.342847] ffff880486f46000 ffff88046c8a8000 ffff880486f46840 ffff88046c8a8098 [ 1003.342848] Call Trace: [ 1003.342852] [<ffffffff8164763a>] dump_stack+0x45/0x57 [ 1003.342855] [<ffffffff8107134a>] warn_slowpath_common+0x8a/0xc0 [ 1003.342857] [<ffffffff810713c6>] warn_slowpath_fmt+0x46/0x50 [ 1003.342859] [<ffffffff8133719e>] ? pci_disable_msix+0x3e/0x50 [ 1003.342860] [<ffffffff812f6328>] bad_io_access+0x38/0x40 [ 1003.342861] [<ffffffff812f6567>] pci_iounmap+0x27/0x40 [ 1003.342865] [<ffffffffa0b728d7>] igb_remove+0xc7/0x160 [igb] [ 1003.342867] [<ffffffff8132189f>] pci_device_remove+0x3f/0xc0 [ 1003.342869] [<ffffffff81433426>] __device_release_driver+0x96/0x130 [ 1003.342870] [<ffffffff814334e3>] device_release_driver+0x23/0x30 [ 1003.342871] [<ffffffff8131b404>] pci_stop_bus_device+0x94/0xa0 [ 1003.342872] [<ffffffff8131b3ad>] pci_stop_bus_device+0x3d/0xa0 [ 1003.342873] [<ffffffff8131b3ad>] pci_stop_bus_device+0x3d/0xa0 [ 1003.342874] [<ffffffff8131b516>] pci_stop_and_remove_bus_device+0x16/0x30 [ 1003.342876] [<ffffffff81333f5b>] pciehp_unconfigure_device+0x9b/0x180 [ 1003.342877] [<ffffffff81333a73>] pciehp_disable_slot+0x43/0xb0 [ 1003.342878] [<ffffffff81333b6d>] pciehp_power_thread+0x8d/0xb0 [ 1003.342885] [<ffffffff810881b2>] process_one_work+0x152/0x3d0 [ 1003.342886] [<ffffffff8108854a>] worker_thread+0x11a/0x460 [ 1003.342887] [<ffffffff81088430>] ? process_one_work+0x3d0/0x3d0 [ 1003.342890] [<ffffffff8108ddd9>] kthread+0xc9/0xe0 [ 1003.342891] [<ffffffff8108dd10>] ? kthread_create_on_node+0x180/0x180 [ 1003.342893] [<ffffffff8164e29f>] ret_from_fork+0x3f/0x70 [ 1003.342894] [<ffffffff8108dd10>] ? kthread_create_on_node+0x180/0x180 [ 1003.342895] ---[ end trace 65a77e06d5aa9358 ]--- Upon looking at the igb driver, I see that igb_rd32() attempted to read from hw_addr and failed, so it set hw->hw_addr to NULL and spit out the message in the log output above, "PCIe link lost, device now detached". Well, now that hw_addr is NULL, the attempt to call pci_iounmap is obviously not going to go well. As suggested by Mark Rustad, do something similar to what ixgbe does, and save a copy of hw_addr as adapter->io_addr, so we can still call pci_iounmap on it on teardown. Additionally, for consistency, make the pci_iomap call assignment directly to io_addr, so map and unmap match. Signed-off-by: Jarod Wilson <jarod@redhat.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12e1000: fix data race between tx_ring->next_to_cleanDmitriy Vyukov
e1000_clean_tx_irq cleans buffers and sets tx_ring->next_to_clean, then e1000_xmit_frame reuses the cleaned buffers. But there are no memory barriers when buffers gets recycled, so the recycled buffers can be corrupted. Use smp_store_release to update tx_ring->next_to_clean and smp_load_acquire to read tx_ring->next_to_clean to properly hand off buffers from e1000_clean_tx_irq to e1000_xmit_frame. The data race was found with KernelThreadSanitizer (KTSAN). Signed-off-by: Dmitry Vyukov <dvyukov@google.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12igb: add 88E1543 initialization codeTodd Fujinaka
Initialize the 88E1543 PHY. Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12e1000: make eeprom read/write scheduler friendlyJoern Engel
Code was responsible for ~150ms scheduler latencies. Signed-off-by: Joern Engel <joern@logfs.org> Signed-off-by: Spencer Baugh <sbaugh@catern.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12i40e/i40evf: Bump i40e to 1.4.8 and i40evf to 1.4.4Catherine Sullivan
Bump. Change-ID: I2b8976bde070244de144e2ed8990b083de39f332 Signed-off-by: Catherine Sullivan <catherine.sullivan@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12i40evf: change version string generationMitch Williams
Generate version strings like the PF driver does. This gives us more flexibility to add suffixes to the version string at build time. Change-ID: I0a5ca0783dd8fb849516bfc1e37ea070127847bd Signed-off-by: Mitch Williams <mitch.a.williams@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12i40e: clean whole mac filter listShannon Nelson
Clean the whole mac filter list when resetting after an intermediate add or delete push to the firmware. The code had evolved from using a list from the stack to a heap allocation, but the memset() didn't follow the change correctly. This now cleans the whole list rather that just part of the first element. Change-ID: I4cd03d5a103b7407dd8556a3a231e800f2d6f2d5 Reported-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12i40e/i40evf: Add a new offload for RSS PCTYPE V2 for X722Anjali Singhai Jain
X722 supports Expanded version of TCP, UDP PCTYPES for RSS. Add a Virtchnl offload to support this. Without this patch with X722 devices, driver will set wrong PCTYPES for VF and UDP flows will not fan out. Change-ID: I04fe4988253b7cd108c9179a643c969764efcb76 Signed-off-by: Anjali Singhai Jain <anjali.singhai@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12i40e: hush little warningsMitch Williams
These messages seem big and scary, but they're really not. The driver can fully recover from any of these. The overflow error in particular can happen when enabling a bunch of VFs and the VF driver is not blacklisted. Since these messages are really for debugging purposes, reclassify them as such. Change-ID: I628d0f5e135e7063450ba05393a50b7af23aa6d7 Signed-off-by: Mitch Williams <mitch.a.williams@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12i40e: Opcode and structures required by OEM Post Update AQ command and add ↵Michal Kosiarz
new NVM arq message This is a part of implementation which contains data structures and opcode for new AQ command. There's a new ARQ message that gets sent near the end of the NVM update process that the driver should recognize and ignore, rather than printing an Unknown Event error. Change-ID: I04830a5bcae14823e16b9424cc4165e169336c1f Signed-off-by: Michal Kosiarz <michal.kosiarz@intel.com> Acked-by: Shannon Nelson <shannon.nelson@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12i40e: use explicit cast from u16 to u8Kamil Krawczyk
Current implementation generates compilation warnings. Change-ID: Icceefb50fe62aefaf90a64afb7192e08355a4ec5 Signed-off-by: Kamil Krawczyk <kamil.krawczyk@intel.com> Acked-by: Shannon Nelson <shannon.nelson@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12i40evf: check rings before freeing resourcesMitch Williams
If the driver gets unloaded during reset recovery, it's possible that it will attempt to free resources when they're already free. Add a check to make sure that the Tx and Rx rings actually exist before dereferencing them to free resources. Change-ID: I4d2b7e9ede49f634d421a4c5deaa5446bc755eee Signed-off-by: Mitch Williams <mitch.a.williams@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12i40e: don't add zero MAC filterMitch Williams
When VFs are created, the MAC address defaults to all zeros, indicating to the VF driver that it should use a random MAC address. However, the PF driver was incorrectly adding this zero MAC to the filter table, along with the VF's randomly generated MAC address. Check for a good address before adding the default filter. While we're at it, make the error message a bit more useful. Change-ID: Ia100947d68140e0f73a19ba755cbffc3e79a8fcf Signed-off-by: Mitch Williams <mitch.a.williams@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12i40e: properly delete VF MAC filtersMitch Williams
The virtual channel interface was using incorrect semantics to remove MAC addresses, which would leave incorrect filters active when using VLANs. To correct this, add a new function that unconditionally removes MAC addresses from all VLANs, and call this function when the VF requests a MAC filter removal. Change-ID: I69826908ae4f6c847f5bf9b32f11faa760189c74 Signed-off-by: Mitch Williams <mitch.a.williams@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12i40e: chomp the BIT(_ULL)Jesse Brandeburg
BIT_ULL was used on a u32 or less where it can simply be BIT. This fixes some trivial static analyzer warnings. Chomp, chomp. Tested with objdump of binary before and after, no changes to code. Change-ID: I6245e9abd447192dbde1669c747aeb2878126c7d Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12Merge branch '10GbE' of ↵David S. Miller
git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue Jeff Kirsher says: ==================== 10GbE Intel Wired LAN Driver Updates 2015-12-12 This series contains updates to ixgbe only. Alex Duyck provides almost off of the changes in this series. First, add a check to make sure mac_table was actually allocated and is not NULL to ensure we do not get a NULL pointer dereference further down the line. Fixed SR-IOV VLAN pool configuration since the code for checking the PF bit in ixgbe_set_vf_vlan_msg() was using the wrong offset. Cleanup/simplify the logic for setting the VFTA register by removing the number of conditional checks needed. Fixed a number of issues within the VLVF and VLFB configuration by simplifying the code. Added support for bypassing the VLVF entry creation when the PF is adding a new VLAN. Reduced the complexity of the search function used for finding a VLVF entry associated with a given VLAN ID. Added support for VLAN promiscuous with SR-IOV enabled by setting all the bits in the VFTA and all of the VLVF bits associated with teh pool belonging to the PF, in addition to cleaning up those same bits in the event of promiscuous mode being disabled. Fixed and issue where we ran the risk of leaking an address into pool 0 which really belongs to VF 0 when SR-IOV is enabled. Emil fixes an issue with some X550 devices which can connect at 2.5Gbps, but only with certain link partners during fail-over, so to avoid confusion, we do not report it as supported. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-12bpf, inode: allow for rename and link opsDaniel Borkmann
Add support for renaming and hard links to the fs. Most of this can be implemented by using simple library operations under the same constraints that we don't use a reserved name like elsewhere. Linking can be useful to share/manage things like maps across subsystem users. It works within the file system boundary, but is not allowed for directories. Symbolic links are explicitly not implemented here, as it can be better done already by doing bind mounts inside bpf fs to set up shared directories f.e. useful when using volumes in docker containers that map a private working directory into /sys/fs/bpf/ which contains itself a bind mounted path from the host's /sys/fs/bpf/ mount that is shared among multiple containers. For single maps instead of whole directory, hard links can be easily used to do the same. Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-12ixgbe: do not report 2.5 Gbps as supportedEmil Tantilov
Some X550 devices can connect at 2.5Gbps during fail-over, but only with certain link partners. Also setting the advertised speed will not work so we do not report it as supported to avoid confusion. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12ixgbe: Clean stale VLANs when changing port VLAN or resettingAlexander Duyck
This patch guarantees that the VFs do not have access to VLANs that they were not supposed to. What this patch does is add code so that we delete the previous port VLAN after adding a new one, and if we reset the VF we clear all of the filters associated with it. Previously the code was leaving all previous VLANs mapped to the VF and they didn't get deleted unless the VF specifically requested it or if the PF itself was reset. Signed-off-by: Alexander Duyck <aduyck@mirantis.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12ixgbe: Clear stale pool mappingsAlexander Duyck
This patch makes certain that we clear the pool mappings added when we configure default MAC addresses for the interface. Without this we run the risk of leaking an address into pool 0 which really belongs to VF 0 when SR-IOV is enabled. Signed-off-by: Alexander Duyck <aduyck@mirantis.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12ixgbe: Fix VLAN promisc in relation to SR-IOVAlexander Duyck
This patch is a follow-on for enabling VLAN promiscuous and allowing the PF to add VLANs without adding a VLVF entry. What this patch does is go through and free the VLVF registers if they are not needed as the VLAN belongs only to the PF which is the default pool. Signed-off-by: Alexander Duyck <aduyck@mirantis.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12ixgbe: Add support for VLAN promiscuous with SR-IOVAlexander Duyck
This patch adds support for VLAN promiscuous with SR-IOV enabled. The code prior to this patch was only adding the PF to VLANs that the VF had added. As such enabling promiscuous mode would actually not add any additional VLAN filters so visibility was limited. This lead to a number of issues as the bridge and OVS would expect us to accept all VLAN tagged packets when promiscuous mode was enabled, and instead we would filter out most if not all depending on the configuration of the PF. With this patch what we do is set all the bits in the VFTA and all of the VLVF bits associated with the pool belonging to the PF. By doing this the PF is guaranteed to receive all VLAN tagged traffic associated with the RAR filters assigned to the PF. In addition we will clean up those same bits in the event of promiscuous mode being disabled. Signed-off-by: Alexander Duyck <aduyck@mirantis.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12ixgbe: Reorder search to work from the top down instead of bottom upAlexander Duyck
This patch is meant to reduce the complexity of the search function used for finding a VLVF entry associated with a given VLAN ID. The previous code was searching from bottom to top. I reordered it to search from top to bottom. In addition I pulled an AND statement out of the loop and instead replaced it with an OR statement outside the loop. This should help to reduce the overall size and complexity of the function. There was also some formatting I cleaned up in regards to whitespace and such. Signed-off-by: Alexander Duyck <aduyck@mirantis.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12ixgbe: Add support for adding/removing VLAN on PF bypassing the VLVFAlexander Duyck
This patch adds support for bypassing the VLVF entry creation when the PF is adding a new VLAN. The advantage to doing this is that we can then save the VLVF entries for the VFs which must have them in order to function, versus the PF which can fall back on the default pool entry. Signed-off-by: Alexander Duyck <aduyck@mirantis.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12ixgbe: Simplify configuration of setting VLVF and VLVFBAlexander Duyck
This patch addresses several issues within the VLVF and VLVFB configuration First was the fact that code was overly complicated with multiple conditional paths depending on if we adding or removing and which bit we were going to add or remove. Instead of messing with all that I have simplified it by using (vid / 32) and (1 - vid / 32) to identify our register and the other vlvfb register. Second was the fact that we were likely leaking a few packets into the PF in cases where we were deleting an entry and the VFTA filter for that entry as the ordering was such that we deleted the pool and then the VLAN filter instead of the other way around. I have updated that by adding a check for no bits being set and if that occurs we clear things up in the proper order. Signed-off-by: Alexander Duyck <aduyck@mirantis.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12ixgbe: Reduce VT code indent in set_vfta by introducing jump labelAlexander Duyck
In order to clear the way for upcoming work I thought it best to drop the level of indent in the ixgbe_set_vfta_generic function. Most of the code is held in the virtualization specific section. So the easiest approach is to just add a jump label and jump past the bulk of the code if it is not enabled. Signed-off-by: Alexander Duyck <aduyck@mirantis.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12ixgbe: Simplify definitions for regidx and bit in set_vftaAlexander Duyck
This patch simplifies the logic for setting the VFTA register by removing the number of conditional checks needed. Instead we just use some boolean logic to generate vfta_delta, and if that is set then we xor the vfta by that value and write it back. Signed-off-by: Alexander Duyck <aduyck@mirantis.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12ixgbe: Fix SR-IOV VLAN pool configurationAlexander Duyck
The code for checking the PF bit in ixgbe_set_vf_vlan_msg was using the wrong offset and as a result it was pulling the VLAN off of the PF even if there were VFs numbered greater than 40 that still had the VLAN enabled. Signed-off-by: Alexander Duyck <aduyck@mirantis.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12ixgbe: Return error on failure to allocate mac_tableAlexander Duyck
Add a check to make certain mac_table was actually allocated and is not NULL. If it is NULL return -ENOMEM and allow the probe routine to fail rather then causing a NULL pointer dereference further down the line. Signed-off-by: Alexander Duyck <aduyck@mirantis.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-12-12mlxsw: core: Fix temperature sensor index during initializationJiri Pirko
Sensor index should be passed instead of 0. For now, this does not make a difference, since there is so far only one temperature sensor exposed by HW. Fixes: 89309da39 ("mlxsw: core: Implement temperature hwmon interface") Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-12mlxsw: reg: Fix max temperature gettingJiri Pirko
Fix copy & paste error in MTPM unpack helper. Fixes: 85926f877040 ("mlxsw: reg: Add definition of temperature management registers") Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-12Merge branch 'mlx5-flow-steering'David S. Miller
Saeed Mahameed says: ==================== mlx5 improved flow steering management First two patches fixes some minor issues in recently introduced SRIOV code. The other seven patches modifies the driver's code that manages flow steering rules with Connectx-4 devices. Basic introduction: The flow steering device specification model is composed of the following entities: Destination (either a TIR/Flow table/vport), where TIR is RSS end-point, vport is the VF eSwitch port in SRIOV. Flow table entry (FTE) - the values used by the flow specification Flow table group (FG) - the masks used by the flow specification Flow table (FT) - groups several FGs and can serve as destination The flow steering software entities: In addition to the device objects, the software have two more objects: Priorities - group several FTs. Handles order of packet matching. Namespaces - group several priorities. Namespace are used in order to isolate different usages of steering (for example, add two separate namespaces, one for the NIC driver and one for E-Switch FDB). The base data structure for the flow steering management is a tree and all the flow steering objects such as (Namespace/Flow table/Flow Group/FTE/etc.) are represented as a node in the tree, e.g.: Priority-0 -> FT1 -> FG -> FTE -> TIR (destination) Priority-1 -> FT2 -> FG-> FTE -> TIR (destination) Matching begins in FT1 flow rules and if there is a miss on all the FTEs then matching continues on the FTEs in FT2. The new implementation solves/improves the following issues in the current code: 1) The new impl. supports multiple destinations, the search for existing rule with the same matching value is performed by the flow steering management. In the current impl. the E-switch FDB management code needs to search for existing rules before calling to the add rule function. 2) The new impl. manages the flow table level, in the current implementation the consumer states the flow table level when new flow table is created without any knowledge about the levels of other flow tables. 3) In the current impl. the consumer can't create or destroy flow groups dynamically, the flow groups are passed as argument to the create flow table API. The new impl. exposes API for create/destroy flow group. The series is built as follows: Patch #1 add flow steering API firmware commands. Patch #2 add tree operation of the flow steering tree: add/remove node, initialize node and take reference count on a node. Patch #3 add essential algorithms for managing the flow steering. Patch #4 Initialize the flow steering tree, flow steering initialization is based on static tree which illustrates the flow steering tree when the driver is loaded. Patch #5 is the main patch of the series. It introduce the flow steering API. Patch #6 Expose the new flow steering API and remove the old one. The Ethernet flow steering follows the existing implementation, but uses the new steering API. Patch #7 Rename en_flow_table.c to en_fs.c in order to be aligned with the new flow steering files. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-12net/mlx5e: Rename en_flow_table.c to en_fs.cMaor Gottlieb
Rename en_flow_table.c to en_fs.c in order to be aligned with the new flow steering files. Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Signed-off-by: Moni Shoua <monis@mellanox.com> Signed-off-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-12net/mlx5: Use flow steering infrastructure for mlx5_enMaor Gottlieb
Expose the new flow steering API and remove the old one. Few changes are required: 1. The Ethernet flow steering follows the existing implementation, but uses the new steering API. The old flow steering implementation is removed. 2. Move the E-switch FDB management to use the new API. 3. When driver is loaded call to mlx5_init_fs which initialize the flow steering tree structure, open namespaces for NIC receive and for E-switch FDB. 4. Call to mlx5_cleanup_fs when the driver is unloaded. Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Signed-off-by: Moni Shoua <monis@mellanox.com> Signed-off-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-12net/mlx5_core: Flow steering tree initializationMaor Gottlieb
Flow steering initialization is based on static tree which illustrates the flow steering tree when the driver is loaded. The initialization considers the max supported flow table level of the device, a minimum of 2 kernel flow tables(vlan and mac) are required to have kernel flow table functionality. The tree structures when the driver is loaded: root_namespace(receive nic) | priority-0 (kernel priority) | namespace(kernel namespace) | priority-0 (flow tables priority) In the following patches, When the EN driver will use the flow steering API, it create two flow tables and their flow groups under priority-0(flow tables priority). Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Signed-off-by: Moni Shoua <monis@mellanox.com> Signed-off-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-12net/mlx5_core: Introduce flow steering APIMaor Gottlieb
Introducing the following objects: mlx5_flow_root_namespace: represent the root of specific flow table type tree(e.g NIC receive, FDB, etc..) mlx5_flow_group: define the mask of the flow specification. fs_fte(flow steering flow table entry): defines the value of the flow specification. The following describes the relationships between the tree objects: root_namespace --> priorities -->namespaces --> priorities -->flow-tables --> flow-groups --> flow-entries --> destinations When we create new object(flow table/flow group/flow table entry), we call to the FW command and then we add the related sw object to the tree. When we destroy object, e.g. call to mlx5_destroy_flow_table, we use the tree node destructor for destroying the FW object and remove the node from the tree. Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Signed-off-by: Moni Shoua <monis@mellanox.com> Signed-off-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-12net/mlx5_core: Add flow steering lookup algorithmsMaor Gottlieb
Introduce the flow steering mlx5_flow_namespace (Namespace) and fs_prio (Flow Steering Priority) tree nodes. Namespaces are used in order to isolate different usages or types of steering (for example, downstream patches will add a different namespaces for the NIC driver and for E-Switch FDB usages). Flow Steering Priorities are objects that describes priorities ranges between different flow objects under the same namespace. Example, entries in priority i are matched before entries in priority i+1. This patch adds the following algorithms: 1) Calculate level: Each flow table has level(the priority between the flow tables). When we initialize the flow steering tree, we assign range of levels to each priority, therefore the level for new flow table is the location within the priority related to the range of the priority. 2) Match between match criteria. This function is used for searching flow group when new flow rule is added. 3) Match between match values. This function is used for searching flow table entry when new flow rule is added. 4) Add essential macros for traversing on a node's children. E.g. traversing on all the flow table of some priority Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Signed-off-by: Moni Shoua <monis@mellanox.com> Signed-off-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-12net/mlx5_core: Add flow steering base data structuresMaor Gottlieb
Introducing the base data structure and its operations that are going to represent ConnectX-4 Flow Steering, this data structure is basically a tree and all Flow steering objects such as (Flow Table/Flow Group/FTE/etc ..) are represented as fs_node(s). fs_node is the base object which describes a basic tree node, with the following extra info: type: describes the runtime type of the node (Object). lock: lock this node sub-tree. ref_count: number of children + current references. remove_func: a generic destructor. fs_node types will be used and explained once the usage is added in the following patches. Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Signed-off-by: Moni Shoua <monis@mellanox.com> Signed-off-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-12net/mlx5_core: Introduce flow steering firmware commandsMaor Gottlieb
Introduce new Flow Steering (FS) firmware commands, in-order to support the new flow steering infrastructure. Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Signed-off-by: Moni Shoua <monis@mellanox.com> Signed-off-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-12net/mlx5e: Assign random MAC address if neededSaeed Mahameed
Under SRIOV there might be a case where VFs are loaded without pre-assigned MAC address. In this case, the VF will randomize its own MAC. This will address the case of administrator not assigning MAC to the VF through the PF OS APIs and keep udev happy. Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-12net/mlx5: Fix query E-Switch capabilitiesSaeed Mahameed
E-Switch capabilities should be queried only if E-Switch flow table is supported and not only when vport group manager. Fixes: d6666753c6e8 ("net/mlx5: E-Switch, Introduce HCA cap and E-Switch vport context") Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-11Merge branch 'thunderx-pass2'David S. Miller
Sunil Goutham says: ==================== net: thunderx: Support for pass-2 hw features This patch set adds support for new features added in pass-2 revision of hardware like TSO and count based interrupt coalescing. Changes from v1: - Addressed comments received regarding boolean bit field changes by excluding them from this patch. Will submit a seperate patch along with cleanup of unsed field. - Got rid of new macro 'VNIC_NAPI_WEIGHT' introduced in count threshold interrupt patch. ==================== Reviewed-by: Pavel Fedin <p.fedin@samsung.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-11net: thunderx: Enable CQE count threshold interruptSunil Goutham
This feature is introduced in pass-2 chip and with this CQ interrupt coalescing will work based on both timer and count. Signed-off-by: Sunil Goutham <sgoutham@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-11net: thunderx: HW TSO support for pass-2 hardwareSunil Goutham
This adds support for offloading TCP segmentation to HW in pass-2 revision of hardware. Both driver level SW TSO for pass1.x chips and HW TSO for pass-2 chip will co-exist. Modified SQ descriptor structures to reflect pass-2 hw implementation. Signed-off-by: Sunil Goutham <sgoutham@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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