4 files changed, 159 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/r8a7740-clock.h b/include/dt-bindings/clock/r8a7740-clock.h
new file mode 100644
index 000000000000..f6b4b0fe7a43
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7740-clock.h
@@ -0,0 +1,77 @@
+/*
+ * Copyright 2014 Ulrich Hecht
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R8A7740_H__
+#define __DT_BINDINGS_CLOCK_R8A7740_H__
+
+/* CPG */
+#define R8A7740_CLK_SYSTEM	0
+#define R8A7740_CLK_PLLC0	1
+#define R8A7740_CLK_PLLC1	2
+#define R8A7740_CLK_PLLC2	3
+#define R8A7740_CLK_R		4
+#define R8A7740_CLK_USB24S	5
+#define R8A7740_CLK_I		6
+#define R8A7740_CLK_ZG		7
+#define R8A7740_CLK_B		8
+#define R8A7740_CLK_M1		9
+#define R8A7740_CLK_HP		10
+#define R8A7740_CLK_HPP		11
+#define R8A7740_CLK_USBP	12
+#define R8A7740_CLK_S		13
+#define R8A7740_CLK_ZB		14
+#define R8A7740_CLK_M3		15
+#define R8A7740_CLK_CP		16
+
+/* MSTP1 */
+#define R8A7740_CLK_CEU21	28
+#define R8A7740_CLK_CEU20	27
+#define R8A7740_CLK_TMU0	25
+#define R8A7740_CLK_LCDC1	17
+#define R8A7740_CLK_IIC0	16
+#define R8A7740_CLK_TMU1	11
+#define R8A7740_CLK_LCDC0	0
+
+/* MSTP2 */
+#define R8A7740_CLK_SCIFA6	30
+#define R8A7740_CLK_SCIFA7	22
+#define R8A7740_CLK_DMAC1	18
+#define R8A7740_CLK_DMAC2	17
+#define R8A7740_CLK_DMAC3	16
+#define R8A7740_CLK_USBDMAC	14
+#define R8A7740_CLK_SCIFA5	7
+#define R8A7740_CLK_SCIFB	6
+#define R8A7740_CLK_SCIFA0	4
+#define R8A7740_CLK_SCIFA1	3
+#define R8A7740_CLK_SCIFA2	2
+#define R8A7740_CLK_SCIFA3	1
+#define R8A7740_CLK_SCIFA4	0
+
+/* MSTP3 */
+#define R8A7740_CLK_CMT1	29
+#define R8A7740_CLK_FSI		28
+#define R8A7740_CLK_IIC1	23
+#define R8A7740_CLK_USBF	20
+#define R8A7740_CLK_SDHI0	14
+#define R8A7740_CLK_SDHI1	13
+#define R8A7740_CLK_MMC		12
+#define R8A7740_CLK_GETHER	9
+#define R8A7740_CLK_TPU0	4
+
+/* MSTP4 */
+#define R8A7740_CLK_USBH	16
+#define R8A7740_CLK_SDHI2	15
+#define R8A7740_CLK_USBFUNC	7
+#define R8A7740_CLK_USBPHY	6
+
+/* SUBCK* */
+#define R8A7740_CLK_SUBCK	9
+#define R8A7740_CLK_SUBCK2	10
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7740_H__ */
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
index f929a79e6998..8ea7ab0346ad 100644
--- a/include/dt-bindings/clock/r8a7790-clock.h
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -26,6 +26,7 @@
 #define R8A7790_CLK_MSIOF0		0
 
 /* MSTP1 */
+#define R8A7790_CLK_JPU		6
 #define R8A7790_CLK_TMU1		11
 #define R8A7790_CLK_TMU3		21
 #define R8A7790_CLK_TMU2		22
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index f0d4d1049162..58c3f49d068c 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -25,6 +25,7 @@
 #define R8A7791_CLK_MSIOF0		0
 
 /* MSTP1 */
+#define R8A7791_CLK_JPU		6
 #define R8A7791_CLK_TMU1		11
 #define R8A7791_CLK_TMU3		21
 #define R8A7791_CLK_TMU2		22
diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h
new file mode 100644
index 000000000000..9ac1043e25bc
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7794-clock.h
@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) 2014 Renesas Electronics Corporation
+ * Copyright 2013 Ideas On Board SPRL
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R8A7794_H__
+#define __DT_BINDINGS_CLOCK_R8A7794_H__
+
+/* CPG */
+#define R8A7794_CLK_MAIN		0
+#define R8A7794_CLK_PLL0		1
+#define R8A7794_CLK_PLL1		2
+#define R8A7794_CLK_PLL3		3
+#define R8A7794_CLK_LB			4
+#define R8A7794_CLK_QSPI		5
+#define R8A7794_CLK_SDH			6
+#define R8A7794_CLK_SD0			7
+#define R8A7794_CLK_Z			8
+
+/* MSTP0 */
+#define R8A7794_CLK_MSIOF0		0
+
+/* MSTP1 */
+#define R8A7794_CLK_TMU1		11
+#define R8A7794_CLK_TMU3		21
+#define R8A7794_CLK_TMU2		22
+#define R8A7794_CLK_CMT0		24
+#define R8A7794_CLK_TMU0		25
+
+/* MSTP2 */
+#define R8A7794_CLK_SCIFA2		2
+#define R8A7794_CLK_SCIFA1		3
+#define R8A7794_CLK_SCIFA0		4
+#define R8A7794_CLK_MSIOF2		5
+#define R8A7794_CLK_SCIFB0		6
+#define R8A7794_CLK_SCIFB1		7
+#define R8A7794_CLK_MSIOF1		8
+#define R8A7794_CLK_SCIFB2		16
+
+/* MSTP3 */
+#define R8A7794_CLK_CMT1		29
+
+/* MSTP5 */
+#define R8A7794_CLK_THERMAL		22
+#define R8A7794_CLK_PWM			23
+
+/* MSTP7 */
+#define R8A7794_CLK_HSCIF2		13
+#define R8A7794_CLK_SCIF5		14
+#define R8A7794_CLK_SCIF4		15
+#define R8A7794_CLK_HSCIF1		16
+#define R8A7794_CLK_HSCIF0		17
+#define R8A7794_CLK_SCIF3		18
+#define R8A7794_CLK_SCIF2		19
+#define R8A7794_CLK_SCIF1		20
+#define R8A7794_CLK_SCIF0		21
+
+/* MSTP8 */
+#define R8A7794_CLK_ETHER		13
+
+/* MSTP9 */
+#define R8A7794_CLK_GPIO6		5
+#define R8A7794_CLK_GPIO5		7
+#define R8A7794_CLK_GPIO4		8
+#define R8A7794_CLK_GPIO3		9
+#define R8A7794_CLK_GPIO2		10
+#define R8A7794_CLK_GPIO1		11
+#define R8A7794_CLK_GPIO0		12
+
+/* MSTP11 */
+#define R8A7794_CLK_SCIFA3		6
+#define R8A7794_CLK_SCIFA4		7
+#define R8A7794_CLK_SCIFA5		8
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7794_H__ */