diff options
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/mmci.c | 27 |
1 files changed, 26 insertions, 1 deletions
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 0814b88b44d6..f67fd4f2ab48 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -51,6 +51,7 @@ static unsigned int fmax = 515633; * @broken_blockend_dma: the MCI_DATABLOCKEND is broken on the hardware when * using DMA. * @sdio: variant supports SDIO + * @st_clkdiv: true if using a ST-specific clock divider algorithm */ struct variant_data { unsigned int clkreg; @@ -61,6 +62,7 @@ struct variant_data { bool broken_blockend; bool broken_blockend_dma; bool sdio; + bool st_clkdiv; }; static struct variant_data variant_arm = { @@ -86,7 +88,9 @@ static struct variant_data variant_ux500 = { .datalength_bits = 24, .broken_blockend = true, .sdio = true, + .st_clkdiv = true, }; + /* * This must be called with host->lock held */ @@ -97,9 +101,30 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) if (desired) { if (desired >= host->mclk) { - clk = MCI_CLK_BYPASS; + /* + * The ST clock divider does not like the bypass bit, + * even though it's available. Instead the datasheet + * recommends setting the divider to zero. + */ + if (!variant->st_clkdiv) + clk = MCI_CLK_BYPASS; host->cclk = host->mclk; + } else if (variant->st_clkdiv) { + /* + * DB8500 TRM says f = mclk / (clkdiv + 2) + * => clkdiv = (mclk / f) - 2 + * Round the divider up so we don't exceed the max + * frequency + */ + clk = DIV_ROUND_UP(host->mclk, desired) - 2; + if (clk >= 256) + clk = 255; + host->cclk = host->mclk / (clk + 2); } else { + /* + * PL180 TRM says f = mclk / (2 * (clkdiv + 1)) + * => clkdiv = mclk / (2 * f) - 1 + */ clk = host->mclk / (2 * desired) - 1; if (clk >= 256) clk = 255; |