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path: root/drivers/gpu/drm/i915/intel_pm.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c42
1 files changed, 21 insertions, 21 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 8cc7c346cbd9..f6406ebd533c 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -652,7 +652,7 @@ static void pineview_update_wm(struct intel_crtc *unused_crtc)
&crtc->config->base.adjusted_mode;
const struct drm_framebuffer *fb =
crtc->base.primary->state->fb;
- int cpp = drm_format_plane_cpp(fb->pixel_format, 0);
+ int cpp = fb->format->cpp[0];
int clock = adjusted_mode->crtc_clock;
/* Display SR */
@@ -727,7 +727,7 @@ static bool g4x_compute_wm0(struct drm_i915_private *dev_priv,
clock = adjusted_mode->crtc_clock;
htotal = adjusted_mode->crtc_htotal;
hdisplay = crtc->config->pipe_src_w;
- cpp = drm_format_plane_cpp(fb->pixel_format, 0);
+ cpp = fb->format->cpp[0];
/* Use the small buffer method to calculate plane watermark */
entries = ((clock * cpp / 1000) * display_latency_ns) / 1000;
@@ -816,7 +816,7 @@ static bool g4x_compute_srwm(struct drm_i915_private *dev_priv,
clock = adjusted_mode->crtc_clock;
htotal = adjusted_mode->crtc_htotal;
hdisplay = crtc->config->pipe_src_w;
- cpp = drm_format_plane_cpp(fb->pixel_format, 0);
+ cpp = fb->format->cpp[0];
line_time_us = max(htotal * 1000 / clock, 1);
line_count = (latency_ns / line_time_us + 1000) / 1000;
@@ -963,7 +963,7 @@ static uint16_t vlv_compute_wm_level(struct intel_plane *plane,
if (!state->base.visible)
return 0;
- cpp = drm_format_plane_cpp(state->base.fb->pixel_format, 0);
+ cpp = state->base.fb->format->cpp[0];
clock = crtc->config->base.adjusted_mode.crtc_clock;
htotal = crtc->config->base.adjusted_mode.crtc_htotal;
width = crtc->config->pipe_src_w;
@@ -1004,7 +1004,7 @@ static void vlv_compute_fifo(struct intel_crtc *crtc)
if (state->base.visible) {
wm_state->num_active_planes++;
- total_rate += drm_format_plane_cpp(state->base.fb->pixel_format, 0);
+ total_rate += state->base.fb->format->cpp[0];
}
}
@@ -1023,7 +1023,7 @@ static void vlv_compute_fifo(struct intel_crtc *crtc)
continue;
}
- rate = drm_format_plane_cpp(state->base.fb->pixel_format, 0);
+ rate = state->base.fb->format->cpp[0];
plane->wm.fifo_size = fifo_size * rate / total_rate;
fifo_left -= plane->wm.fifo_size;
}
@@ -1455,7 +1455,7 @@ static void i965_update_wm(struct intel_crtc *unused_crtc)
int clock = adjusted_mode->crtc_clock;
int htotal = adjusted_mode->crtc_htotal;
int hdisplay = crtc->config->pipe_src_w;
- int cpp = drm_format_plane_cpp(fb->pixel_format, 0);
+ int cpp = fb->format->cpp[0];
unsigned long line_time_us;
int entries;
@@ -1541,7 +1541,7 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc)
if (IS_GEN2(dev_priv))
cpp = 4;
else
- cpp = drm_format_plane_cpp(fb->pixel_format, 0);
+ cpp = fb->format->cpp[0];
planea_wm = intel_calculate_wm(adjusted_mode->crtc_clock,
wm_info, fifo_size, cpp,
@@ -1568,7 +1568,7 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc)
if (IS_GEN2(dev_priv))
cpp = 4;
else
- cpp = drm_format_plane_cpp(fb->pixel_format, 0);
+ cpp = fb->format->cpp[0];
planeb_wm = intel_calculate_wm(adjusted_mode->crtc_clock,
wm_info, fifo_size, cpp,
@@ -1621,7 +1621,7 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc)
if (IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
cpp = 4;
else
- cpp = drm_format_plane_cpp(fb->pixel_format, 0);
+ cpp = fb->format->cpp[0];
line_time_us = max(htotal * 1000 / clock, 1);
@@ -1787,7 +1787,7 @@ static uint32_t ilk_compute_pri_wm(const struct intel_crtc_state *cstate,
if (!cstate->base.active || !pstate->base.visible)
return 0;
- cpp = drm_format_plane_cpp(pstate->base.fb->pixel_format, 0);
+ cpp = pstate->base.fb->format->cpp[0];
method1 = ilk_wm_method1(ilk_pipe_pixel_rate(cstate), cpp, mem_value);
@@ -1816,7 +1816,7 @@ static uint32_t ilk_compute_spr_wm(const struct intel_crtc_state *cstate,
if (!cstate->base.active || !pstate->base.visible)
return 0;
- cpp = drm_format_plane_cpp(pstate->base.fb->pixel_format, 0);
+ cpp = pstate->base.fb->format->cpp[0];
method1 = ilk_wm_method1(ilk_pipe_pixel_rate(cstate), cpp, mem_value);
method2 = ilk_wm_method2(ilk_pipe_pixel_rate(cstate),
@@ -1860,7 +1860,7 @@ static uint32_t ilk_compute_fbc_wm(const struct intel_crtc_state *cstate,
if (!cstate->base.active || !pstate->base.visible)
return 0;
- cpp = drm_format_plane_cpp(pstate->base.fb->pixel_format, 0);
+ cpp = pstate->base.fb->format->cpp[0];
return ilk_wm_fbc(pri_val, drm_rect_width(&pstate->base.dst), cpp);
}
@@ -3258,13 +3258,13 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
if (format == DRM_FORMAT_NV12) {
if (y) /* y-plane data rate */
data_rate = width * height *
- drm_format_plane_cpp(format, 0);
+ fb->format->cpp[0];
else /* uv-plane data rate */
data_rate = (width / 2) * (height / 2) *
- drm_format_plane_cpp(format, 1);
+ fb->format->cpp[1];
} else {
/* for packed formats */
- data_rate = width * height * drm_format_plane_cpp(format, 0);
+ data_rate = width * height * fb->format->cpp[0];
}
down_scale_amount = skl_plane_downscale_amount(intel_pstate);
@@ -3351,9 +3351,9 @@ skl_ddb_min_alloc(const struct drm_plane_state *pstate,
}
if (fb->pixel_format == DRM_FORMAT_NV12 && !y)
- plane_bpp = drm_format_plane_cpp(fb->pixel_format, 1);
+ plane_bpp = fb->format->cpp[1];
else
- plane_bpp = drm_format_plane_cpp(fb->pixel_format, 0);
+ plane_bpp = fb->format->cpp[0];
if (drm_rotation_90_or_270(pstate->rotation)) {
switch (plane_bpp) {
@@ -3613,13 +3613,13 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
if (drm_rotation_90_or_270(pstate->rotation))
swap(width, height);
- cpp = drm_format_plane_cpp(fb->pixel_format, 0);
+ cpp = fb->format->cpp[0];
plane_pixel_rate = skl_adjusted_plane_pixel_rate(cstate, intel_pstate);
if (drm_rotation_90_or_270(pstate->rotation)) {
int cpp = (fb->pixel_format == DRM_FORMAT_NV12) ?
- drm_format_plane_cpp(fb->pixel_format, 1) :
- drm_format_plane_cpp(fb->pixel_format, 0);
+ fb->format->cpp[1] :
+ fb->format->cpp[0];
switch (cpp) {
case 1: