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-rw-r--r--arch/powerpc/platforms/powermac/pmac_pic.c7
-rw-r--r--arch/powerpc/platforms/powermac/pmac_smp.c10
2 files changed, 9 insertions, 8 deletions
diff --git a/arch/powerpc/platforms/powermac/pmac_pic.c b/arch/powerpc/platforms/powermac/pmac_pic.c
index a6b1b577e19f..7ddd5264cc6e 100644
--- a/arch/powerpc/platforms/powermac/pmac_pic.c
+++ b/arch/powerpc/platforms/powermac/pmac_pic.c
@@ -430,7 +430,7 @@ void __init pmac_pic_init(void)
prom_get_irq_senses(senses, 0, 128);
mpic1 = mpic_alloc(irqctrler->addrs[0].address,
MPIC_PRIMARY | MPIC_WANTS_RESET,
- 0, 0, 128, 256, senses, 128, " K2-MPIC ");
+ 0, 0, 128, 252, senses, 128, " OpenPIC ");
BUG_ON(mpic1 == NULL);
mpic_init(mpic1);
@@ -441,14 +441,15 @@ void __init pmac_pic_init(void)
irqctrler2->intrs[0].line);
pmac_call_feature(PMAC_FTR_ENABLE_MPIC, irqctrler2, 0, 0);
- prom_get_irq_senses(senses, 128, 128 + 128);
+ prom_get_irq_senses(senses, 128, 128 + 124);
/* We don't need to set MPIC_BROKEN_U3 here since we don't have
* hypertransport interrupts routed to it
*/
mpic2 = mpic_alloc(irqctrler2->addrs[0].address,
MPIC_BIG_ENDIAN | MPIC_WANTS_RESET,
- 0, 128, 128, 0, senses, 128, " U3-MPIC ");
+ 0, 128, 124, 0, senses, 124,
+ " U3-MPIC ");
BUG_ON(mpic2 == NULL);
mpic_init(mpic2);
mpic_setup_cascade(irqctrler2->intrs[0].line,
diff --git a/arch/powerpc/platforms/powermac/pmac_smp.c b/arch/powerpc/platforms/powermac/pmac_smp.c
index 995e9095d865..fb996336c58b 100644
--- a/arch/powerpc/platforms/powermac/pmac_smp.c
+++ b/arch/powerpc/platforms/powermac/pmac_smp.c
@@ -48,7 +48,7 @@
#include <asm/machdep.h>
#include <asm/pmac_feature.h>
#include <asm/time.h>
-#include <asm/open_pic.h>
+#include <asm/mpic.h>
#include <asm/cacheflush.h>
#include <asm/keylargo.h>
@@ -638,14 +638,14 @@ void smp_core99_message_pass(int target, int msg, unsigned long data, int wait)
}
switch (target) {
case MSG_ALL:
- mpic_send_ipi(msg, mask);
+ mpic_send_ipi(msg, cpus_addr(mask)[0]);
break;
case MSG_ALL_BUT_SELF:
cpu_clear(smp_processor_id(), mask);
- mpic_send_ipi(msg, mask);
+ mpic_send_ipi(msg, cpus_addr(mask)[0]);
break;
default:
- mpic_send_ipi(msg, cpumask_of_cpu(target));
+ mpic_send_ipi(msg, 1 << target);
break;
}
}
@@ -678,7 +678,7 @@ int __cpu_disable(void)
cpu_clear(smp_processor_id(), cpu_online_map);
/* XXX reset cpu affinity here */
- openpic_set_priority(0xf);
+ mpic_cpu_set_priority(0xf);
asm volatile("mtdec %0" : : "r" (0x7fffffff));
mb();
udelay(20);